* add rx_restream_stop command. This allows to send a ZMQ dummy header any time user wants to do so. For example this allows to pre-configure the ZMQ processing software before the acquisition begins. Therefore, the dummy header was adapted in order to contain the fields stored in the receiver.
* renamed command, changed inherit, moved commands to zmq related section
* update filename in restreamstop
* renamed helper function, sorted header fields alphabetically
* fixed fnametostream set
* renamed functions, add SetFileName method, format JSON parameters order
* added python bindings and formatting (does nothing really)
* renamed restream stop functions to stream dummy
* checkout .github files from ed8c885
* release notes
---------
Co-authored-by: Dhanya Thattil <dhanya.thattil@psi.ch>
* round CTB clocks to next closest possible value, added freq measurement
* added time for firmware to measrue actual value after frequency change
* add check for backwards compatibility
* change CTB and XCTB clock values to MHz, TODO: units and validation errors
* changed runclk command to use units and float, TODO: dbit, adcclk, why is everything called StringTo ?
* do the same for dbit and adcclk
* added tolerance to exptime, fixed test
* update default values in server defs
* added virtual check in Altera_PLL, update testcases
* change python and pyctbgui to accept and return floating point MHz
* update help and comments
* Dev/ctb clocks fix (#1434)
* introduced new type Hz, typetraits, String conversions, command generation (not yet generated)
* incorrect unit typo
* cmd generation and compiles
* default to MHz, removed space between units for consistency with timers, min and max checks for clks
* in python, but need to change the default to Hz again for clean code and intuition
* allow ints, doubles, implicit conversions
* dont allow raw ints, doubles and implicit conversions
* fixed tests
* added operators for Hz in python
* fix test for min clk for xilinx ctb
* fix test
* fix python tests
* fixed xilinx period and default clks
* test fix
* removed the 3 clock cycle check for ctb and implemented properly the max adc clk frq for altera ctb
* removing 3 clock cycle code from xilinx as well
* formatting
* loadpattern before 3 clk cycles code
* actualtime and measurement time to be implemented in 100ns already in fw
* fix tests
* pyzmq dependency forthe tests
* fixed pyctbgui for freq
* insert tolerance check again
* also added tolerance check for patwaittime
* formatting
* minor: rounding test
* removed Rep redundant in ToString for freq
* intro frequency unit enums, removed unnecessary template behavior for ToString with freq unit, switching from parsing string unit argument to the enum argument for ToString, adding parsing string to unit at CLI boundary
* minor, and binaries
* minor, default clk vals are 0 but set up at detector setup
* get frequency only for that unit
* tolerance process
* missed in previous commit
* some more changes to exptime and validations
* ctb is probably done
* periodleft and delayleft
* fixed xilinx freq conv as well
* fixed m3 bug, binaries
* xilinx: setup also done in stop server so that the clk is not 0
* missed a test marker
* binaries in
* review fixes, simpler validation of timers in ctb and xilinx ctb
* typo fix
* format
* fix tests
---------
Co-authored-by: Martin Mueller <martin.mueller@psi.ch>
Co-authored-by: Dhanya Thattil <dhanya.thattil@psi.ch>
* added fetch fmt server library
* added first draft of matterhorn
* added enum ReturnCode
* added cpp TCP Interface to slsDetectorServer
* added fmt to workflows
* bug: added std::signal for proper handling of ctr+c
* added compile option to set log level
* WIP
* dont use c project settings when building matterhornserver
* updated logger
* WIP
* WIP
* linked fmt to slsProjectOptions
* solved merge conflict
* some refactoring
* cleaned up logs
* added fmt to workflow
* WIP
* generated register defs from csv file
* oops given in hex
* properly added fmt as a dependency
* add fmt to conda recipe
* some format changes
* dont use public headers of fmt
* WIP
* used CRTP for virtual detector
* WIP
* added udp functions to matterhornserver
* Matterhorn in tostring
* warning unused variable from other PR
* fixed build
* updated cmake
* added Server class usable for all detectors
* removed stopserver
* added some more functions
* wrong overload
* porper cleanup of matterhorn app
* PR Review
* refactored directory structure
* used pause insetad of sleep
---------
Co-authored-by: Dhanya Thattil <dhanya.thattil@psi.ch>
* updated binaries and fixed a warning by moving the usleep_bf to blackfin.c
* suppressed warnings
* cleaned up docs
* renamed function
---------
Co-authored-by: Alice <alice.mazzoleni@psi.ch>
* not allowing power names for dac names to prevent duplicate names
* wip
* v_abcd commands should be removed to prevent unintentional usage and throw with a suggestion command for dac and power
* binary in
* dacs with power dac names should work and do not take in dac units to avoid ambiguity, test with 0 value for power dacs should fail, to do: implement power commands
* wip: power in client, tests, and fixed server interfaces and ctb implementation, not tested
* wip. client and xilinx todo
* wip: ctb power works, tests left
* fixed some tests
* added vchip check
* python cmds still left. wip
* fixed xilinx. python left
* wip
* wip. xilinx
* fixed powerchip for ctb
* power all returns all
* configtransceiver is removed
* wip python
* wip
* wip
* wip
* wip
* wip
* wip
* wip xilinx
* wip
* wip
* wip
* pybindings
* fix getdacindex and getdacname for normal detectors to throw if random index that doesnt fit to the detector
* wip
* fixed tests
* fixes for python api
* wip
* python: moved powerlist to Ctb
* fixed tests to work for powelist in Ctb
* moved signallist, adclist, slowadc, slowadclist to Ctb
* throw approperiate error when no modules added for powers
* added dac test
* fix dac default names and test for dacs
* ctb dacs, yet to do othe rdacs
* dacs should work now even in tests
* run all tests
* DetectorPowers->NamedPowers in ctb
* comments
* removed unnecessary test code
* removed hard coded dac names in python NamedDacs and NamedPowers
* minor
* minor
* fixed error messages
* changed power to be able to set DAC directly, using enable and disable methods with enabled to get
* rx_roi fixed when there is no roi for a particular port. Fixed tests for it
* removing todo check if files created because its not enough to count matching pattern file names, but also look at timestamp and create files with timestamp else you read older ones. For now, checking individual rois is enough
* restore md5
---------
Co-authored-by: Erik Fröjdh <erik.frojdh@gmail.com>
* wip
* wip
* wip. xilinx left
* wip. xilinx
* wip
* wip. compiles
* fixed eiger test
* more fixes
* fixed virtual m3
* fix typos and bugs
* setting power to 0
* set power fixed
* updated server binaries
* minor
* refactoring
* get vchip refactoring
* eiger: unnecessary check for setsettings undefined
* retval pointer for printout
* eiger.wip, mV in boolean
* wip. gotthard2 and m3
* wip. jungfrau
* moench.wip
* compiles.wip
* fix eiger
* m3 fix vthresh
* fix ctband xilinx
* default pwr index = pwr_io
* minor:fn name and highvoltage to local var
* refactor funcs
* minor
* minor
* check dac voltage only for normal dacs and not for power dacs as the dac voltage range is different for ctb and xilinx ctb, also throw for -1 in set for set_dac in client itself. in the server its not clear if its set or get with a -1
* minor
* updated versioning
* review changes: removing validateDACValue and other minor stuff
* binaries in
* wip
* refactored m3 vth
* minor review
* minor review
* m3 serverdac index fix
* minor
* added simulator tests in github workflows
* indentation error
* typo
* debug
* Logging for debugging
* added more debug lines
* more debugging
* debug
* debug
* debug
* dont throw if process does not exist
* debug
* added absolute path to sls_detector commands
* some refactoring in test scripts
* added absolute path to all slsdet command
* typo
* ../tests/scripts/test_frame_synchronizer.py
* raise exception upon failure for github workflows
* removed hidden tags
* some refactoring in test scripts
* some refactoring
* fixed CMakeLists
* fixed unsuccesful merge
* updated python tests using simulators
* debug import error
* debug module import
* python -m runs module pytest as script - everything in path available
* removed integartion tests
* enable file write not to log files
* run tests without log files
* increased sleep time for udp packets
* added logg level variable to cmake
* added testing policies to documenattion
* disabled check for num_frames for jungfrau & xilinx
* set log level as cmake cached variable
* disable tests for jungfrau and xilinx_ctb
* check frames for HDF5
* updated Documentation of Testing
* changed withdetectorsimulators to detectorintegration
* replaced [.cmdcall] with [.detectorintegration]
* check_file_size only disabled for jungfrau - disable for all roi tests
* changed time to wait after receive to 5 ms
* take into account half modules of eiger
* num udp interfaces needs to be consistent across modules
* suppressed warning enclosing if
* config added 2 udp ports per default for moench and jungfrau
* write detector output to console
* allow jungfrau to tests num frames, remove unused variable (numinterfaces), add comment for future to handle traceback to know which calling function threw the files unmatched, added documentation for tests (examples for .detectoritnegration and how to disable marked tests, removed addditional argumetns to disable for test_simulator as one can just use ~, removed the check that checks for jungfrau checking number of frames at master attributes and at rx test, removed unused advanced_test_settings in test_simulator script, the num_mods check for multiple modules is removed and default num modules set to 1 for test_simulator (to be increased later), back to raising exception for killprocess
* removed integration tests from cmakelists.txt and cmk.sh, modified the tests workflow command to reflect the disable argument and removed xilinx_ctb from test (fix fromdeveloper merge to be done)
* filtering by actual name for disable certain tests on github workflow
* minor refactor
* wip
* wip
* changes to run on local rh9 runner instead of github workfloa
* modified yml to remove some leftover from github workflow
* test
* fix build_dir in scripts (github workflow) and pytest dir in gitea workflow
* making the local machine use python3.13 binary
* pythonpath added
* changes for build_Dir back
* allowing ctb api tests
* allowed ctb api tests and set up slsdetname envt variable for shared memory being reserved just for these tests
* added rh8 workflow for local runner on gitea
* remnants from rh9 local runner
* remnants from rh9 local runner
* conda env for all shell for local runner
* allowing hdf5 to build on local runner
* run all tests for both the runners
* refactored fixtures a bit and merged some tests that use one session for entire server
* test fail
* test fix
* adding github workflow to test without data file checks and without logs
* documentation changes
* unnecessary import in conftest
* allowing the session_simulator to test for multiple modules and interfaces etc
* allow test_simulator script to run for 2 modules for all modules except ctb and xilinx ctb
* run upon push
* removing the disable file check on github workflow
* minor adjustment
* testing without synch
* reverting to previous
* with log file
* without the space
* summary from file and more error extracts from file to terminal
* minor
* trying nlf for more details
* updated with no log file to print everything to screen also for det and rxr
* trying a no throw
* stoi was more about indent in yaml
* tries
* wip
* debug
* number of frames inconsistent fix=>just take first one, only test xilinx
* jungfrau tests without frames caught check
* extend the disable file check to everywhere that creates files
* specify path for test_simulator
* withoutprinting ==
* wip
* back with printing===, but not parsing file for errors anymore
* lang?
* wip
* safe log?
* wip2
* wip
* dont split error as its streaming live, just raise
* with log files
* lang?
* last resort
* wip
* test no det with general tests
* show tests live
* also include hidden integration tests
* without extra summary?
* revert
* last resort again
* tsquash on int64_t?
* tsquash on int64_t? mroe print
* writing to /tmp?
* all tests
* might be the fix?
* write to file
* fixed a few quiet mode no log file tests
* work on any branch for github tests, work on also release candidates for gitea tests
* added frame synchronizer tests to github workflow
* moved tests to run_tests.yaml from cmake.yaml
* documentation
* disabled general tests
---------
Co-authored-by: Dhanya Thattil <dhanya.thattil@psi.ch>
* create a include command calling the same function as parameters (cmd generation and autocompletion), testing parameters and include
* added include in command line and python and its supposed to do the same as parameters command. both are tested
* added colorama
* moved test_free and test_command python tests to tests/scripts folder from python/tests due to CI issues with dependencies
* generated commands
* formatting
---------
Co-authored-by: Erik Fröjdh <erik.frojdh@gmail.com>
* basic ctb config api for register and bit names
* tests for define and definelist pass. yet to implement using them for reg, setbit, clearbit and getbit
* improved autocomplete for getbit,setbit, clearbit
* validate autocomplete
* definelist has no put
* updating help
* converting char array+int in runtimeerror compiles but throws at runtime.Fixed.Tested for it. Also check if string or int before using getregisterdefinitonbyvalue to see if it threw to call the other function. because both of it can throw and we should differentiate the issues for both
* removed std::vector<std::pair<string,int> to std::map<string, int> for defiitions list
* Dev/define cmd tie bit to reg (#1328)
* strong type
* moved everythign to bit_utils class
* pybindings
* added tests for python
* removed duplicates
* removed bit names in reg
* changed BitPosition to BitAddress
* Using define reg/bit from python (#1344)
* define_bit, define_addr in python.
* setBit/clearBit takes int or addr
* added example using bits
* split define into 2 commands define_reg and define_bit, definelist into 2: definelist_reg and definelist_bit
* allow string for register and bit names in c++ api
* refactor from github comments
* naming refactoring (getRegisterDefnition to retunr name and address specifically
* added marker for 8 cmd tests connected to define, changed macro to static constexpr
* changed bitPosition from int to uint32_t
* got rid of setbitposition and setaddress, instead overloaded constructor to take in strings so that the conversion from string to bit address members, takes place within the class for easy maintainance in case type changes
* Removing implicit conversions:
RegisterAddresss and RegisterValue: Removed the implicit conversions.
RegisterAddress: Changed member name from address_ to value_ and method as well to value().
RegisterValue: Also added | operator to be able to concatenate with uint32_t. Same in python bindings (but could not find the tests to modify
* Allowed concatenation with other RegisterValue, made them all constexpr
* fix a ctbConfig test
* Maponstack works with integration tests, but need unit tests
* tests on mapstack
* fixed ctb tests and FixedString being initialized with gibberish
* removing parsing from string inside the class RegisterAddress, BitAddress and RegisterValue
* updated python bindings
* fixed bit utils test
* renaming getRegisterDefintiionAddress/Name=>getRegisterAddress/Name and similary for getBitDefinitionAddress/Name
* updated python bindings
* fix tests (format)
* a few python tests added and python bindings corrected
* replaceing str with __str__ for bit.cpp
* repr reimplemented for bit.cpp
* removed make with registerAddress etc
* starting server for tests per session and nor module
* killprocess throws if no process found-> github runs fails, changed to pkill and not throw
* clean shm shouldnt raise, in ci binary not found
* ignoring these tests for CI, which fail on CI because simulators are not generated in CI. This is in another PR, where it should work
---------
Co-authored-by: Erik Fröjdh <erik.frojdh@gmail.com>
Co-authored-by: froejdh_e <erik.frojdh@psi.ch>
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Erik Fröjdh
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