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dfc886a65b
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mythen3 gui
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2019-11-18 17:57:19 +01:00 |
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a62d6a2fb8
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gotthard2: veto reference, better code for byte aligment in server
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2019-11-15 11:58:23 +01:00 |
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5518531620
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gotthard2: veto reference
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2019-11-14 19:01:10 +01:00 |
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28a5aa8342
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injectchannel WIP
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2019-11-13 15:11:11 +01:00 |
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72ac2745ea
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gotthard2: server fix enum for onchip dac
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2019-11-12 12:11:52 +01:00 |
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2fff9f5bfe
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merge
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2019-11-11 18:03:13 +01:00 |
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90c34e4942
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gotthard2, dacs and onchip dacs from config file
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2019-11-11 18:02:08 +01:00 |
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bb26b993ea
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servers, firmware check message to init message, minor
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2019-11-11 12:00:04 +01:00 |
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2123fb47a5
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mythen3: config reg enable all counters, dr
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2019-11-11 10:41:42 +01:00 |
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38ad5d7931
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mythen3 rxr
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2019-11-08 18:11:27 +01:00 |
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d7e2ab8ec4
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gotthard2: on chip dacs
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2019-11-08 17:09:57 +01:00 |
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a92d931a8f
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mythen3 frequency fixes
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2019-11-07 14:35:13 +01:00 |
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615b3b2557
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WIP
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2019-11-06 19:07:00 +01:00 |
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1797d39216
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updated mythen3 to configure phase, freq, delay left, period left, actual time, measurement time, framesfrom start and othe register mappings
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2019-11-06 18:58:22 +01:00 |
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0f9fd5cd73
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rename of clkdivider to clkfrequency in servers
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2019-11-06 16:58:34 +01:00 |
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73b5c3ac57
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merge
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2019-11-06 16:46:00 +01:00 |
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18b8720c17
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separated parameters and versions
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2019-11-06 16:43:59 +01:00 |
|
Marie Andrae
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7de9401bc7
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powerchip for mythen3
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2019-11-06 11:50:09 +01:00 |
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567e821569
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updated ieger server
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2019-11-05 18:52:51 +01:00 |
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1f64d2a4e2
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speed separated
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2019-11-05 18:50:35 +01:00 |
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031241ae28
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timer split up
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2019-11-04 16:40:11 +01:00 |
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6c5c4f00b3
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mythen3 calc checksum
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2019-10-31 12:31:51 +01:00 |
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ba9a0c7917
|
removed unused multi functions
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2019-10-30 18:20:16 +01:00 |
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11ea071543
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adcinvert for jungfrau, gui for jungfrau dacs
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2019-10-30 12:28:51 +01:00 |
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82570bc084
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daclist and dacvalues
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2019-10-30 11:09:34 +01:00 |
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fe467cdf70
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jungfrau dacs named
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2019-10-29 18:11:16 +01:00 |
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aa8610fb04
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WIP
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2019-10-29 10:11:36 +01:00 |
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798f221764
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WIP
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2019-10-29 10:07:07 +01:00 |
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f4a0780b51
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patloops done
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2019-10-24 18:59:23 +02:00 |
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f73a15e786
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tests made to pass ctb
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2019-10-24 11:32:58 +02:00 |
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fa84d17a19
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gotthard tests passed
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2019-10-22 17:07:38 +02:00 |
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8c6da7da1b
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jungfrau storage cell bug fix
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2019-10-22 13:38:17 +02:00 |
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f2fc187f13
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better testing for eiger
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2019-10-21 15:10:31 +02:00 |
|
Dhanya Thattil
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995f0924e5
|
Commandline (#66)
* WIP
* WIP
* removed status to string from defs
* WIP
* WIP
* WIP removed unused functions in multi
* WIP
* print hex in a terrible way
* WIP, loadconfig error
* WIP, type to string
* WIP
* fix to conversion
* WIP, hostname doesnt work
* WIP
* WIP
* WIP
* WIP, threshold
* WIP, threshold
* WIP
* WIP, triggers
* WIP, cycles to triggers
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* rx_udsocksize fx, WIP
* WIP
* WIP
* WIP
* file index (64 bit), WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* merge
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* New python mod
|
2019-10-21 10:29:06 +02:00 |
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be50344b45
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set clock divider, phase and get clock freq for gotthard2, priliminary
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2019-10-17 16:39:41 +02:00 |
|
Marie Andrä
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9b4fc02b0e
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start/stop statemachine for my3 (#68)
* start/stop statemachine for my3
* runStatus, readFrame, runBusy (use CONTROL_REG) for mythen3
* registers for Pavel
* change dac names Mythen3
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2019-10-09 13:52:07 +02:00 |
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b109ea8d7d
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jungfrau vref_prech, dac enum similar to mainenum
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2019-10-08 18:00:22 +02:00 |
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cfd3680176
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gotthard2 dacs
|
2019-10-08 17:10:36 +02:00 |
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030cfacc9b
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WIP
|
2019-10-08 10:57:07 +02:00 |
|
Marie Andrä
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5f94b5c246
|
Dac (#67)
* dac WIP
* dacs WIP
* DACs are working with names
* namechanges of vrfsh->vshaper, vrfshnpol->vshaperneg
* pattern for MY3, configure MAC for MY3
|
2019-10-07 12:13:25 +02:00 |
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b3ff825ce8
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updated gotthard2 api etc
|
2019-10-01 16:26:42 +02:00 |
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2a40c7f48e
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recompiled all servers
|
2019-09-30 14:54:31 +02:00 |
|
Dhanya Thattil
|
ca054626e6
|
Removeudpcache (#65)
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* WIP
* solved eiger 1-10g issue
* some fixes for remove udp cache to work
* bug fix virtual
* removed special handling of rx_udpip
|
2019-09-30 14:46:25 +02:00 |
|
Marie Andrä
|
6e6fcec698
|
MY3.0:read and write Registers, frames, cycles, delay (#64)
* MY3.0:read and write Registers, frames, cycles, delay
* write pattern seems to work
* done all corrections. added default clks: run_clk=125MHz, tick_clk=20MHz (fix), sampling_clk=80MHz (from Carlos)
* clk check for aquistition time
* clk check for aquistition time
* Update slsDetectorServer_defs.h
* Update slsDetectorFunctionList.c
|
2019-09-30 14:36:33 +02:00 |
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8a4a6c7004
|
hvdac location change
|
2019-09-27 16:17:01 +02:00 |
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288b59d292
|
gotthard2 changes for first firmware version
|
2019-09-26 14:10:11 +02:00 |
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21ce0055b2
|
gotthard2: soft limit to list
|
2019-09-03 09:41:54 +02:00 |
|
Marie Andrä
|
4b987abf41
|
Niosmarie (#63)
* HV for Mythen3 server
* HV for mythen3 server
* corrected upstreams
* missing endif
|
2019-09-03 09:36:02 +02:00 |
|
|
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40b62ef5a4
|
recompiled binaries
|
2019-09-02 19:31:36 +02:00 |
|
Dhanya Thattil
|
5bcde789ac
|
Readoutflags (#61)
* WIP
* eiger binary back wih versioning
* fixed readout flag in ctbgui, added speedLevel enum
* ctbgui: fixed a print out error
* ctb readout bug fix
* WIP
* WIP
* WIP
|
2019-09-02 19:27:27 +02:00 |
|
