178 Commits

Author SHA1 Message Date
0afe093afc wip 2021-06-04 12:30:59 +02:00
Erik Fröjdh
2f2fe4dd47
Release of 5.1.0 (#237)
* Setting pattern from memory (#218)

* ToString accepts c-style arrays

* fixed patwait time bug in validation

* Introduced pattern class

* compile for servers too

* Python binding for Pattern

* added scanParameters in Python

* slsReceiver: avoid potential memory leak around Implementation::generalData

* additional constructors for scanPrameters in python

* bugfix: avoid potentital memory leak in receiver if called outside constructor context

* added scanParameters in Python

* additional constructors for scanPrameters in python

* M3defaultpattern (#227)

* default pattern for m3 and moench including Python bindings

* M3settings (#228)

* some changes to compile on RH7 and in the server to load the default chip status register at startup

* Updated mythen3DeectorServer_developer executable with correct initialization at startup

Co-authored-by: Erik Frojdh <erik.frojdh@gmail.com>
Co-authored-by: Anna Bergamaschi <anna.bergamaschi@psi.ch>

* Pattern.h as a public header files (#229)

* fixed buffer overflow but caused by using global instead of local enum

* replacing out of range trimbits with edge values

* replacing dac values that are out of range after interpolation

* updated pybind11 to 2.6.2

* Mythen3 improved synchronization (#231)

Disabling scans for multi module Mythen3, since there is no feedback of the detectors being ready
startDetector first starts the slaves then the master
acquire firs calls startDetector for the slaves then acquire on the master
getMaster to read back from hardware which one is master

* New server for JF to go with the new FW (#232)

* Modified Jungfrau speed settings for HW1.0 - FW fix version 1.1.1, compilation date 210218

* Corrected bug. DBIT clk phase is implemented in both HW version 1.0 and 2.0. Previous version did not update the DBIT phase shift on the configuration of a speed.

* fix for m3 scan with single module

* m3 fw version

* m3 server

* bugfix for bottom when setting quad

* new strategy for finding zmq based on cppzmq



Co-authored-by: Dhanya Thattil <dhanya.thattil@psi.ch>
Co-authored-by: Dhanya Thattil <33750417+thattil@users.noreply.github.com>
Co-authored-by: Alejandro Homs Puron <ahoms@esrf.fr>
Co-authored-by: Anna Bergamaschi <anna.bergamaschi@psi.ch>
Co-authored-by: Xiaoqiang Wang <xiaoqiangwang@gmail.com>
Co-authored-by: lopez_c <carlos.lopez-cuenca@psi.ch>
2021-03-22 14:43:11 +01:00
Dhanya Thattil
f9f50f1d84
M3settings (#228)
* added temp m3 settings files

* renames settings noise to trim

* get threshold for M3

* some changes to compile on RH7 and in the server to load the default chip status register at startup

* Updated mythen3DeectorServer_developer executable with correct initialization at startup

Co-authored-by: Erik Frojdh <erik.frojdh@gmail.com>
Co-authored-by: Anna Bergamaschi <anna.bergamaschi@psi.ch>
2021-01-14 12:34:13 +01:00
5ee95cf811 tests wip 2020-11-17 11:16:34 +01:00
59e12bbed8 tests wip 2020-11-17 10:51:40 +01:00
Dhanya Thattil
a6d696a0f8
Nextframenumber (#215) 2020-11-16 17:26:12 +01:00
Dhanya Thattil
4c4e2ccb6b
Defaultdacs (#214) 2020-11-13 08:31:02 +01:00
b6b9a5d598 updated release notes and changed a few command names, now->runtime, timestamp->frametime, nframes->framecounter, startingfnum->startframenumber 2020-11-12 16:48:49 +01:00
5687bdd6a2 test fix 2020-11-02 18:30:36 +01:00
e7a1960741 test fix 2020-11-02 18:27:10 +01:00
64be2e0297 test fix 2020-11-02 18:23:56 +01:00
66df5fe8ee test fix 2020-11-02 18:17:35 +01:00
Erik Fröjdh
a15d8dd30a
Moving headers into include/sls (#212) 2020-11-02 16:05:28 +01:00
cefddff848 scan trimbits_scan changed to trimbits 2020-10-20 12:31:08 +02:00
a838830090 ran tests and fixed 2020-10-08 15:44:15 +02:00
54ca9f7ebb wip, doc 2020-09-21 17:09:39 +02:00
Erik Frojdh
1fb7352378 added missing unit in test 2020-09-17 12:13:09 +02:00
Erik Frojdh
74edb6a1c1 test for single mod exptime 2020-09-17 11:42:44 +02:00
ffd694eda1 temlist and tempvalues added 2020-08-20 15:16:28 +02:00
eeb386fef5 mythen3: txndelay frame added 2020-08-18 15:27:30 +02:00
d4e11e56ea added drlist and timinglist, moved daclist and settingslist from cmdprozy.cpp to .h 2020-08-14 15:47:39 +02:00
6e67ff9f90 tests 2020-08-04 17:54:40 +02:00
7dfeb987db changing command from vhighvoltage to highvoltage 2020-07-30 11:50:03 +02:00
Erik Frojdh
21c8b77e2c fixed tests 2020-07-24 15:45:21 +02:00
a76ed6d8db tengiga enable 2020-07-17 18:34:23 +02:00
b7cb341ee3 dr 2020-07-17 17:33:43 +02:00
05059c1176 Test 2020-07-03 17:14:45 +02:00
Dhanya Thattil
f5160b0978
exposing receiver thread ids to client (#102)
* exposing receiver thread ids to client

Co-authored-by: Erik Frojdh <erik.frojdh@gmail.com>
2020-06-09 16:18:37 +02:00
ff9811895f WIP 2020-06-05 09:04:32 +02:00
7f6d57d6ba WIP 2020-06-04 17:42:24 +02:00
099805ba8b WIP 2020-06-04 17:02:56 +02:00
1e2a3f2767 WIP 2020-06-04 15:21:53 +02:00
9a8300ca08 WIP 2020-06-04 12:12:40 +02:00
3bdc8e95ce WIP 2020-06-03 16:10:47 +02:00
223e24f924 WIP 2020-06-03 14:56:24 +02:00
4053594c4d WIP 2020-06-03 14:40:51 +02:00
f07e722d26 read/write reg moved to stop server, tests 2020-06-02 11:56:50 +02:00
2ef8f2f046 WIP 2020-05-29 19:36:41 +02:00
294612b03c WIP 2020-05-29 17:04:10 +02:00
f223415f94 fix for testing 2020-05-29 16:26:57 +02:00
8ffb27c300 WIP 2020-05-25 11:05:51 +02:00
0a66605111 tests mainly and minor print 2020-05-22 15:23:56 +02:00
Erik Frojdh
959fd562d3 clang-format 2020-05-04 16:30:00 +02:00
a86ae0cb47 WIP 2020-04-07 12:14:22 +02:00
bdf0f9e2b9 fixed start stop tests 2020-04-07 10:39:50 +02:00
eeed102bf3 somewhere between fork and pipes, crashes at sendingudppacket at print 2020-04-03 20:18:16 +02:00
7c7f7e8c70 testing WIP 2020-04-03 16:20:05 +02:00
262b4b0b16 more tests 2020-03-31 18:19:32 +02:00
f2dd146e56 updates on servers (mainly virtual): indices, dbit clock not allowed for moench anymore 2020-03-31 16:54:35 +02:00
03af145ee8 test delay fix 2020-03-31 13:38:11 +02:00