143 Commits

Author SHA1 Message Date
7b21ce34d6
Dev/document json ctb file format (#1029)
* docs receiver formats rewrite

* added documentation for all the receiver files, updated release notes, udpated help in commands help for timing, fixed by throwing exception for aa dividy by 0 error caused by not freeing memory (detsize) when switching between 1d and 2d detectors, removed unnecessary 'recevier up' printout, fixed dbit list 64 bit mask error in master json file (was not 64 bit before), fixed bug in reading gotthard1 data (needs to be tested)

* generating commands help and formatting, also fix help for trimen command line

* added ctb frame format documentation, added some links to some commands, added documentation about adding expat-devel in installation for rhel8 gui, fixed some indentation issues that screwed up command line help documentation

* added ctb frame format documentation

* updated documentation about zeromq-devel for <8.0.0 versions
2024-11-18 09:52:24 +01:00
06266f3905
gui: hide 'complete image' and just show 'missing packets' when there are missing packets in that image form the receiver (#1014) 2024-10-28 09:39:40 +01:00
0b9fd0664e
setting detsize after hostname should throw also for single module for consistency (#1000)
Co-authored-by: Erik Fröjdh <erik.frojdh@gmail.com>
2024-10-21 16:33:13 +02:00
6add9aad5d
Dev/proper free (#1005)
* first draft of fixing the free function available within the class

* removed class member function freeSharedmemory for both Detector and Module; made the free function freeSharedmemory accessible to python interface; setHostname if there is already a module in shm will recreate the Detector object while freeing shm completely and keeping detsize and intitialchecks (previous commit), sethostname called from DetectorClass in virtual command to have one point of entry (previous commit), testing Module class frees shared memory using free function

* Detector class: added copy and move constructor and assignmentoperators due to explicit destructor (DetectorImpl fwd declared), DetectorImpl class: included ZmqSocket to remove destructor (should not be virtual in any case), Module class: removed explciit destructor to allow compiler generated constructor and operators

* formatting

* minor fix for readme autocomplete

* updated client version date
2024-10-21 16:25:07 +02:00
9c57571a41 formatting 2024-08-20 16:28:09 +02:00
d57643434d
dev: client: status for blocking acquire stop with slave temporarily in waiting (#944)
* acq finish call back gets status squashed with default error but before that need to wait for gotthard slaves to catch up from waiting to stopped
2024-08-15 17:09:36 +02:00
1efd106c6a
developer: blocking acquire stop with slave temporarily in waiting (#926)
* client: stopping a blocking acquire of multi modules checks status to catch slaves that might still be in waiting. Problem is (gotthard2 25um at least) slave is in waiting only temporarily before going go idle/stopped. So a 50ms sleep is necessary ot not throw an unnecessary error

* client: when stopping blocking acquire, wait up to 1s in 50ms increments for slave to stop waiting temporarily
2024-07-16 15:43:31 +02:00
08dc8e3cbb
client bug fix: m3 multi module bad channel file throws bad allocation when modules skipped, needed to add vectors in 2d vector of bad channel list (#920)
Co-authored-by: Erik Fröjdh <erik.frojdh@gmail.com>
2024-07-16 11:59:17 +02:00
3d21bb64c4
Dev/xilinx acq (#901)
* period and exptime(patternwaittime level 0)

* added new regsieterdefs and updated api version and fixedpattern reg

* autogenerate commands

* formatting

* minor

* wip resetflow, readout mode, transceiver mask, transceiver enable

* acquisition, but streaming done bit and busy (exposing + read chip to fifo) not known yet from fw

* programming fpga and device tree done

* most configuration done, need to connect configuretransceiver to client

* stuck at resetting transciever timed out

* minor

* fixed virtual, added chip busyto fifo, streaming busy, set/getnext framenumber

* configuretransceiver from client, added help in client

* make formatt and command generation

* tests for xilinx ctb works

* command generation

* dacs added and tested, power not done

* power added

* added temp_fpga

* binaries in

* ctrlreg is 0 to enable chip=fixed, high dac val = min val= fixed, power regulators in weird order=fixed, device tree could be loaded with dacs before adcs=fixed

* start works

* virtual server sends

* receiver works

* tests

* python function and enum generation, commands generatorn and autocomplete, formatting, tests

* tests fail at start(transceiver not aligned)

* tests passed

* all binaries compiled

* eiger binary in

* added --nomodule cehck for xilinx
2024-02-07 13:23:08 +01:00
9738cb7d74
Xilinx ctb (#884)
* updated registers, arm64

* compiler set to aarch64 for xilinx server

* updated RegisterDefs.h

* merge into generate branch and resolving conflicts and adding the xilinx changes to callerspecial and commands.yaml

* compiles and can print firmware version (using a different csp0 address)

* fixing other servers (gotthard, jungfrau, moench, mythen3) that it returns in case of mapping failure, xilinxctb: added that it checks type, prints proper fw version, checks kernel date, added armprocessor define to use in common places, added specifiers to supress overflow and truncation warnings

* added detector ip and mac adddress to the printout

* fixed tests and recompiled servers
2024-01-04 17:10:16 +01:00
e57cf49c49
Dev: trigger signal issues handled at acquire (#864)
* if blocking and handling sync, only master gets blocking acq, slaves get non blocking as they are first and so dont get status or error caught when slaves dont get trigger (due to not connected etc) and acq returns with slaves still in waiting status. so check status of all in blocking acq

* for all dets with sync, ensure atleast one master when starting acq

* docs updated about sync
2023-11-10 11:38:06 +01:00
01e4bcb47e formatting 2023-11-07 14:52:14 +01:00
ebb352b13a
Dev: : gui acq finished callback for different status (#850)
* fix acquisition finished status to have different status for different modules, but does not have to be error. for eg. jf sync fw (2.4.1 gives idle for master and stopped for slaves when stopping acquiistion)
2023-11-06 16:08:07 +01:00
dad3dc3e46
3. Dev/voltage to power (#816)
* getVoltageList, getVoltage /set, getMeasuredVoltage, getVoltageNames /set, getVoltageIndex moved to 'Power' as its misleading

* added cstdint and names slowadc,  added division to mV

* changed uV to mV in command line slow adc help. removed all python slowadcs (as it was already implemented as slowadc

---------

Co-authored-by: Erik Frojdh <erik.frojdh@gmail.com>
2023-10-02 11:11:28 +02:00
9834b07b47
Dev/fix port size (#805)
* port datatype changing from int to uint16_t
* throwing for -1 given for uint16_t ports
2023-09-28 09:36:39 +02:00
054e733cd5
Voltage and slow adc naming (#772)
* voltages in python 

* added voltage values in cmd line, added voltagelist in detector class

* voltage values in python

* slow adc list
2023-07-10 16:10:23 +02:00
58cdb5bd20
added patfname command to save the file the last pttern was loaded from (#770)
* added patfname command to save the file the last pttern was loaded from
2023-06-22 09:08:48 +02:00
1a338346d5
2. Ctb fname voltage (#768)
* power and sense returning dac indices instead of int in Detector class

* power -> voltage, sense -> slowadc
2023-06-19 16:05:30 +02:00
d3d98db7e9
1. Ctb powerindices (#767)
* power and sense returning dac indices instead of int in Detector class
2023-06-19 15:19:50 +02:00
a7dcfe4b31
Ctb sense power signal names (#759)
*  adc names

* added python functions in src

*  signal, power, sense names

* fix tests
2023-06-07 17:06:41 +02:00
b9a346a396
ctb adc names (#757)
* first draft of adc names

* fixed tests

* formatting

* added python functions in src

---------

Co-authored-by: Erik Fröjdh <erik.frojdh@gmail.com>
2023-05-31 21:07:07 +02:00
6fcb880538
Merge fix from 7.0.2 (#756)
- start acq list: mixup with master pos #743 : fix that only master starts second and not all (for start acq), typo with pos and masters list
- synced master status running when setting to slave  #747: synced master status running when setting to slave
2023-05-25 11:20:41 +02:00
e757e25fa1
merge fix #721 PR (sync 7.0.2.rc) to developer (#739)
* merge fix from #721 PR (sync) 7.0.2.rc -> developer
* row and column for jungfrau mixed up

* multi module jungfrau sync must do slaves first then master for start acquisition and send software trigger, and master first and then slaves for stopacquisition

* non blocking to slaves first and only then blocking/nonblocking to the master for sending software trigger(jungfrau multi mod sync)

* fixed get/set timing jungfrau when sync enabled, getsync during blocking acquire (for trigger or stop) will get stuck as it should ask the stop server

* switching between 1 and 2 interfaces did not set gui/client zmq port properly. Resulted in dummy streaming forever. fixed

* formatting, refactoring: const & for positions, multi mod M3 stop first master first

* adding missing cstdint for gcc 13

* Refactoring handle sync out, handling synchronization also for softwaretrigger for m3, for start/sync/stop for g2/g1

---------

Co-authored-by: Erik Frojdh <erik.frojdh@gmail.com>

* fixed row and col for moench 2 interfaces

* fix moench getTiming and also allow moench to handle sync

---------

Co-authored-by: Erik Frojdh <erik.frojdh@gmail.com>
2023-05-08 15:58:19 +02:00
Dhanya Thattil
b67c6dea08
ensuring no duplicate rx hostname port combo (#604)
* rx_hostname and port combo to one, or hostname to all, or a vector of hostnames and ports, ignoring none or empty, then verifying no duplicates for the host port combo including from shared memory

* extracted function for rx_hostname (#694)

* c++14 revert

* unique hostname-port combo for port, hostname, rx_tcpport (#696)

* verify unique combo for rx_port as well

* check unique hostname-port combo also when setting control port, hostname, rx_hostname and rx_tcpport

---------

Co-authored-by: Erik Fröjdh <erik.frojdh@gmail.com>
Co-authored-by: Erik Frojdh <erik.frojdh@psi.ch>
2023-03-20 12:30:12 +01:00
dc5db905d4 merge from 7.0.0 2023-02-24 10:39:51 +01:00
Dhanya Thattil
da291d535e
fix ctb test, non blocking will not return for 1g (#684)
* fix ctb test, non blocking will not return for 1g
2023-02-22 11:09:18 +01:00
Dhanya Thattil
fe281bd1b1
Fix stop rx stuck (#669)
stop should really stop even if receiver had crashed, so check rx status after sending stop; also ensuring restream  in acquire happens only if thers a callback
2023-02-20 15:21:22 +01:00
Dhanya Thattil
5c8c3ae3f3
fix to access to shared memory that doesnt exist (#638)
* fix to access to shared memory that doesnt exist

* fix for freeing shm and then setting hostname from API

* exception error message moved to private function

* refactoring to avoid allocating intermediate string
2023-02-13 11:29:54 +01:00
4ee4d66977
Jf zeromq display (#644)
* modified ZmqSocket to expose the SO_RCVBUF and SO_SENDBUF parameters. Modified DataStreamer.cpp to change the SENDBUF to 1MB when HWL is <10. Modified Datastreamer.cpp so that when HWL is changed, socket is unbind/rebind. Added rebind to ZmqSocket.cpp.
Changed slot UpdatePlot() in qdrawplot.h from privat tto public, added plot->UpdatePlot() after every axis range change, so the plots are updated immediatly and not at the next image.
Added onlinedisp_zmq program which connects to the receiver ZMQ port and show images and histos. Compiled against  ROOT 6.22/02. Added examples files.

* added setbuffer size also for gui, moved hardcoded values to a macro, removed unnecessary return of ok or success, added actual zmq exception message to could not create sockets error

* zmq: changing buffer size done within hwm

---------

Co-authored-by: mozzanica <l_mozzanica@mpc2012.psi.ch>
Co-authored-by: Dhanya Thattil <dhanya.thattil@psi.ch>
2023-02-09 17:24:28 +01:00
Dhanya Thattil
9ba907f9f7
added none or 0 to unset bad channels (#632)
* added none or 0 to unset bad channels

* free function split to get int array from string of arguments for badchannels

* missed a file

* allowing list for badchannels in command line

* added badchannels in python

* added size check

* more comments in Detector.h and added more tests for facny command line badchannels

* removeDuplicates accept any container, added tests

* corner cases: 1:5,6,7 or 5,6,7 or just 1:5

Co-authored-by: Erik Frojdh <erik.frojdh@gmail.com>
2023-01-27 09:59:31 +01:00
0b17318f10 formatting 2023-01-24 10:37:52 +01:00
Dhanya Thattil
946e6aa817
badchannel segfault for multi module (#620)
* badchannels segfaults when there are no badchannels for next modules, fixed

* added example badchannels

* refactoring casting
2023-01-20 17:39:25 +01:00
Dhanya Thattil
3682644e15
incorrectly using detsize, caught and fixing it in background (#619) 2023-01-19 11:10:05 +01:00
Dhanya Thattil
39b1f5bbf2
Moench rewrite (#597)
* copied jungfrau server to moench and adapted

* fixed image size and num packets

* read n rows allows 16

* commneted out configure_asic_timer at server startup. To be removed later the ASIC_CTRL_REG and storage cell options

* moench:removing the decrement (which was in jf)  in read n rows to register

* removed lblsamples from gui
2022-12-15 09:16:51 +01:00
9154478702 formatting 2022-12-08 09:00:23 +01:00
Dhanya Thattil
a2f41c13b7
fixed clang compiler warnings (#586) 2022-11-25 11:00:02 +01:00
Dhanya Thattil
61c31ed44a
txdelay for all modules (#584)
* setting txdelay for all modules for eiger, jungfrau and m3
* added txdelay in python and renamed txndelay_ to txdelay_
* call in parallel
2022-11-24 11:57:26 +01:00
Dhanya Thattil
d2c4827b31
increasing default rx tcp port (#562)
* increasing rx tcp port by default when creating shm
2022-10-18 15:24:04 +02:00
Dhanya Thattil
7de6f157b5
M3badchannels (#526)
* badchannels for m3 and modify for g2 (file from single and multi)

* m3: invert polarity of bit 7 and 11 signals from setmodule, allow commas in bad channel file

* badchannel file can take commas, colons and comments (also taking care of spaces at the end of channel numbers)

* tests 'badchannels' and 'Channel file reading' added, removing duplicates in badchannel list, defining macro for num counters in client side

* fix segfault when list from file is empty, 

* fix tests assertion for ctbconfig (adding message) for c++11

* fixed badchannels in m3server (clocking in trimming) 

* badchannel tests can be run from any folder (finds the file)
2022-09-01 15:30:04 +02:00
Dhanya Thattil
6bf9dbf6d3
Format (#506)
Formatted package
2022-08-05 15:39:34 +02:00
Dhanya Thattil
4259363169
rxr sls namespace (#457)
* rxr src files and classes (detectordata, ZmqSocket) added to sls namespace

* moving defines inside namespace

* moving defines inside namespace, added helpdacs to namespace

* added namespace to gui

* gui also updated

* removed unnecessary sls:: when already in sls namespace for slsDetectoSoftware, receverSoftware, slsDetectorGui and slsSupportlib
2022-05-18 11:48:38 +02:00
Dhanya Thattil
fcc7f7aef8
Rx roi (#428)
* roi structure expanded to have ymin and ymax

* compile with 'detector roi'

* wip

* wip, rx_roi, rx_clearroi

* wip rxroi

* rxroi wip

* wip rxroi

* merge fix

* wip

* rx_roi works, impl wip, test

* tests in, impl left

* wip, rxroi impl

* wip, rxroi impl

* wip

* setrx_Roi works, getrx_roi, wip

* rx_roi impl done

* wip, rxroi

* wip, getrx_roi rxr ports

* fix ports

* wip

* wip

* fix positions on server side

* wip

* numports wip

* wip

* jungfrau top inner interface row increment

* x, y detpos, wip

* removed eiger row indices flipping in gui (bottom flipping maintained)

* wip

* wip, jungfrau numinterfaces2

* jungfrau virtual works

* eiger, jungfrau, g2 virtual server works

* eiger positions fix, wip

* binaries in

* minor printout

* binaries in

* merge fix

* merge fix

* removing getposition

* setrxroi wip

* set upto port

* get messed, wip

* roi multi to module works, wip

* wip

* roi dont return -1

* added rxroi metadata in master file

* added rxroifromshm, not yet in detector

* rx roi in gui with box, also for gap pixels (gappixels for jungfrau mess)

* fix for segfault in gui with detaching roi box in gui

* wip

* m3 gui: slave timing modes should be discarded when squashing

* fixed m3 virtual data, and fixed counters in gui asthetics

* m3 roi works

* wip, g2

* wip

* handling g225um boards, and showing roi for gainplot as well

* udpate python functions

* fix for 1d and a2d roi written

* fixed actual roi written to file

* no virtual hdf5 when handling rx roi

* test

* minor

* binarie in
2022-05-16 12:35:06 +02:00
Dhanya Thattil
8d6b8d66cc
size of shm needs to be only sometimes checked when opening shared memory (#443) 2022-05-16 12:27:48 +02:00
Dhanya Thattil
0129c2c686
M3: master starts twice (non blocking) part 2 (#445)
* slaves and master vectors empty means all positions included: fixing double acquisition in masters

* debug print out
2022-05-10 15:23:39 +02:00
Dhanya Thattil
f55bdd6eae
M3: master starts twice (non blocking) (#444)
* start acq for master m3 was sent twice (non blocking), removed redundant code, check that there is only one master

* m3 can have more than 1 master (when many master modules used independently)

* fix for singe mod m3 or other dets
2022-05-10 14:27:40 +02:00
Dhanya Thattil
afeee5501c
Fixpositions (#436)
* fix positions on server side

* wip

* numports wip

* wip

* jungfrau top inner interface row increment

* x, y detpos, wip

* removed eiger row indices flipping in gui (bottom flipping maintained)

* wip

* wip, jungfrau numinterfaces2

* jungfrau virtual works

* eiger, jungfrau, g2 virtual server works

* eiger positions fix, wip

* binaries in

* minor printout

* binaries in

* pointer bug

* comment to define test_mod_geometry define
2022-04-28 16:32:26 +02:00
61f38bf5a9 clearer error message for unknown detector type when hostname error 2022-04-04 13:10:27 +02:00
Erik Fröjdh
e55e18d5e9
Refactoring of SharedMemory.h (#418)
Function names match Detector.h
Removed double print due to LOG then throw
file descriptor not kept as a member variable
2022-03-28 16:13:56 +02:00
Erik Fröjdh
1ff35edb99
Setting dac names for CTB (C++ and Python) (#413)
# Setting DAC names for CTB
* Introduced new shared memory for CTB only
* Prepared for additional functionality 
* Works from C++ and Python

Co-authored-by: Dhanya Thattil <dhanya.thattil@psi.ch>
2022-03-28 14:27:47 +02:00
9ff43efdc5 Merge branch 'developer' into numudp 2022-03-25 10:50:51 +01:00