173 Commits

Author SHA1 Message Date
a287ce46b1 WIP doc 2020-08-19 17:13:39 +02:00
9bae97ec4c doc update, 1st trial 2020-08-19 16:37:21 +02:00
eeb386fef5 mythen3: txndelay frame added 2020-08-18 15:27:30 +02:00
d4e11e56ea added drlist and timinglist, moved daclist and settingslist from cmdprozy.cpp to .h 2020-08-14 15:47:39 +02:00
28ffad223d update comment on api, move updaterxratecorrection to the right setexptime 2020-08-14 11:22:41 +02:00
380b062216 configure mac 2020-08-04 16:55:31 +02:00
885b22eca8 ratecorrectiosn addded to master file 2020-07-31 18:38:27 +02:00
74a7ca9b71 gotthard2: vetophoton now has gain thresholds for each row and the get writes to file gain indices and adu for each channel, adus written in dec instead of hex, veto file in server removed and uses vetophoton instead 2020-07-29 13:24:42 +02:00
a76ed6d8db tengiga enable 2020-07-17 18:34:23 +02:00
b7cb341ee3 dr 2020-07-17 17:33:43 +02:00
67bb0dff1a rx_zmqstartfnum, not tested 2020-07-16 12:18:18 +02:00
ca298580f3 badchannels done 2020-07-15 18:24:17 +02:00
d7f490701b confadc added to client, removed conf adc depending on burst mode 2020-07-15 13:30:30 +02:00
7752b86d97 veto file in 2020-07-14 18:51:47 +02:00
35dbc3813d filter and cds gain, burst and continuous value to asic changed, bug fix to scanning function addresses in server_funcs.c 2020-07-14 17:09:51 +02:00
95089b5faa WIP 2020-07-03 16:06:12 +02:00
93c5505285 WIP 2020-07-02 13:42:32 +02:00
a656668d73 WIP 2020-07-01 20:00:36 +02:00
902366fede inbetween WIP, startstatemachien ugly 2020-06-26 19:08:03 +02:00
ba7f54744b doc warnings fixed 2020-06-23 17:32:56 +02:00
301073e60b WIP 2020-06-23 10:53:17 +02:00
7cc05ead89 WIP 2020-06-18 12:41:10 +02:00
a57f7943ee WIP 2020-06-17 18:30:25 +02:00
1f3fd010a7 reordering WIP 2020-06-17 15:25:59 +02:00
Dhanya Thattil
f5160b0978
exposing receiver thread ids to client (#102)
* exposing receiver thread ids to client

Co-authored-by: Erik Frojdh <erik.frojdh@gmail.com>
2020-06-09 16:18:37 +02:00
099805ba8b WIP 2020-06-04 17:02:56 +02:00
1e2a3f2767 WIP 2020-06-04 15:21:53 +02:00
9a8300ca08 WIP 2020-06-04 12:12:40 +02:00
4053594c4d WIP 2020-06-03 14:40:51 +02:00
c6ff50d753 merge vetoheader 2020-05-29 10:50:33 +02:00
8aa7144252 mythen3: fix of external signals to not allow master output inversion, but can edge detect not configurable, and default dout pulse length 2020-05-28 13:09:09 +02:00
Erik Frojdh
e2eb1598d3 jf stuff 2020-05-28 09:28:53 +02:00
46daa7e2de merge from developer (mythen3 branch) 2020-05-27 14:19:33 +02:00
9493ae3da9 WIP 2020-05-27 11:30:47 +02:00
d71e40729a external signals 2020-05-20 17:05:42 +02:00
cd90f09a30 WIP 2020-05-19 18:24:32 +02:00
ecc692ad9a start pattern without binaries 2020-05-15 17:06:08 +02:00
eea67014b7 gotthard2 with veto data on second interface 2020-05-13 17:50:18 +02:00
13c1f7c2d6 WIP 2020-05-08 16:31:26 +02:00
1a75170eed mythen3: set trimbits (not settings, threshold yet), set all trimbits 2020-05-07 16:04:30 +02:00
Erik Frojdh
959fd562d3 clang-format 2020-05-04 16:30:00 +02:00
Dhanya Thattil
d58eb1dc6e
Gappixels (#89)
* WIP

* WIP virtual delays, imagetest for saturation

* WIP, vertical and horizontal

* WIP

* gap pixels work, fixed 32 bit data out (10gbe=0) for virtual servers

* quad works (also in virtual), handling gappixels and quad

* jungfrau gapppixels work

* jungfrau: done

* complete image or missing packets given in json header and gui

* eiger virtual 4 bit mode bug fix

* working version of zmq add json header, except printout

* printout bug

* fix for json para

* to map WIP

* map done

* map print , mapwith result left

* json result works, testing added

* updated server binaries

* compiling on rhels7, variable size char array iniitalization

* zmqsocket parsing didnt need Document

* const to map, json para is strings not map

* json add header: mapping cleaner without insert make_pair
2020-03-30 14:54:35 +02:00
16d5321885 rx_hostname can be added with port and also concatenated 2020-03-19 14:06:16 +01:00
Erik Frojdh
6809bd6567 removed header 2020-03-12 12:38:00 +01:00
Erik Frojdh
f940397e3a cleaning 2020-03-11 18:10:37 +01:00
Dhanya Thattil
c64b09ee79
Jungfraufix (#84)
* jungfrau: added dbitphase, different pll clkindex 0 with different wr bit
2020-03-04 17:06:18 +01:00
7859cf78e9 moench: allow power chip 2020-03-04 10:41:10 +01:00
8abc32e7f1 moench: default pattern file in server, settings, tests 2020-03-03 16:00:01 +01:00
6bbcf6173d moench: first version 2020-03-02 18:34:10 +01:00
Dhanya Thattil
11e7737a2f
gotthard2: timingsource and currentsource features, (timing source external yet to be implemented in fpga to test (#80) 2020-02-28 12:45:02 +01:00