Commit Graph

85 Commits

Author SHA1 Message Date
maliakal_d 210bc32e46 wip 2021-09-01 17:11:04 +02:00
maliakal_d 25d03f949e partialread changed to readnrows 2021-08-31 16:46:49 +02:00
maliakal_d 62d697e91f readnlines->partialread, better debugging for TCP socket interface bug 2021-08-13 12:34:50 +02:00
maliakal_d 252f5a3e7b eiger fix for status idle in blocking trigger, readyfortrigger is not up indefinitely, so have to look at status 2021-07-27 16:31:34 +02:00
maliakal_d 69b04cc4f8 minor 2021-07-21 14:11:58 +02:00
maliakal_d 3bee03bb3a minor 2021-07-21 14:11:27 +02:00
maliakal_d 1e1c799223 eiger quad server: set and reset chip signals before and after trimming 2021-07-21 14:05:28 +02:00
maliakal_d dd8082da0b wip 2021-06-28 17:41:02 +02:00
maliakal_d 60d726b379 wip 2021-06-28 17:36:38 +02:00
maliakal_d ca02d4b007 wip 2021-06-28 17:27:25 +02:00
maliakal_d 343e881a3f wip 2021-06-28 17:26:09 +02:00
maliakal_d c0aaa94587 wip 2021-06-28 17:24:27 +02:00
maliakal_d 5177ed74e5 wip 2021-06-28 17:20:37 +02:00
maliakal_d 4a4fbddb79 wip 2021-06-28 17:07:09 +02:00
maliakal_d f8c2da3c83 wip 2021-06-28 16:44:45 +02:00
maliakal_d 18fe63f594 wip 2021-06-28 13:32:44 +02:00
maliakal_d 0a0e9bf490 wip 2021-06-25 17:20:16 +02:00
maliakal_d 3394d8659b wip 2021-06-25 17:18:50 +02:00
maliakal_d 9746875014 wip 2021-06-25 17:16:08 +02:00
maliakal_d 8b22b5dbe7 wip 2021-06-25 17:13:40 +02:00
maliakal_d a097687a69 wip 2021-06-25 17:07:53 +02:00
maliakal_d 1360fbac87 eiger: block trigger till next wait for trigger and give error if it wasnt ready when trigger sent 2021-06-25 16:56:48 +02:00
maliakal_d bdfd151a01 wip 2021-06-25 16:54:01 +02:00
maliakal_d bbb2473387 wip 2021-06-25 16:46:07 +02:00
maliakal_d b296109513 wip 2021-06-25 16:41:00 +02:00
maliakal_d 0d01de451a wip 2021-06-25 16:24:26 +02:00
maliakal_d 69be046131 wip 2021-06-24 17:56:07 +02:00
maliakal_d e110bfd5a7 usleep between sending frames and stop acquisition assures complete frames, require firmware update to remove usleep 2021-06-16 11:11:04 +02:00
maliakal_d ceeb4400a0 removing send complete frames fromstop acquisition 2021-06-16 10:25:49 +02:00
maliakal_d 370fe4628a wip 2021-06-15 16:56:16 +02:00
maliakal_d 74903314ce wip 2021-06-15 16:31:29 +02:00
maliakal_d 994f0a71a6 wip 2021-06-15 16:27:09 +02:00
maliakal_d b11f6c56e7 getmaster through stop server, allowing stopacq to first go to slave for eiger, eiger stop to first check reg value to send complete frames before calling stop 2021-06-15 12:59:54 +02:00
maliakal_d 130613f730 fix for stopacq 2021-06-15 11:48:38 +02:00
maliakal_d 4de8234478 eiger stop sends last frame, software or firmwarebug 2021-06-09 15:04:48 +02:00
maliakal_d 08a588bb01 wip: eiger stop acquisition send complete frmes 2021-06-09 12:31:26 +02:00
maliakal_d 9e32c746cd WIP 2021-06-07 16:43:39 +02:00
maliakal_d 1b068cdf2d wip 2021-06-07 15:06:34 +02:00
maliakal_d 48cef99e62 eiger blocking trigger WIP, new fw, 3 bits: 1 for exp, 1 for falling exp toggle, 1 for rising exp toggle 2021-06-07 15:00:06 +02:00
maliakal_d 6949e22bf8 wip 2021-06-04 16:52:48 +02:00
maliakal_d 28c1e2491b wip 2021-06-04 16:52:19 +02:00
maliakal_d b5790983ce wip 2021-06-04 16:31:51 +02:00
maliakal_d 0afe093afc wip 2021-06-04 12:30:59 +02:00
maliakal_d 81aa8c9ac5 wip 2021-06-04 10:15:37 +02:00
maliakal_d cf5d2cd97e WIP 2021-06-02 17:05:40 +02:00
maliakal_d cf7828e0ce eiger server: blocking software trigger 2021-06-02 16:59:20 +02:00
Erik Fröjdh 2f2fe4dd47 Release of 5.1.0 (#237)
* Setting pattern from memory (#218)

* ToString accepts c-style arrays

* fixed patwait time bug in validation

* Introduced pattern class

* compile for servers too

* Python binding for Pattern

* added scanParameters in Python

* slsReceiver: avoid potential memory leak around Implementation::generalData

* additional constructors for scanPrameters in python

* bugfix: avoid potentital memory leak in receiver if called outside constructor context

* added scanParameters in Python

* additional constructors for scanPrameters in python

* M3defaultpattern (#227)

* default pattern for m3 and moench including Python bindings

* M3settings (#228)

* some changes to compile on RH7 and in the server to load the default chip status register at startup

* Updated mythen3DeectorServer_developer executable with correct initialization at startup

Co-authored-by: Erik Frojdh <erik.frojdh@gmail.com>
Co-authored-by: Anna Bergamaschi <anna.bergamaschi@psi.ch>

* Pattern.h as a public header files (#229)

* fixed buffer overflow but caused by using global instead of local enum

* replacing out of range trimbits with edge values

* replacing dac values that are out of range after interpolation

* updated pybind11 to 2.6.2

* Mythen3 improved synchronization (#231)

Disabling scans for multi module Mythen3, since there is no feedback of the detectors being ready
startDetector first starts the slaves then the master
acquire firs calls startDetector for the slaves then acquire on the master
getMaster to read back from hardware which one is master

* New server for JF to go with the new FW (#232)

* Modified Jungfrau speed settings for HW1.0 - FW fix version 1.1.1, compilation date 210218

* Corrected bug. DBIT clk phase is implemented in both HW version 1.0 and 2.0. Previous version did not update the DBIT phase shift on the configuration of a speed.

* fix for m3 scan with single module

* m3 fw version

* m3 server

* bugfix for bottom when setting quad

* new strategy for finding zmq based on cppzmq



Co-authored-by: Dhanya Thattil <dhanya.thattil@psi.ch>
Co-authored-by: Dhanya Thattil <33750417+thattil@users.noreply.github.com>
Co-authored-by: Alejandro Homs Puron <ahoms@esrf.fr>
Co-authored-by: Anna Bergamaschi <anna.bergamaschi@psi.ch>
Co-authored-by: Xiaoqiang Wang <xiaoqiangwang@gmail.com>
Co-authored-by: lopez_c <carlos.lopez-cuenca@psi.ch>
2021-03-22 14:43:11 +01:00
maliakal_d e91420bd16 locking in list 2020-09-18 11:23:57 +02:00
maliakal_d adb6171e35 eiger server: more checks for feb interface reg readouts 2020-08-31 18:22:16 +02:00
maliakal_d 973b8f7106 eiger server: more checks for feb interface reg readouts 2020-08-31 18:19:56 +02:00