170 Commits

Author SHA1 Message Date
Mazzoleni Alice Francesca
6740d9b363 alignedData now uses std::align_alloc 2025-04-09 09:20:05 +02:00
ddb89bce34 Merge branch 'dev/issue_dont_reorder_digital_data' of github.com:slsdetectorgroup/slsDetectorPackage into dev/issue_dont_reorder_digital_data 2025-03-19 08:24:33 +01:00
f056f9d31b reserved enough size in the fifo buffer to reorder all added proper 4 byte alignment 2025-03-18 21:42:34 +01:00
d9a50705e4
Merge pull request #1148 from slsdetectorgroup/dev/cmd_for_ctb_reorder
Some checks failed
CMake / Configure and build using cmake (push) Failing after 1m19s
Dev/cmd for ctb reorder
2025-03-17 17:10:52 +01:00
e0a48e1e75 implemented proper alignment in reorder function before casting to uint64_t ptr 2025-03-17 15:39:31 +01:00
ec4eb1978e merge fix from dev/issue_dont_reorder_digital_data 2025-03-17 15:28:22 +01:00
0a5b5aac4b added unit tests for dataprocessor rearranging functions 2025-03-14 14:04:55 +01:00
6e5b058fc1 merge fix 2025-03-13 13:17:54 +01:00
ace2b3a938 Merge branch 'dev/issue_dont_reorder_digital_data' into dev/cmd_for_ctb_reorder 2025-03-13 13:16:29 +01:00
bd66228b30 minor to check workflow 2025-03-13 11:14:01 +01:00
e8ac048114 ctb: added command 'rx_dbitreorder' that sets a flag in the receiver to set the reorder flag. By default it is 1. Setting to false means 'do not reorder' and to keep what the board spits out, which is that all signals in a sample are grouped together 2025-03-12 17:31:20 +01:00
3c79e8d7b2 trailing bits are removed even if reorder false and bitlist empty 2025-03-12 16:38:18 +01:00
a74fb2bcd1 added function Reorder 2025-03-12 16:12:00 +01:00
8d87a6ee4e used clang-formating 2025-03-11 16:32:31 +01:00
23aa9c2814 added reorder variable, changed function ArrangeDBitData to support reordering and no reordering. Moved transceiver data such that it is contiguous with rearranged digital data 2025-03-11 12:07:10 +01:00
297c3752e3
Dev/remove gotthard i (#1108)
* slsSupportLib done, at receiver rooting out in implementation

* removed from receiver and client

* removed everywhere except gui, python and client(commands.yaml and Detector.h)

* updated python

* fixed autocomplete to print what the issue is if there is one with ToString when running the autocomplete script to generate fixed.json. updated readme.md in generator folder

* formatting

* removed enums for dacs

* udpating autocomplete and generating commands

* removed gotthard from docs and release notes

* removed dac test

* bug from removing g1

* fixed virtual test for xilinx, was minor. so in this PR

* gui done

* binary in merge fix

* formatting and removing enums

* updated fixed and dump.json

* bash autocomplete

* updated doc on command line generation

* removing increments in dac enums for backward compatibility. Not required

* removed ROI from rxParameters  (only in g1), not needed to be backward compatible

* removed the phase shift option from det server staruip
2025-03-10 14:24:33 +01:00
a44ba4dc35
Dev/rx callbacks (#966)
* changed rxr callback signatures to all include structs
* removed datamodify call back as size can be changed in the original data call back now
* bringing some parameters (set functions) to dataProcessor class for its callback (namely udpport, quad, fliprows, totalframes, jsonheader), resulting in also removing totalframes from 2 other function signatures

* updated MultiReceiverApp to reflect the new callback signatures
2024-09-30 16:30:13 +02:00
3d21bb64c4
Dev/xilinx acq (#901)
* period and exptime(patternwaittime level 0)

* added new regsieterdefs and updated api version and fixedpattern reg

* autogenerate commands

* formatting

* minor

* wip resetflow, readout mode, transceiver mask, transceiver enable

* acquisition, but streaming done bit and busy (exposing + read chip to fifo) not known yet from fw

* programming fpga and device tree done

* most configuration done, need to connect configuretransceiver to client

* stuck at resetting transciever timed out

* minor

* fixed virtual, added chip busyto fifo, streaming busy, set/getnext framenumber

* configuretransceiver from client, added help in client

* make formatt and command generation

* tests for xilinx ctb works

* command generation

* dacs added and tested, power not done

* power added

* added temp_fpga

* binaries in

* ctrlreg is 0 to enable chip=fixed, high dac val = min val= fixed, power regulators in weird order=fixed, device tree could be loaded with dacs before adcs=fixed

* start works

* virtual server sends

* receiver works

* tests

* python function and enum generation, commands generatorn and autocomplete, formatting, tests

* tests fail at start(transceiver not aligned)

* tests passed

* all binaries compiled

* eiger binary in

* added --nomodule cehck for xilinx
2024-02-07 13:23:08 +01:00
9834b07b47
Dev/fix port size (#805)
* port datatype changing from int to uint16_t
* throwing for -1 given for uint16_t ports
2023-09-28 09:36:39 +02:00
71489b7106
2. Set row col (#779)
* set row and column
2023-07-18 15:51:22 +02:00
c628ae2192
1. Ctb transceiver ro (#773)
*  transceiverenable, tsamples, romode for tranceiver and digital_transceiver

* 202 spec instr only for transceiver mode

* removed check for empty in trans readout and clean memory before reading from fifo

* ctb read fifo strobe for all after reading all channels, adding 1us after selecting channel, changing fw date

* updated 10gb transceiver enable

----
* added transceiver (tsamples, romode(transceiver, digital_transceiver), transceiverenable (mask)

* clean memory before reading from fifo (for analog and digital as well)

* read fifo then read strobe (also corresp fw) fixes number of reads (also for analg and digital)-> increases all pipelines by 1

* fixed bug in rearranging digital data in receiver

* fixed bug in streaming size of data after rearranging

* fixed bug in setbit, clearbit,and getbit

* status checks fifo before returning idle (transmitting if data in fifo if transceiver more enabled)

* soem matterhorn specifics that will need to be put into pattern in a month or two. this is temporary.

* NOTE: breaking api. rxParameters struct has transceiverenabel and tsamples given from det to receiver
2023-07-14 16:29:21 +02:00
6f50707cfb
when dbit list is enabled, the size of data in zmq stream is changed to only the digital bits enabled size. now fixed to also include analog size (#764)
Co-authored-by: Erik Fröjdh <erik.frojdh@gmail.com>
2023-06-15 09:19:01 +02:00
Dhanya Thattil
39b1f5bbf2
Moench rewrite (#597)
* copied jungfrau server to moench and adapted

* fixed image size and num packets

* read n rows allows 16

* commneted out configure_asic_timer at server startup. To be removed later the ASIC_CTRL_REG and storage cell options

* moench:removing the decrement (which was in jf)  in read n rows to register

* removed lblsamples from gui
2022-12-15 09:16:51 +01:00
Dhanya Thattil
6bf9dbf6d3
Format (#506)
Formatted package
2022-08-05 15:39:34 +02:00
Dhanya Thattil
89e293cb5a
Rxpointers (#504)
* gui message doesnt show if it has a '>' symbol in error msg

* minor refactoring for readability (size_t calc fifo size)

* refactoring listening udp socket code: activated and datastream dont create udp sockets anyway, rc<=- should be discarded in any case

* wip

* refactoring memory structure access

* wip: bugfix write header + data to binary

* wip

* wip

* wip

* wip

* wip

* wip

* wip

* wip

* wip

* portRoi no roi effecto on progress

* fail at receiver progress, wip

* segfaults for char pointer in struct

* reference to header to get header and data

* refactoring

* use const defined for size of header of fifo

* updated release notes

* remove pointer in callback for sls_receiver_header pointer

* rx same name arguments in constructors

* rx: same name arguments in constructor

* rx: removing the '_' suffix in class data members

* wip

* wip

* wip

* wip

* wip

* wip

* wip

* wip

* wip

* wip

* diff undo for clang later

* wip

* Wip

* const string&
2022-08-05 09:08:18 +02:00
Dhanya Thattil
9ac8dab8af
Rxclassmembers (#503)
* gui message doesnt show if it has a '>' symbol in error msg

* minor refactoring for readability (size_t calc fifo size)

* refactoring listening udp socket code: activated and datastream dont create udp sockets anyway, rc<=- should be discarded in any case

* wip

* refactoring memory structure access

* wip: bugfix write header + data to binary

* wip

* wip

* wip

* wip

* wip

* wip

* wip

* wip

* wip

* portRoi no roi effecto on progress

* fail at receiver progress, wip

* segfaults for char pointer in struct

* reference to header to get header and data

* refactoring

* use const defined for size of header of fifo

* updated release notes

* remove pointer in callback for sls_receiver_header pointer

* rx same name arguments in constructors

* rx: same name arguments in constructor

* rx: removing the '_' suffix in class data members

* merge fix

* merge fix

* review fix refactoring
2022-07-25 14:02:11 +02:00
Dhanya Thattil
d132ad8d02
Callback rxheader (#502)
* gui message doesnt show if it has a '>' symbol in error msg

* minor refactoring for readability (size_t calc fifo size)

* refactoring listening udp socket code: activated and datastream dont create udp sockets anyway, rc<=- should be discarded in any case

* wip

* refactoring memory structure access

* wip: bugfix write header + data to binary

* wip

* wip

* wip

* wip

* wip

* wip

* wip

* wip

* wip

* portRoi no roi effecto on progress

* fail at receiver progress, wip

* segfaults for char pointer in struct

* reference to header to get header and data

* refactoring

* use const defined for size of header of fifo

* updated release notes

* remove pointer in callback for sls_receiver_header pointer

* passing reference header for callback instead of copying it
2022-07-22 16:15:21 +02:00
Dhanya Thattil
4117cda79b
Rx: refactor memory structure and listener (#496)
* gui message doesnt show if it has a '>' symbol in error msg

* minor refactoring for readability (size_t calc fifo size)

* refactoring listening udp socket code: activated and datastream dont create udp sockets anyway, rc<=- should be discarded in any case

* wip

* refactoring memory structure access

* wip: bugfix write header + data to binary

* wip

* wip

* wip

* wip

* wip

* wip

* wip

* wip

* wip

* portRoi no roi effecto on progress

* fail at receiver progress, wip

* segfaults for char pointer in struct

* reference to header to get header and data

* refactoring

* use const defined for size of header of fifo

* updated release notes

* refactoring from review: fwrite, static_cast
2022-07-22 15:32:41 +02:00
Dhanya Thattil
5be50785fb
rx noRoi should not create files for port (#499) 2022-07-14 10:09:48 +02:00
Dhanya Thattil
8ca8185d41
H5 one dataset name (#484)
* rename all datasets in hdf5 files to just 'data'

* removing the global qualifier H5

* update release notes
2022-06-09 12:35:33 +02:00
Dhanya Thattil
89aa0760c6
Hdf5fix (#483)
* hdf5 fix for string reference

* fix hdf5 compilation after namespace change
2022-06-09 11:42:32 +02:00
Dhanya Thattil
4259363169
rxr sls namespace (#457)
* rxr src files and classes (detectordata, ZmqSocket) added to sls namespace

* moving defines inside namespace

* moving defines inside namespace, added helpdacs to namespace

* added namespace to gui

* gui also updated

* removed unnecessary sls:: when already in sls namespace for slsDetectoSoftware, receverSoftware, slsDetectorGui and slsSupportlib
2022-05-18 11:48:38 +02:00
Dhanya Thattil
fcc7f7aef8
Rx roi (#428)
* roi structure expanded to have ymin and ymax

* compile with 'detector roi'

* wip

* wip, rx_roi, rx_clearroi

* wip rxroi

* rxroi wip

* wip rxroi

* merge fix

* wip

* rx_roi works, impl wip, test

* tests in, impl left

* wip, rxroi impl

* wip, rxroi impl

* wip

* setrx_Roi works, getrx_roi, wip

* rx_roi impl done

* wip, rxroi

* wip, getrx_roi rxr ports

* fix ports

* wip

* wip

* fix positions on server side

* wip

* numports wip

* wip

* jungfrau top inner interface row increment

* x, y detpos, wip

* removed eiger row indices flipping in gui (bottom flipping maintained)

* wip

* wip, jungfrau numinterfaces2

* jungfrau virtual works

* eiger, jungfrau, g2 virtual server works

* eiger positions fix, wip

* binaries in

* minor printout

* binaries in

* merge fix

* merge fix

* removing getposition

* setrxroi wip

* set upto port

* get messed, wip

* roi multi to module works, wip

* wip

* roi dont return -1

* added rxroi metadata in master file

* added rxroifromshm, not yet in detector

* rx roi in gui with box, also for gap pixels (gappixels for jungfrau mess)

* fix for segfault in gui with detaching roi box in gui

* wip

* m3 gui: slave timing modes should be discarded when squashing

* fixed m3 virtual data, and fixed counters in gui asthetics

* m3 roi works

* wip, g2

* wip

* handling g225um boards, and showing roi for gainplot as well

* udpate python functions

* fix for 1d and a2d roi written

* fixed actual roi written to file

* no virtual hdf5 when handling rx roi

* test

* minor

* binarie in
2022-05-16 12:35:06 +02:00
Erik Fröjdh
e9dc3d8c38
minor changes (#429)
Various small changes to the data processor
2022-04-07 14:39:26 +02:00
Dhanya Thattil
62418c1316
sls_receiver_header* in callbacks (#425)
* char* to sls_receiver_header* in receiver data call backs

* uint32_t to size_t in callbacks

* string to const std::string & for callbacks
2022-04-07 10:19:47 +02:00
e1988bf088 fixes 2022-03-30 16:47:43 +02:00
8ce6868e46 fixed compilation 2022-03-29 16:13:33 +02:00
f5cca7a98f removed binary master file as well 2022-03-29 13:30:06 +02:00
b9aa0f46e4 wip, hdf5 refactored 2022-03-29 13:02:57 +02:00
6cd780ae99 wip 2022-03-29 11:49:30 +02:00
f2be834d55 wip, binary file refactored for stringbuffer, hdf5 mid way, masterattributes to be de (inherited) :) 2022-03-28 17:43:58 +02:00
0f02ffdc9a binary master json done, hdf5 left wip 2022-03-25 13:29:03 +01:00
fc21a6763d fix and minor removing comments 2022-03-23 12:03:51 +01:00
fd8e1b2ef7 merge fix 2022-03-23 11:42:16 +01:00
a1ee681135 - framescaught and frameindex now returns a vector for each port
- progress looks at activated or enabled ports, so progress does not stagnate
- (eiger) disable datastreaming also for virtual servers only for 10g
- missing packets also takes care of disabled ports
2022-02-24 11:15:03 +01:00
f228fde6f7 including stride and block for selecting hyperslab 2022-02-07 14:01:19 +01:00
20f3fb19af g25 option passed to hdf5 2022-02-04 15:09:18 +01:00
ae9691e848 removing warnings, hdfmutexlib moved from class member in dataprocessor to just arguments when required in dataprocessor (setupfilewriter and createvirtualfile) 2022-01-05 15:20:06 +01:00
dac60ad76d added .cpp licenses 2021-10-15 15:47:04 +02:00
46a8a2461c Removed Padding option for Deactivated half modules. 2021-10-06 15:11:17 +02:00