80b053eb10
binaries resolved, merge conflict from developer
2020-09-10 10:19:34 +02:00
52303daffd
binaries in
2020-09-09 16:44:23 +02:00
a9d1a78662
m3:smp_clk (timing rxr) changed back to clk div 5
2020-09-09 15:55:13 +02:00
3cf2160a2d
binaries in
2020-09-09 15:25:48 +02:00
82e978e901
WIP
2020-09-09 13:47:54 +02:00
b33fdf4462
merge conflict fixed and merged with developer
2020-09-09 12:31:36 +02:00
6c8443f09e
binaries in
2020-09-09 12:14:38 +02:00
bdac4d133e
conflict solved and merged with developer
2020-09-09 10:27:14 +02:00
Dhanya Thattil
e8156d412e
G2: continuous internal mode ( #167 )
2020-09-09 10:13:15 +02:00
87bad38f80
binary in
2020-09-08 15:46:32 +02:00
e1e04ee755
binaries in
2020-09-08 15:18:07 +02:00
8496f5715f
binaries in
2020-09-08 11:55:17 +02:00
f26d8e514b
merged with g2continuous
2020-09-08 08:46:37 +02:00
0b9ff70244
binaries in
2020-09-08 08:25:24 +02:00
f280d033b9
binarie sin
2020-09-07 16:44:48 +02:00
891b8dbd2c
mythen3: wrong hardware version number, so it didnt reboot after programfpga
2020-09-03 17:04:58 +02:00
658a804cca
gotthard2: change default clock divider of readout clocks 1 and 2 from 8 to 6
2020-09-02 16:48:58 +02:00
00978a52c8
added smp_clk, changed rdo vco freq from 1.25GHz to 1GHz, changed rdo clock dividers
2020-09-01 12:06:39 +02:00
8400c686b5
binaries in
2020-08-31 18:22:41 +02:00
Dhanya Thattil
4e9c99d65d
Merge branch 'developer' into m3txndelay
2020-08-18 15:58:32 +02:00
Dhanya Thattil
dd918fb326
eiger deactivate beb functions ( #140 )
...
eiger: some deactivated beb functions should return a value instead of accessng beb
2020-08-18 15:52:52 +02:00
7ea86dec43
m3 binaries in
2020-08-18 15:28:30 +02:00
0c7759d7e4
formatting
2020-08-11 17:09:36 +02:00
27b2a607c8
binaries in
2020-08-10 12:05:37 +02:00
8e2bd17704
updated client script
2020-08-10 12:04:31 +02:00
d56b2134ef
updated client versions
2020-08-10 09:58:57 +02:00
bbf8ab4b88
binary in
2020-08-05 09:49:13 +02:00
321ed13659
merge from developer
2020-08-04 17:43:38 +02:00
bb3951c201
binaries in
2020-08-04 16:57:06 +02:00
d25f9093d5
binary in
2020-08-04 12:02:37 +02:00
6f5635a402
gotthard2: vetoref taken as decimal and not hex in server
2020-07-30 12:03:36 +02:00
f358492e09
all binaries in
2020-07-29 16:53:21 +02:00
54ad92a2bf
binarires in
2020-07-29 13:26:55 +02:00
df3ae7f409
gotthard2: reversing order of adc channels to chip
2020-07-28 15:08:13 +02:00
410f38c804
jungfrau calibrated settings in
2020-07-28 09:26:20 +02:00
3b0f68c3c4
gotthard2: fix of ext burst mode global settings
2020-07-23 17:05:43 +02:00
Erik Frojdh
5faf3c7336
format
2020-07-23 14:01:59 +02:00
Dhanya Thattil
ad297e9c51
Readlink ( #117 )
...
* gotthard config file path using readlink
* gotthard2
* eiger
* eieger, mnythen3, moench
* binaries in
* moved readlink to a common function
* binaries in
2020-07-23 12:17:46 +02:00
023924c4cc
updatd gotthard2 module id for new hdi
2020-07-22 11:22:58 +02:00
b46809e1c0
binaries in
2020-07-20 17:36:55 +02:00
2d68b61f00
binaries recompiled
2020-07-17 12:59:37 +02:00
ae9499047b
powerpc and nios binaries in
2020-07-16 16:36:49 +02:00
8dd9bb6ea3
blackfin binaries
2020-07-16 16:21:00 +02:00
293fda0c7a
mythen3, gotthard2: bug fix- changing wrong pll phases when changing frequency
2020-07-13 15:47:43 +02:00
42b7f6fa7c
binary in
2020-07-08 11:35:46 +02:00
28b3fb4101
binaries
2020-07-03 17:15:24 +02:00
c5a9ff3024
binaries in
2020-07-02 15:53:57 +02:00
3156e6f50e
binaries
2020-07-01 13:13:52 +02:00
ccf54f29b6
binaries
2020-07-01 12:52:31 +02:00
e571f7bb3e
WIP
2020-07-01 09:10:49 +02:00
