Dhanya Maliakal
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12348ac76c
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merge conflict fix
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2017-12-01 09:20:44 +01:00 |
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Dhanya Maliakal
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18422ce215
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setbit and clear bit moved to slsdet, readreg, writereg,setbit,clearbit in multi cannot give -1, instead api gives error if checked
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2017-12-01 09:18:42 +01:00 |
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Dhanya Maliakal
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5b88203bd9
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merge conflict from 3.0.1 to restream stop from recieveR
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2017-11-30 19:05:35 +01:00 |
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Dhanya Maliakal
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ca855e6d39
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restream stop from receiver
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2017-11-30 18:37:11 +01:00 |
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Dhanya Maliakal
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428855d801
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in between
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2017-11-17 14:02:00 +01:00 |
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Dhanya Maliakal
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51499fa503
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merge conflict from 3.0.1
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2017-11-17 11:35:02 +01:00 |
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Dhanya Maliakal
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7dee07b9c5
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somewhere
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2017-11-16 09:12:54 +01:00 |
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Dhanya Maliakal
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956625bb50
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Merge branch '3.0' into developer
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2017-11-15 10:35:20 +01:00 |
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Dhanya Maliakal
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6d6133be59
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Merge branch '3.0' into zmqseparate
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2017-11-15 10:34:30 +01:00 |
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Dhanya Maliakal
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dd1cf42a73
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proper fix for settings, including dacs
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2017-11-14 17:51:13 +01:00 |
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Dhanya Maliakal
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dda86cfe9b
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somewhere in separating zmq rxr and client
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2017-11-14 16:26:17 +01:00 |
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Dhanya Maliakal
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6ff249c3f2
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Merge branch 'developer' into gappixels
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2017-10-27 16:18:52 +02:00 |
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Dhanya Maliakal
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7ff23b25b3
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merge bug fix of set module
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2017-10-27 16:16:29 +02:00 |
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Dhanya Maliakal
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1420921291
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Merge branch '3.0' into 3.0.1
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2017-10-27 15:47:15 +02:00 |
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Dhanya Maliakal
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92f988ddc1
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somewhere
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2017-10-27 14:00:57 +02:00 |
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Dhanya Maliakal
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4260dc0baf
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conflict resolution
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2017-10-03 15:18:56 +02:00 |
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Dhanya Maliakal
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0f302e3446
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conflict resolution
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2017-10-03 15:17:15 +02:00 |
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Dhanya Maliakal
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812606a7b4
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conflict resolution with developer
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2017-10-03 15:12:49 +02:00 |
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Dhanya Maliakal
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34f10b382e
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one more conflict resolved from mergin with 3.0.1 (silent mode, this had changes for zmq source ip)
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2017-10-03 15:01:30 +02:00 |
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Dhanya Maliakal
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03a2f979a9
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fixing merge conflict in error_Defs
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2017-10-03 14:32:30 +02:00 |
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Dhanya Maliakal
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bb817733ff
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changes upto the receiver, not incl gui
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2017-10-03 10:44:05 +02:00 |
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Dhanya Maliakal
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af98d2bb53
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added silent mode in receiver during real time acquisition, doesnt print packet loss regularly or file name created each time
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2017-09-27 10:09:02 +02:00 |
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Dhanya Maliakal
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49378e6d09
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added streamsrcip command to be able to change the interface from which receiver streams data from
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2017-09-12 14:33:11 +02:00 |
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Dhanya Maliakal
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e8d83a085f
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moved receiver start to status start and to startandreadall (acquire), parallelized status start, moved prepare and clean up to multi level and called by start and stop receiver for gotthard, moench and propix
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2017-08-10 18:46:10 +02:00 |
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Dhanya Maliakal
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f084efd263
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sending and writing subexptime in the receiver files, adding 0x in front of all numbers printed in command line which is hexa
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2017-08-10 17:25:18 +02:00 |
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Dhanya Maliakal
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e3667f6827
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can set zmqport from receiver
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2017-07-13 12:18:07 +02:00 |
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Dhanya Maliakal
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c2980b3c44
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changes for setting threshold without trimbits for eiger
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2017-06-28 10:24:07 +02:00 |
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Dhanya Maliakal
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5176ad521f
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merged with annas, removed a <<< head merge conflict
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2017-06-14 11:36:44 +02:00 |
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|
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cbbdd8eeab
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Merged to developer
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2017-06-13 15:30:33 +02:00 |
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|
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8caab4e562
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Modicfications for chiptestboard and moench03 module
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2017-06-13 15:28:45 +02:00 |
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Dhanya Maliakal
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132a9bbfe9
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solved many bugs, but cannot get data in eiger
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2017-06-09 16:02:58 +02:00 |
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Dhanya Maliakal
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c755a8974c
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done, but need to compile
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2017-06-09 11:42:25 +02:00 |
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Dhanya Maliakal
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0254ff0281
|
cleaning up of servers
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2017-06-02 19:29:34 +02:00 |
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Dhanya Maliakal
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7e00d9f395
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Merge branch 'developer' into hdf5
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2017-03-03 10:06:34 +01:00 |
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|
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f12df80c5b
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some changes for chiptest board and mythen server now compiles
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2017-02-23 12:05:34 +01:00 |
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Dhanya Maliakal
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19460a03f5
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sending position id and num detectors in x and y dir
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2017-02-21 15:13:27 +01:00 |
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Dhanya Maliakal
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9b3f4a3a66
|
commonFiles/error_defs.h
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2017-02-03 14:34:05 +01:00 |
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Dhanya Maliakal
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87ce1ed736
|
moved tau to settings file, removed gain and offset, setting threshold loads settings file, setting threshold only sets client variable
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2017-02-03 12:29:44 +01:00 |
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|
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987aeda6fb
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sorted out problem with CPU read out
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2016-12-22 17:24:53 +01:00 |
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|
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68b13a0ecd
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merged to developer
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2016-12-19 12:26:53 +01:00 |
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|
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12cd3d07a2
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some changes for jctb
|
2016-12-19 12:05:59 +01:00 |
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Dhanya Maliakal
|
ebf44704b2
|
merged error defs
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2016-12-19 11:39:14 +01:00 |
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Dhanya Maliakal
|
bd1601c2eb
|
fixwed the printing of errors but not error message
|
2016-12-19 11:37:14 +01:00 |
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Dhanya Maliakal
|
d555bc6e75
|
fixwed the printing of errors but not error message
|
2016-12-19 11:33:16 +01:00 |
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Dhanya Maliakal
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e7621a6cd0
|
moving towards c++ api
|
2016-12-12 14:24:11 +01:00 |
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Dhanya Maliakal
|
466f1506a5
|
bottom is defined as flippeddatax in config file, not anymore as argument for receiver
|
2016-11-30 10:36:34 +01:00 |
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Dhanya Maliakal
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c639477f28
|
adding exptime to receiver for file header
|
2016-11-14 11:57:29 +01:00 |
|
Dhanya Maliakal
|
44d6b0ffc0
|
fixed time interval in receiveR
|
2016-11-10 14:37:18 +01:00 |
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|
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cb879c61ca
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changes for new chipterboard -now works with reduced dynamic range and analog/digital readout
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2016-11-09 11:36:59 +01:00 |
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Dhanya Maliakal
|
4b99ff7fbe
|
reset fpga implemented, changed receiver configuration warning prints, powerchip implemented
|
2016-11-03 12:31:34 +01:00 |
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