* client: stopping a blocking acquire of multi modules checks status to catch slaves that might still be in waiting. Problem is (gotthard2 25um at least) slave is in waiting only temporarily before going go idle/stopped. So a 50ms sleep is necessary ot not throw an unnecessary error
* client: when stopping blocking acquire, wait up to 1s in 50ms increments for slave to stop waiting temporarily
* period and exptime(patternwaittime level 0)
* added new regsieterdefs and updated api version and fixedpattern reg
* autogenerate commands
* formatting
* minor
* wip resetflow, readout mode, transceiver mask, transceiver enable
* acquisition, but streaming done bit and busy (exposing + read chip to fifo) not known yet from fw
* programming fpga and device tree done
* most configuration done, need to connect configuretransceiver to client
* stuck at resetting transciever timed out
* minor
* fixed virtual, added chip busyto fifo, streaming busy, set/getnext framenumber
* configuretransceiver from client, added help in client
* make formatt and command generation
* tests for xilinx ctb works
* command generation
* dacs added and tested, power not done
* power added
* added temp_fpga
* binaries in
* ctrlreg is 0 to enable chip=fixed, high dac val = min val= fixed, power regulators in weird order=fixed, device tree could be loaded with dacs before adcs=fixed
* start works
* virtual server sends
* receiver works
* tests
* python function and enum generation, commands generatorn and autocomplete, formatting, tests
* tests fail at start(transceiver not aligned)
* tests passed
* all binaries compiled
* eiger binary in
* added --nomodule cehck for xilinx
* updated registers, arm64
* compiler set to aarch64 for xilinx server
* updated RegisterDefs.h
* merge into generate branch and resolving conflicts and adding the xilinx changes to callerspecial and commands.yaml
* compiles and can print firmware version (using a different csp0 address)
* fixing other servers (gotthard, jungfrau, moench, mythen3) that it returns in case of mapping failure, xilinxctb: added that it checks type, prints proper fw version, checks kernel date, added armprocessor define to use in common places, added specifiers to supress overflow and truncation warnings
* added detector ip and mac adddress to the printout
* fixed tests and recompiled servers
* if blocking and handling sync, only master gets blocking acq, slaves get non blocking as they are first and so dont get status or error caught when slaves dont get trigger (due to not connected etc) and acq returns with slaves still in waiting status. so check status of all in blocking acq
* for all dets with sync, ensure atleast one master when starting acq
* docs updated about sync
* fix acquisition finished status to have different status for different modules, but does not have to be error. for eg. jf sync fw (2.4.1 gives idle for master and stopped for slaves when stopping acquiistion)
* getVoltageList, getVoltage /set, getMeasuredVoltage, getVoltageNames /set, getVoltageIndex moved to 'Power' as its misleading
* added cstdint and names slowadc, added division to mV
* changed uV to mV in command line slow adc help. removed all python slowadcs (as it was already implemented as slowadc
---------
Co-authored-by: Erik Frojdh <erik.frojdh@gmail.com>
- start acq list: mixup with master pos #743 : fix that only master starts second and not all (for start acq), typo with pos and masters list
- synced master status running when setting to slave #747: synced master status running when setting to slave
* merge fix from #721 PR (sync) 7.0.2.rc -> developer
* row and column for jungfrau mixed up
* multi module jungfrau sync must do slaves first then master for start acquisition and send software trigger, and master first and then slaves for stopacquisition
* non blocking to slaves first and only then blocking/nonblocking to the master for sending software trigger(jungfrau multi mod sync)
* fixed get/set timing jungfrau when sync enabled, getsync during blocking acquire (for trigger or stop) will get stuck as it should ask the stop server
* switching between 1 and 2 interfaces did not set gui/client zmq port properly. Resulted in dummy streaming forever. fixed
* formatting, refactoring: const & for positions, multi mod M3 stop first master first
* adding missing cstdint for gcc 13
* Refactoring handle sync out, handling synchronization also for softwaretrigger for m3, for start/sync/stop for g2/g1
---------
Co-authored-by: Erik Frojdh <erik.frojdh@gmail.com>
* fixed row and col for moench 2 interfaces
* fix moench getTiming and also allow moench to handle sync
---------
Co-authored-by: Erik Frojdh <erik.frojdh@gmail.com>
* rx_hostname and port combo to one, or hostname to all, or a vector of hostnames and ports, ignoring none or empty, then verifying no duplicates for the host port combo including from shared memory
* extracted function for rx_hostname (#694)
* c++14 revert
* unique hostname-port combo for port, hostname, rx_tcpport (#696)
* verify unique combo for rx_port as well
* check unique hostname-port combo also when setting control port, hostname, rx_hostname and rx_tcpport
---------
Co-authored-by: Erik Fröjdh <erik.frojdh@gmail.com>
Co-authored-by: Erik Frojdh <erik.frojdh@psi.ch>
stop should really stop even if receiver had crashed, so check rx status after sending stop; also ensuring restream in acquire happens only if thers a callback
* fix to access to shared memory that doesnt exist
* fix for freeing shm and then setting hostname from API
* exception error message moved to private function
* refactoring to avoid allocating intermediate string
* modified ZmqSocket to expose the SO_RCVBUF and SO_SENDBUF parameters. Modified DataStreamer.cpp to change the SENDBUF to 1MB when HWL is <10. Modified Datastreamer.cpp so that when HWL is changed, socket is unbind/rebind. Added rebind to ZmqSocket.cpp.
Changed slot UpdatePlot() in qdrawplot.h from privat tto public, added plot->UpdatePlot() after every axis range change, so the plots are updated immediatly and not at the next image.
Added onlinedisp_zmq program which connects to the receiver ZMQ port and show images and histos. Compiled against ROOT 6.22/02. Added examples files.
* added setbuffer size also for gui, moved hardcoded values to a macro, removed unnecessary return of ok or success, added actual zmq exception message to could not create sockets error
* zmq: changing buffer size done within hwm
---------
Co-authored-by: mozzanica <l_mozzanica@mpc2012.psi.ch>
Co-authored-by: Dhanya Thattil <dhanya.thattil@psi.ch>
* added none or 0 to unset bad channels
* free function split to get int array from string of arguments for badchannels
* missed a file
* allowing list for badchannels in command line
* added badchannels in python
* added size check
* more comments in Detector.h and added more tests for facny command line badchannels
* removeDuplicates accept any container, added tests
* corner cases: 1:5,6,7 or 5,6,7 or just 1:5
Co-authored-by: Erik Frojdh <erik.frojdh@gmail.com>
* copied jungfrau server to moench and adapted
* fixed image size and num packets
* read n rows allows 16
* commneted out configure_asic_timer at server startup. To be removed later the ASIC_CTRL_REG and storage cell options
* moench:removing the decrement (which was in jf) in read n rows to register
* removed lblsamples from gui
* badchannels for m3 and modify for g2 (file from single and multi)
* m3: invert polarity of bit 7 and 11 signals from setmodule, allow commas in bad channel file
* badchannel file can take commas, colons and comments (also taking care of spaces at the end of channel numbers)
* tests 'badchannels' and 'Channel file reading' added, removing duplicates in badchannel list, defining macro for num counters in client side
* fix segfault when list from file is empty,
* fix tests assertion for ctbconfig (adding message) for c++11
* fixed badchannels in m3server (clocking in trimming)
* badchannel tests can be run from any folder (finds the file)
* roi structure expanded to have ymin and ymax
* compile with 'detector roi'
* wip
* wip, rx_roi, rx_clearroi
* wip rxroi
* rxroi wip
* wip rxroi
* merge fix
* wip
* rx_roi works, impl wip, test
* tests in, impl left
* wip, rxroi impl
* wip, rxroi impl
* wip
* setrx_Roi works, getrx_roi, wip
* rx_roi impl done
* wip, rxroi
* wip, getrx_roi rxr ports
* fix ports
* wip
* wip
* fix positions on server side
* wip
* numports wip
* wip
* jungfrau top inner interface row increment
* x, y detpos, wip
* removed eiger row indices flipping in gui (bottom flipping maintained)
* wip
* wip, jungfrau numinterfaces2
* jungfrau virtual works
* eiger, jungfrau, g2 virtual server works
* eiger positions fix, wip
* binaries in
* minor printout
* binaries in
* merge fix
* merge fix
* removing getposition
* setrxroi wip
* set upto port
* get messed, wip
* roi multi to module works, wip
* wip
* roi dont return -1
* added rxroi metadata in master file
* added rxroifromshm, not yet in detector
* rx roi in gui with box, also for gap pixels (gappixels for jungfrau mess)
* fix for segfault in gui with detaching roi box in gui
* wip
* m3 gui: slave timing modes should be discarded when squashing
* fixed m3 virtual data, and fixed counters in gui asthetics
* m3 roi works
* wip, g2
* wip
* handling g225um boards, and showing roi for gainplot as well
* udpate python functions
* fix for 1d and a2d roi written
* fixed actual roi written to file
* no virtual hdf5 when handling rx roi
* test
* minor
* binarie in
* start acq for master m3 was sent twice (non blocking), removed redundant code, check that there is only one master
* m3 can have more than 1 master (when many master modules used independently)
* fix for singe mod m3 or other dets
# Setting DAC names for CTB
* Introduced new shared memory for CTB only
* Prepared for additional functionality
* Works from C++ and Python
Co-authored-by: Dhanya Thattil <dhanya.thattil@psi.ch>
- progress looks at activated or enabled ports, so progress does not stagnate
- (eiger) disable datastreaming also for virtual servers only for 10g
- missing packets also takes care of disabled ports
