mirror of
https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2025-06-13 05:17:13 +02:00
25 um server using a config.txt file
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@ -55,6 +55,16 @@ int masterMode=NO_MASTER, syncMode=NO_SYNCHRONIZATION, timingMode=AUTO_TIMING;
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enum externalSignalFlag signals[4]={EXT_SIG_OFF, EXT_SIG_OFF, EXT_SIG_OFF, EXT_SIG_OFF};
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//for the 25um detectors
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int masterflags = NO_MASTER;
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int masterdefaultdelay = 62;
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int patternphase = 0;
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int adcphase = 0;
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int slavepatternphase = 0;
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int slaveadcphase = 0;
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int rsttosw1delay = 2;
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#ifdef MCB_FUNCS
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extern const int nChans;
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extern const int nChips;
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@ -230,6 +240,134 @@ u_int32_t bus_r(u_int32_t offset) {
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}
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void setMasterSlaveConfiguration(){
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/*
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int masterflags = NO_MASTER;
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int masterdefaultdelay = 62;
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int patternphase = 0;
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int adcphase = 0;
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int slavepatternphase = 0;
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int slaveadcphase = 0;
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int sw1torstdelay = 2;
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*/
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// global master default delay picked from config file
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FILE* fd=fopen(CONFIG_FILE,"r");
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if(fd==NULL){
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cprintf(RED,"\nWarning: Could not open file\n");
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return;
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}
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cprintf(BLUE,"config file %s opened\n", CONFIG_FILE);
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char key[256];
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char value[256];
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char line[256];
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int ival=0;
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u_int32_t val=0;
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while (fgets(line, sizeof(line), fd)) {
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if(line[0] == '#')
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continue;
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sscanf(line, "%s %s\n", key, value);
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if (!strcasecmp(key,"masterflags")) {
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if (!strcasecmp(value,"is_master")) {
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masterflags = IS_MASTER;
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}
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else if (!strcasecmp(value,"is_slave")) {
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masterflags = IS_SLAVE;
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}
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else if (!strcasecmp(value,"no_master")){
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masterflags = NO_MASTER;
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}
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else {
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cprintf(RED,"could not scan masterflags %s value from config file\n",value);
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exit(EXIT_FAILURE);
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}
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}
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else {
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if(sscanf(value,"%d",&ival)<=0) {
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cprintf(RED,"could not scan patternphase %s value from config file\n",value);
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exit(EXIT_FAILURE);
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}
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if (!strcasecmp(key,"masterdefaultdelay"))
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masterdefaultdelay = ival;
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else if (!strcasecmp(key,"patternphase"))
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patternphase = ival;
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else if (!strcasecmp(key,"adcphase"))
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adcphase = ival;
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else if (!strcasecmp(key,"slavepatternphase"))
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slavepatternphase = ival;
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else if (!strcasecmp(key,"slaveadcphase"))
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slaveadcphase = ival;
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else if (!strcasecmp(key,"rsttosw1delay"))
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rsttosw1delay = ival;
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else {
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cprintf(RED,"could not scan parameter name %s from config file\n",key);
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exit(EXIT_FAILURE);
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}
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}
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}
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cprintf(BLUE, "masterflags: %d\n"
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"masterdefaultdelay:%d\n"
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"patternphase:%d\n"
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"adcphase:%d\n"
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"slavepatternphase:%d\n"
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"slaveadcphase:%d\n"
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"rsttosw1delay:%d\n",
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masterflags,
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masterdefaultdelay,
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patternphase,
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adcphase,
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slavepatternphase,
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slaveadcphase,
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rsttosw1delay);
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if (masterflags == IS_MASTER) {
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// set delay
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setDelay(0);
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/* Set pattern phase for the master module */
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val=bus_r(MULTI_PURPOSE_REG);
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val = (val & (~(PLL_CLK_SEL_MSK))) | PLL_CLK_SEL_MASTER_VAL;
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bus_w(MULTI_PURPOSE_REG,val);
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setPhaseShift(patternphase);
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/* Set adc phase for the master module */
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val=bus_r(MULTI_PURPOSE_REG);
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val = (val & (~(PLL_CLK_SEL_MSK))) | PLL_CLK_SEL_MASTER_ADC_VAL;
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bus_w(MULTI_PURPOSE_REG,val);
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setPhaseShift(adcphase);
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/* Set pattern phase for the slave module */
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val=bus_r(MULTI_PURPOSE_REG);
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val = (val & (~(PLL_CLK_SEL_MSK))) | PLL_CLK_SEL_SLAVE_VAL;
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bus_w(MULTI_PURPOSE_REG,val);
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setPhaseShift(slavepatternphase);
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/* Set adc phase for the slave module */
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val=bus_r(MULTI_PURPOSE_REG);
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val = (val & (~(PLL_CLK_SEL_MSK))) | PLL_CLK_SEL_SLAVE_ADC_VAL;
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bus_w(MULTI_PURPOSE_REG,val);
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setPhaseShift(slaveadcphase);
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}
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if (masterflags == IS_MASTER || masterflags == IS_SLAVE) {
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val=bus_r(MULTI_PURPOSE_REG);
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//#ifdef VERBOSE
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printf("Value of multipurpose reg:%d\n",bus_r(MULTI_PURPOSE_REG));
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//#endif
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val = (val & (~(RST_TO_SW1_DELAY_MSK))) | ((rsttosw1delay << RST_TO_SW1_DELAY_OFFSET) & (RST_TO_SW1_DELAY_MSK));
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bus_w(MULTI_PURPOSE_REG,val);
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}
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fclose(fd);
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}
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int setPhaseShiftOnce(){
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u_int32_t addr, reg;
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int i;
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@ -258,6 +396,31 @@ int setPhaseShiftOnce(){
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}
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int setPhaseShift(int numphaseshift){
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u_int32_t addr, reg;
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int i;
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addr=MULTI_PURPOSE_REG;
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reg=bus_r(addr);
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#ifdef VERBOSE
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printf("Multipurpose reg:%x\n",reg);
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#endif
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printf("\nImplementing phase shift of %d\n",numphaseshift);
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for (i=0;i<numphaseshift;i++) {
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bus_w(addr,reg | PHASE_STEP_BIT);
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bus_w(addr,reg & (~PHASE_STEP_BIT));
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}
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#ifdef VERBOSE
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printf("Multipupose reg now:%x\n",bus_r(addr));
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#endif
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return OK;
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}
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int cleanFifo(){
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u_int32_t addr, reg, val;
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@ -926,9 +1089,19 @@ int64_t getPeriod(){
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int64_t setDelay(int64_t value){
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/* time is in ns */
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if (value!=-1) {
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if (masterflags == IS_MASTER) {
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value += masterdefaultdelay;
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cprintf(BLUE,"Actual delay for master: %lld\n", (long long int) value);
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}
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value*=(1E-9*CLK_FREQ);
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}
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return set64BitReg(value,SET_DELAY_LSB_REG, SET_DELAY_MSB_REG)/(1E-9*CLK_FREQ);
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int64_t retval = set64BitReg(value,SET_DELAY_LSB_REG, SET_DELAY_MSB_REG)/(1E-9*CLK_FREQ);
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if (masterflags == IS_MASTER) {
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cprintf(BLUE,"Actual delay read from master: %lld\n", (long long int) retval);
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retval -= masterdefaultdelay;
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}
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return retval;
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}
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int64_t getDelay(){
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