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jungfrau: adcphase values nad dbit values done for new boards

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maliakal_d
2020-03-06 17:49:22 +01:00
parent 0a596c689b
commit f255becffe
4 changed files with 24 additions and 9 deletions
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21
slsDetectorServers/jungfrauDetectorServer/slsDetectorServer_defs.h
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@ -4,8 +4,8 @@
#define MIN_REQRD_VRSN_T_RD_API 0x171220
#define REQRD_FRMWRE_VRSN_BOARD2 0x200304
#define REQRD_FRMWRE_VRSN 0x190708
#define REQRD_FRMWRE_VRSN_BOARD2 0x190716 // old
#define REQRD_FRMWRE_VRSN 0x200304 // new
#define CTRL_SRVR_INIT_TIME_US (300 * 1000)
@ -108,16 +108,21 @@ enum CLKINDEX {RUN_CLK, ADC_CLK, DBIT_CLK, NUM_CLOCKS};
#define ADC_PORT_INVERT_VAL (0x5A5A5A5A)
#define ADC_PORT_INVERT_BOARD2_VAL (0x453b2a9c)
#define SAMPLE_ADC_FULL_SPEED (SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_0_VAL + SAMPLE_DGTL_SAMPLE_3_VAL + SAMPLE_DECMT_FACTOR_FULL_VAL) // 0x300
#define SAMPLE_ADC_HALF_SPEED (SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_1_VAL + SAMPLE_DGTL_SAMPLE_6_VAL + SAMPLE_DECMT_FACTOR_HALF_VAL) // 0x1610
#define SAMPLE_ADC_QUARTER_SPEED (SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_3_VAL + SAMPLE_DGTL_SAMPLE_11_VAL + SAMPLE_DECMT_FACTOR_QUARTER_VAL) // 0x2b30
#define SAMPLE_ADC_FULL_SPEED (SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_0_VAL + SAMPLE_DGTL_SAMPLE_2_VAL + SAMPLE_DECMT_FACTOR_FULL_VAL) // 0x200
#define SAMPLE_ADC_HALF_SPEED (SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_1_VAL + SAMPLE_DGTL_SAMPLE_3_VAL + SAMPLE_DECMT_FACTOR_HALF_VAL) // 0x1310
#define SAMPLE_ADC_QUARTER_SPEED (SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_3_VAL + SAMPLE_DGTL_SAMPLE_6_VAL + SAMPLE_DECMT_FACTOR_QUARTER_VAL) // 0x2630
#define SAMPLE_ADC_HALF_SPEED_BOARD2 (SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_0_VAL + SAMPLE_DGTL_SAMPLE_6_VAL + SAMPLE_DECMT_FACTOR_HALF_VAL) // 0x1600
#define SAMPLE_ADC_QUARTER_SPEED_BOARD2 (SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_1_VAL + SAMPLE_DGTL_SAMPLE_11_VAL + SAMPLE_DECMT_FACTOR_QUARTER_VAL) // 0x2b10
#define ADC_PHASE_FULL_SPEED (0x1E) //30
#define ADC_PHASE_HALF_SPEED (0x1E) //30
#define ADC_PHASE_QUARTER_SPEED (0x1E) //30
#define ADC_PHASE_FULL_SPEED (29)
#define ADC_PHASE_HALF_SPEED (35)
#define ADC_PHASE_QUARTER_SPEED (35)
#define ADC_PHASE_HALF_SPEED_BOARD2 (0x1E) //30
#define ADC_PHASE_QUARTER_SPEED_BOARD2 (0x1E) //30
#define DBIT_PHASE_FULL_SPEED (37)
#define DBIT_PHASE_HALF_SPEED (37)
#define DBIT_PHASE_QUARTER_SPEED (37)
#define DBIT_PHASE_HALF_SPEED_BOARD2 (37)
#define DBIT_PHASE_QUARTER_SPEED_BOARD2 (37)