diff --git a/slsDetectorServers/jungfrauDetectorServer/bin/jungfrauDetectorServer_developer b/slsDetectorServers/jungfrauDetectorServer/bin/jungfrauDetectorServer_developer
index 19351a61c..ad220c5f6 100755
Binary files a/slsDetectorServers/jungfrauDetectorServer/bin/jungfrauDetectorServer_developer and b/slsDetectorServers/jungfrauDetectorServer/bin/jungfrauDetectorServer_developer differ
diff --git a/slsDetectorServers/jungfrauDetectorServer/slsDetectorFunctionList.c b/slsDetectorServers/jungfrauDetectorServer/slsDetectorFunctionList.c
index f99a81fb0..6f05c0339 100755
--- a/slsDetectorServers/jungfrauDetectorServer/slsDetectorFunctionList.c
+++ b/slsDetectorServers/jungfrauDetectorServer/slsDetectorFunctionList.c
@@ -1323,6 +1323,7 @@ int setClockDivider(enum CLKINDEX ind, int val) {
 	uint32_t adcOfst = 0;
 	uint32_t sampleAdcSpeed = 0;
 	uint32_t adcPhase = 0;
+	uint32_t dbitPhase = 0;
 	uint32_t config = CONFIG_FULL_SPEED_40MHZ_VAL;
 
 	switch(val) {
@@ -1336,6 +1337,7 @@ int setClockDivider(enum CLKINDEX ind, int val) {
 		adcOfst = ADC_OFST_FULL_SPEED_VAL;
 		sampleAdcSpeed = SAMPLE_ADC_FULL_SPEED;
 		adcPhase = ADC_PHASE_FULL_SPEED;
+		dbitPhase = DBIT_PHASE_FULL_SPEED;
 		config = CONFIG_FULL_SPEED_40MHZ_VAL;
 		break;
 	
@@ -1344,6 +1346,7 @@ int setClockDivider(enum CLKINDEX ind, int val) {
 		adcOfst = isHardwareVersion2() ? ADC_OFST_HALF_SPEED_BOARD2_VAL : ADC_OFST_HALF_SPEED_VAL;
 		sampleAdcSpeed = isHardwareVersion2() ? SAMPLE_ADC_HALF_SPEED_BOARD2 : SAMPLE_ADC_HALF_SPEED;
 		adcPhase = isHardwareVersion2() ? ADC_PHASE_HALF_SPEED_BOARD2 : ADC_PHASE_HALF_SPEED;
+		dbitPhase = isHardwareVersion2() ? DBIT_PHASE_HALF_SPEED_BOARD2 : DBIT_PHASE_HALF_SPEED;
 		config = CONFIG_HALF_SPEED_20MHZ_VAL;
 		break;
 	
@@ -1352,6 +1355,7 @@ int setClockDivider(enum CLKINDEX ind, int val) {
 		adcOfst = isHardwareVersion2() ? ADC_OFST_QUARTER_SPEED_BOARD2_VAL : ADC_OFST_QUARTER_SPEED_VAL;
 		sampleAdcSpeed = isHardwareVersion2() ? SAMPLE_ADC_QUARTER_SPEED_BOARD2 : SAMPLE_ADC_QUARTER_SPEED;
 		adcPhase = isHardwareVersion2() ? ADC_PHASE_QUARTER_SPEED_BOARD2 : ADC_PHASE_QUARTER_SPEED;
+		dbitPhase = isHardwareVersion2() ? DBIT_PHASE_QUARTER_SPEED_BOARD2 : DBIT_PHASE_QUARTER_SPEED;
 		config = CONFIG_QUARTER_SPEED_10MHZ_VAL;
 		break;
 	
@@ -1371,6 +1375,12 @@ int setClockDivider(enum CLKINDEX ind, int val) {
 
 	setPhase(ADC_CLK, adcPhase, 0);
 	FILE_LOG(logINFO, ("\tSet ADC Phase Reg to %d\n", adcPhase));
+
+	// only implemented in the new boards now
+	if (!isHardwareVersion2()) {
+		setPhase(DBIT_CLK, dbitPhase, 0);
+		FILE_LOG(logINFO, ("\tSet DBIT Phase Reg to %d\n", dbitPhase));
+	}
 	
 	return OK;
 }
diff --git a/slsDetectorServers/jungfrauDetectorServer/slsDetectorServer_defs.h b/slsDetectorServers/jungfrauDetectorServer/slsDetectorServer_defs.h
index 00606adfc..0f28add49 100755
--- a/slsDetectorServers/jungfrauDetectorServer/slsDetectorServer_defs.h
+++ b/slsDetectorServers/jungfrauDetectorServer/slsDetectorServer_defs.h
@@ -4,8 +4,8 @@
 
 
 #define MIN_REQRD_VRSN_T_RD_API     0x171220
-#define REQRD_FRMWRE_VRSN_BOARD2    0x200304
-#define REQRD_FRMWRE_VRSN     		0x190708
+#define REQRD_FRMWRE_VRSN_BOARD2    0x190716 // old
+#define REQRD_FRMWRE_VRSN     		0x200304 // new
 
 #define CTRL_SRVR_INIT_TIME_US      (300 * 1000)
 
@@ -108,16 +108,21 @@ enum CLKINDEX               {RUN_CLK, ADC_CLK, DBIT_CLK, NUM_CLOCKS};
 #define ADC_PORT_INVERT_VAL         		(0x5A5A5A5A)
 #define ADC_PORT_INVERT_BOARD2_VAL         	(0x453b2a9c)
 
-#define SAMPLE_ADC_FULL_SPEED				(SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_0_VAL + SAMPLE_DGTL_SAMPLE_3_VAL + SAMPLE_DECMT_FACTOR_FULL_VAL) // 0x300
-#define SAMPLE_ADC_HALF_SPEED	 			(SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_1_VAL + SAMPLE_DGTL_SAMPLE_6_VAL + SAMPLE_DECMT_FACTOR_HALF_VAL) // 0x1610
-#define SAMPLE_ADC_QUARTER_SPEED 			(SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_3_VAL + SAMPLE_DGTL_SAMPLE_11_VAL + SAMPLE_DECMT_FACTOR_QUARTER_VAL)	// 0x2b30 
+#define SAMPLE_ADC_FULL_SPEED				(SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_0_VAL + SAMPLE_DGTL_SAMPLE_2_VAL + SAMPLE_DECMT_FACTOR_FULL_VAL) // 0x200
+#define SAMPLE_ADC_HALF_SPEED	 			(SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_1_VAL + SAMPLE_DGTL_SAMPLE_3_VAL + SAMPLE_DECMT_FACTOR_HALF_VAL) // 0x1310
+#define SAMPLE_ADC_QUARTER_SPEED 			(SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_3_VAL + SAMPLE_DGTL_SAMPLE_6_VAL + SAMPLE_DECMT_FACTOR_QUARTER_VAL)	// 0x2630 
 #define SAMPLE_ADC_HALF_SPEED_BOARD2 	 	(SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_0_VAL + SAMPLE_DGTL_SAMPLE_6_VAL + SAMPLE_DECMT_FACTOR_HALF_VAL) // 0x1600
 #define SAMPLE_ADC_QUARTER_SPEED_BOARD2  	(SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_1_VAL + SAMPLE_DGTL_SAMPLE_11_VAL + SAMPLE_DECMT_FACTOR_QUARTER_VAL)	// 0x2b10 
 
-#define ADC_PHASE_FULL_SPEED 				(0x1E) //30
-#define ADC_PHASE_HALF_SPEED 				(0x1E) //30
-#define ADC_PHASE_QUARTER_SPEED 			(0x1E) //30
+#define ADC_PHASE_FULL_SPEED 				(29) 
+#define ADC_PHASE_HALF_SPEED 				(35) 
+#define ADC_PHASE_QUARTER_SPEED 			(35) 
 #define ADC_PHASE_HALF_SPEED_BOARD2 		(0x1E) //30
 #define ADC_PHASE_QUARTER_SPEED_BOARD2 		(0x1E) //30
 
 
+#define DBIT_PHASE_FULL_SPEED 				(37) 
+#define DBIT_PHASE_HALF_SPEED 				(37) 
+#define DBIT_PHASE_QUARTER_SPEED 			(37) 
+#define DBIT_PHASE_HALF_SPEED_BOARD2 		(37) 
+#define DBIT_PHASE_QUARTER_SPEED_BOARD2 	(37) 
diff --git a/slsSupportLib/include/versionAPI.h b/slsSupportLib/include/versionAPI.h
index 04aafabad..753523dd3 100644
--- a/slsSupportLib/include/versionAPI.h
+++ b/slsSupportLib/include/versionAPI.h
@@ -5,8 +5,8 @@
 #define APIGUI 0x200227
 #define APICTB 0x200305
 #define APIGOTTHARD 0x200305
-#define APIJUNGFRAU 0x200305
 #define APIMYTHEN3 0x200305
 #define APIEIGER 0x200305
 #define APIGOTTHARD2 0x200305
 #define APIMOENCH 0x200306
+#define APIJUNGFRAU 0x200306