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Merge branch 'developer' of github.com:slsdetectorgroup/slsDetectorPackage into developer

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bergamaschi 2018-01-30 10:25:21 +01:00
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312
manual/manual-client/Eiger_short.tex
View File

@ -71,9 +71,6 @@ Here is an explanation of the LED color scheme of the bchip100:
\end{itemize}
You can also Check temperatures and water flow in a browser (from the same subnet where the 9M is: http://bchip100/status.cgi
\subsection{Mandatory setup - Receiver}
The receiver is a process run on a PC closely connected to the detector. Open one receiver for every half module board (remember, a module has two receivers!!!) . Go to {\tt{slsDetectorsPackage/bin/}}, \textbf{slsReceiver} should be started on the machine expected to receive the data from the detector.
@ -85,9 +82,17 @@ The receiver is a process run on a PC closely connected to the detector. Open on
where xxxx, yyyy are the tcp port numbers. Use 1955 and 1956 for example. Note that in older version of the software {\tt{--mode 1}} was used only for the ``bottom'' half module. Now, the receiver for the bottom is open without arguments anymore, but still in the configuration file one needs to write {\tt{n:flippeddatax 1}}, where {\tt{n}} indicated the half module number, 1 if it is a module.
\\ Open as many receiver as half module boards. A single module has two half module boards.
From the software version 3.0.1, one can decide weather start a zmq callback from the receiver to the client (for example to visualize data in the slsDetectorGui or another gui). If the zmq steam is not required (cased of the command line for example, one can switch off the streaming with {\tt{./sls\_detector\_put rx\_datastream 0}}, enable it with {\tt{./sls\_detector\_put rx\_datastream 1}}. In the case of inizialising the stream to use the slsDetectorGui, nothing needs to be taken care of by the user. If instead you want to stream the streaming on different channels, the zmq port of the client can be set stealing from the slsDetectorGui stream having {\tt{./sls\_detector\_put n:zmqport 300y}}, where n is each half module independently, matching the receiver stream {\tt{./sls\_detector\_put n:rx\_zmqport 300y}}.
There is an example code that can be compiled in {\tt{manual/manual-api/mainReceiver.cpp}} and gives the executable {\tt{./detReceiver}}, use it with two or more receivers to open all receivers in one single terminal: {\tt{./detReceiver startTCPPort numReceivers withCallback}}, where startTCPPort assumes the other ports are consecutively increased.
\subsection{Mandatory setup - Client}
\underline{In the case of cSAXS, the detector software is installed on the x12sa-ed-1 machine:}\\
\underline{In the case of cSAXS, the detector software is installed on:}\\
\underline{/sls/X12SA/data/x12saop/EigerPackage/slsDetectorsPackage}
The command line interface consists in these main functions:
@ -97,7 +102,7 @@ The command line interface consists in these main functions:
\item[sls\_detector\_get] to retrieve detector parameters
\end{description}
First, your detector should always be configured for each PC that you might want to use for controlling the detector. All the examples given here show the command {\tt{0-}}, which could be omitted for the EIGER system $0$. In the case more EIGER systems are controlled at once, the call of {\tt{1-}},.. becomes compulsory.
First, your detector should always be configured for each PC that you might want to use for controlling the detector. All the examples given here show the command {\tt{0-}}, which could be omitted for the EIGER system $0$. In the case more EIGER systems are controlled at once, the call of {\tt{1-}},.. becomes compulsory.
To make sure the shared memory is cleaned, before starting, one should do:
\begin{verbatim}
@ -120,6 +125,7 @@ hostname beb059+beb058+ #1Gb detector hostname for controls
1:rx_udpport2 50014 #udp port second quadrant, second halfmodule
rx_hostname x12sa-vcons #1Gb receiver pc hostname
outdir /sls/X12SA/data/x12saop/Data10/Eiger0.5M
threaded 1
\end{verbatim}
In the config file, if client, receiver and detector commands are on 1Gb, but detector data to receiver are sent using \textbf{10GbE} the following lines are mandatory (see slsDetectorsPackage/examples/eiger\_10Gb.config):
@ -139,8 +145,17 @@ hostname beb059+beb058+ #1Gb detector hostname for controls
1:detectorip 10.0.40.101 #second half module 10 Gb IP
rx_hostname x12sa-vcons #1Gb receiver pc hostname
outdir /sls/X12SA/data/x12saop/Data10/Eiger0.5M
threaded 1
\end{verbatim}
In the case you are developing your own receiver, then you need to remove the 1Gb receiver hostname {\tt{rx\_hostname}} and substitute it with the mac address of the device:
\begin{verbatim}
configuremac 0
rx_udpmac xx:xx:...
\end{verbatim}
One can configure all the detector settings in a parameter file {\tt{setup.det}}, which is loaded by doing:
\begin{verbatim}
sls_detector_put 0-parameters setup.det
@ -186,7 +201,7 @@ The first line requires to specify how many ({\tt{N}}) and at which energies in
NORMALLY, in this new calibration scheme, only {\tt{settings standard}} will be provided to you, unless specific cases to be discussed.
The threshold at 6000 eV , for example would be set as:{\tt{sls\_detector\_put 0-threshold 6000}}.
We have added a special command, {\tt{thresholdnotb}}, which allows to scan the threshold energy without reloading the trimbits at every stage. One cain either keep the trimbits at a specific value (es.32 if the range of energies to scan is large) or use the trimbits from a specific energy (like a central energy).
We have added a special command, {\tt{thresholdnotb}}, which allows to scan the threshold energy without reloading the trimbits at every stage. One can either keep the trimbits at a specific value (es.32 if the range of energies to scan is large) or use the trimbits from a specific energy (like a central energy).
\begin{verbatim}
sls_detector_put 0-thresholdnotb energy_in_eV
\end{verbatim}
@ -440,150 +455,10 @@ If \textbf{dr} is 32 and \textbf{clkdivider} is not 2, whatever the detector get
\item If the variable \textbf{frames} is greater than what the memory can store (table~\ref{timgs}) and the frame rate exceed the continuos streaming (table~\ref{tcont}), limits on the maximum number of images need to be implemented if the period is lower than the one listed in table~\ref{tcont}. Check table~\ref{tframes} to see the different cases.
\item Running at a speed that does not support the frame rate you are asking: see table~\ref{tframes} to check if the frame rate (\textbf{period}) you are asking is compatible with the \textbf{clkdivider} you are asking.
\item Running at a redout time that does not support the frame rate you are asking. Check table~\ref{tframes} to check if the frame rate (\textbf{period}) you are asking is compatible with the \textbf{flags} you are asking.
\item The minimum allowed value for \textbf{epttime} should be 10~$\mu$s.
\item The minimum allowed value for \textbf{exptime} should be 10~$\mu$s.
\item By default the {\textbf{subexptime}} is set to 2.621440~ms. Values smaller than 500~$\mu$s do not make sense. The maximum value is 5.2~s. This limits should be checked.
\end{enumerate}
\section{Client checks - command line}
Guide on returned strings:
\begin{enumerate}
\item \begin{verbatim}
sls_detector_get free
\end{verbatim}
Returns a list of shared memories cleaned (variable number depending on detector):
\begin{verbatim}
Shared memory 273612805 deleted
Shared memory 276922374 deleted
Shared memory 270270468 deleted
free freed
\end{verbatim}
Note that occasionally if there is a shared memory of a different size (from an older software version), it will return also a line like this:
\begin{verbatim}
*** shmget error (server) ***-1
\end{verbatim}
This needs to be cleaned with {\tt{ipcs -m}} and then {\tt{ipcrm -M xxx}}, where xxx are the keys with nattch 0.
\item \begin{verbatim}sls_detector_get settings
settings standard
\end{verbatim}
{\tt{standard}} is only if correct. {\tt{undefined}} or anything else is wrong.
\item \begin{verbatim}
sls_detector_get threshold
threshold xxxx
\end{verbatim}
Returns a string (xxxx) that can be interpreted as the threshold in eV. If it fails to set it, returns the last threshold it was set (which the detector still has). If settings are not defined or different trimbits are chosen, it will return "undefined".
\item \begin{verbatim}
sls_detector_get fname
fname string
\end{verbatim}
\item \begin{verbatim}
sls_detector_get exptime
exptime number
\end{verbatim}
where {\tt{number}} is a string to be interpreted as a float in (s).
\item \begin{verbatim}
sls_detector_get period
period number
\end{verbatim}
where {\tt{nuymber}} is a string to be interpreted as a float in (s).
\item \begin{verbatim}
sls_detector_get frames
frames number
\end{verbatim}
where {\tt{number}} is a string to be interpreted as an integer.
\item \begin{verbatim}
sls_detector_get cycles
cycles number
\end{verbatim}
where {\tt{number}} is a string to be interpreted as an integer.
\item \begin{verbatim}
sls_detector_get status
status string
\end{verbatim}
where {\tt{string}} can be {\tt{idle}} or {\tt{running}}.
\item \begin{verbatim}
sls_detector_get index
status number
\end{verbatim}
where {\tt{number}} is a string to be interpreted as an integer.
\item \begin{verbatim}
sls_detector_get dr
dr number
\end{verbatim}
where {\tt{number}} is a string that should be interpreted as an integer (4/8/16/32).
\item \begin{verbatim}
sls_detector_get clkdivider
clkdivider number
\end{verbatim}
where {\tt{number}} is a string that should be interpreted as an integer (0/1/2/3).
\item \begin{verbatim}
sls_detector_get flags
flags string1 string2
\end{verbatim}
where {\tt{string1}} is a string should be always {\tt{continous}} and {\tt{string2}} can be either {\tt{nonparallel}} or {\tt{parallel}}.
\item \begin{verbatim}
sls_detector_get timing
timing string
\end{verbatim}
where {\tt{string}} is a string which can be {\tt{auto/trigger/burst\_trigger/gating}}.
\item \begin{verbatim}
sls_detector_get enablefwrite
enablefwrite number
\end{verbatim}
where {\tt{number}} is a string which should be interpreted as an integer "0" or "1".
\item \begin{verbatim}
sls_detector_get framescaught
framescaught number
\end{verbatim}
where {\tt{number}} is a string which should be interpreted as an integer of the complete frames got by the receiver.
\item \begin{verbatim}
sls_detector_get frameindex
frameindex number
\end{verbatim}
where {\tt{number}} is a string which should be interpreted as an integer of the last frame number read from firmware. It comes from the receiver, though and reset after every acquisition series.
\item \begin{verbatim}
sls_detector_get subexptime
subexptime number
\end{verbatim}
where {\tt{number}} is a string that should be interpreted as a float in s. The default value is 0.002621440.
\item \begin{verbatim}
sls_detector_get ratecorr
ratecorr number
\end{verbatim}
where {\tt{number}} is a string that should be interpreted as a float in s. 0.000000 means correction off. Values above zero are the value of $\tau$ in ns.
\item \begin{verbatim}
sls_detector_get vhighvoltage
vhighvoltage number
\end{verbatim}
where {\tt{number}} is a string that should be interpreted as an int and for proper Eiger setting is approximately 150~V if it is correctly set. If two master modules are presents (multi systems), the average is returned (still to be tested). If one asks for the individual $n$ half module bias voltage through {\tt{sls\_detector\_get n:vhighvoltage}}, if the $n$ module is a master, the actual voltage will be returned. If it is a slave, -999 will be returned.
\item \begin{verbatim}
sls_detector_get busy
busy number
\end{verbatim}
where {\tt{number}} is a string that should be interpreted as an int for 0/1 meaning no/yes. This command tells if the sharedmemory has in memory that an acquisition has been started or not. It should allows to use the non blocking acquire, regardless of any delay to the detector getting into 'running' mode.
\end{enumerate}
\section{1Gb/s, 10Gb/s links}
\subsection{Checking the 1Gb/s, 10Gb/s physical links}\label{led}
@ -1009,5 +884,148 @@ Scroll up in the terminal till you find:\\
\section{Client checks - command line}
Guide on returned strings:
\begin{enumerate}
\item \begin{verbatim}
sls_detector_get free
\end{verbatim}
Returns a list of shared memories cleaned (variable number depending on detector):
\begin{verbatim}
Shared memory 273612805 deleted
Shared memory 276922374 deleted
Shared memory 270270468 deleted
free freed
\end{verbatim}
Note that occasionally if there is a shared memory of a different size (from an older software version), it will return also a line like this:
\begin{verbatim}
*** shmget error (server) ***-1
\end{verbatim}
This needs to be cleaned with {\tt{ipcs -m}} and then {\tt{ipcrm -M xxx}}, where xxx are the keys with nattch 0.
\item \begin{verbatim}sls_detector_get settings
settings standard
\end{verbatim}
{\tt{standard}} is only if correct. {\tt{undefined}} or anything else is wrong.
\item \begin{verbatim}
sls_detector_get threshold
threshold xxxx
\end{verbatim}
Returns a string (xxxx) that can be interpreted as the threshold in eV. If it fails to set it, returns the last threshold it was set (which the detector still has). If settings are not defined or different trimbits are chosen, it will return "undefined".
\item \begin{verbatim}
sls_detector_get fname
fname string
\end{verbatim}
\item \begin{verbatim}
sls_detector_get exptime
exptime number
\end{verbatim}
where {\tt{number}} is a string to be interpreted as a float in (s).
\item \begin{verbatim}
sls_detector_get period
period number
\end{verbatim}
where {\tt{nuymber}} is a string to be interpreted as a float in (s).
\item \begin{verbatim}
sls_detector_get frames
frames number
\end{verbatim}
where {\tt{number}} is a string to be interpreted as an integer.
\item \begin{verbatim}
sls_detector_get cycles
cycles number
\end{verbatim}
where {\tt{number}} is a string to be interpreted as an integer.
\item \begin{verbatim}
sls_detector_get status
status string
\end{verbatim}
where {\tt{string}} can be {\tt{idle}} or {\tt{running}}.
\item \begin{verbatim}
sls_detector_get index
status number
\end{verbatim}
where {\tt{number}} is a string to be interpreted as an integer.
\item \begin{verbatim}
sls_detector_get dr
dr number
\end{verbatim}
where {\tt{number}} is a string that should be interpreted as an integer (4/8/16/32).
\item \begin{verbatim}
sls_detector_get clkdivider
clkdivider number
\end{verbatim}
where {\tt{number}} is a string that should be interpreted as an integer (0/1/2/3).
\item \begin{verbatim}
sls_detector_get flags
flags string1 string2
\end{verbatim}
where {\tt{string1}} is a string should be always {\tt{continous}} and {\tt{string2}} can be either {\tt{nonparallel}} or {\tt{parallel}}.
\item \begin{verbatim}
sls_detector_get timing
timing string
\end{verbatim}
where {\tt{string}} is a string which can be {\tt{auto/trigger/burst\_trigger/gating}}.
\item \begin{verbatim}
sls_detector_get enablefwrite
enablefwrite number
\end{verbatim}
where {\tt{number}} is a string which should be interpreted as an integer "0" or "1".
\item \begin{verbatim}
sls_detector_get framescaught
framescaught number
\end{verbatim}
where {\tt{number}} is a string which should be interpreted as an integer of the complete frames got by the receiver.
\item \begin{verbatim}
sls_detector_get frameindex
frameindex number
\end{verbatim}
where {\tt{number}} is a string which should be interpreted as an integer of the last frame number read from firmware. It comes from the receiver, though and reset after every acquisition series.
\item \begin{verbatim}
sls_detector_get subexptime
subexptime number
\end{verbatim}
where {\tt{number}} is a string that should be interpreted as a float in s. The default value is 0.002621440.
\item \begin{verbatim}
sls_detector_get ratecorr
ratecorr number
\end{verbatim}
where {\tt{number}} is a string that should be interpreted as a float in s. 0.000000 means correction off. Values above zero are the value of $\tau$ in ns.
\item \begin{verbatim}
sls_detector_get vhighvoltage
vhighvoltage number
\end{verbatim}
where {\tt{number}} is a string that should be interpreted as an int and for proper Eiger setting is approximately 150~V if it is correctly set. If two master modules are presents (multi systems), the average is returned (still to be tested). If one asks for the individual $n$ half module bias voltage through {\tt{sls\_detector\_get n:vhighvoltage}}, if the $n$ module is a master, the actual voltage will be returned. If it is a slave, -999 will be returned.
\item \begin{verbatim}
sls_detector_get busy
busy number
\end{verbatim}
where {\tt{number}} is a string that should be interpreted as an int for 0/1 meaning no/yes. This command tells if the sharedmemory has in memory that an acquisition has been started or not. It should allows to use the non blocking acquire, regardless of any delay to the detector getting into 'running' mode.
\end{enumerate}
\end{document}

2
slsDetectorSoftware/commonFiles/communication_funcs.c
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@ -333,7 +333,7 @@ int receiveData(int file_des, void* buf,int length, intType itype){
#endif
while(length > 0) {
nreceiving = (length>send_rec_max_size) ? send_rec_max_size:length;
nreceiving = (length>send_rec_max_size) ? send_rec_max_size:length; // (condition) ? if_true : if_false
nreceived = read(file_des,(char*)buf+total_received,nreceiving);
if(!nreceived){
if(!total_received) {

14
slsDetectorSoftware/gotthardDetectorServer/gitInfo.txt
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@ -1,9 +1,9 @@
Path: slsDetectorsPackage/slsDetectorSoftware/gotthardDetectorServer
URL: origin git@git.psi.ch:sls_detectors_software/sls_detector_software.git
Repository Root: origin git@git.psi.ch:sls_detectors_software/sls_detector_software.git
Repsitory UUID: c5777e517c451226e3275e6948895baee21a1f94
Revision: 210
Branch: gotthardfix
URL: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git
Repository Root: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git
Repsitory UUID: 0649626842512b772ab660c36dece505f3244aee
Revision: 212
Branch: 3.0.1
Last Changed Author: Dhanya_Maliakal
Last Changed Rev: 1585
Last Changed Date: 2017-11-09 13:57:04.000000002 +0100 ./server_funcs.c
Last Changed Rev: 3318
Last Changed Date: 2017-12-19 17:45:11.000000002 +0100 ./server_funcs.c

10
slsDetectorSoftware/gotthardDetectorServer/gitInfoGotthard.h
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@ -1,6 +1,6 @@
#define GITURL "git@git.psi.ch:sls_detectors_software/sls_detector_software.git"
#define GITREPUUID "c5777e517c451226e3275e6948895baee21a1f94"
#define GITURL "git@github.com:slsdetectorgroup/slsDetectorPackage.git"
#define GITREPUUID "0649626842512b772ab660c36dece505f3244aee"
#define GITAUTH "Dhanya_Maliakal"
#define GITREV 0x1585
#define GITDATE 0x20171109
#define GITBRANCH "blabla"
#define GITREV 0x3318
#define GITDATE 0x20171219
#define GITBRANCH "3.0.1"

BIN
slsDetectorSoftware/gotthardDetectorServer/gotthardDetectorServerv3.0.0.6
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BIN
slsDetectorSoftware/gotthardDetectorServer/gotthardDetectorServerv3.0.0.7 Executable file
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2
slsDetectorSoftware/gotthardDetectorServer/server_funcs.c
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@ -1049,7 +1049,7 @@ int get_adc(int file_des) {
ret=FAIL;
}
ind=arg[0];
imod=arg[1];
imod=0;//arg[1];
#ifdef VERBOSE
printf("Getting ADC %d of module %d\n", ind, imod);

20
slsDetectorSoftware/jctbDetectorServer/firmware_funcs.c
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@ -3717,21 +3717,21 @@ int setDac(int dacnum,int dacvalue){
csdx=2;
else
csdx=ichip+2;
//setting int reference
offw=DAC_REG;
//setting int reference
offw=DAC_REG;
valw=bus_r(offw)|0xff;
valw=bus_r(offw)|0xff; // alles auf 1 setzen (START)
bus_w(offw,(valw)); // start point
valw=((valw&(~(0x1<<csdx))));bus_w(offw,valw); //chip sel bar down
valw=(valw&(~(0x1<<cdx)));bus_w(offw,valw); //cldwn
bus_w(offw,(valw)); // start point
valw=((valw&(~(0x1<<csdx))));bus_w(offw,valw); //chip sel bar down
valw=(valw&(~(0x1<<cdx)));bus_w(offw,valw); //clk dwn
//#ifdef CTB
if (myDetectorType==JUNGFRAUCTB) {
for (i=0; i<ichip; i++) {
nextDac();
printf("next DAC\n");
nextDac();
printf("next DAC\n");
}
}
//#endif
@ -3744,8 +3744,8 @@ int setDac(int dacnum,int dacvalue){
if (myDetectorType==JUNGFRAUCTB) {
for (i=ichip+1; i<N_DAC/8; i++) {
nextDac();
printf("next DAC\n");
nextDac();
printf("next DAC\n");
}
}
valw=bus_r(offw);

4
slsDetectorSoftware/jctbDetectorServer/server_funcs.c
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@ -1039,7 +1039,7 @@ int set_dac(int file_des) {
}
if (vLimitCompliant(v))
retval=setDac(ind,val);
retval=setDac(ind,val); // in DACu
} else {
@ -2150,7 +2150,7 @@ int set_timer(int file_des) {
ret=FAIL;
}
n = receiveDataOnly(file_des,&tns,sizeof(tns));
n = receiveDataOnly(file_des,&tns,sizeof(tns)); // total received data
if (n < 0) {
sprintf(mess,"Error reading from socket\n");
ret=FAIL;

141
slsDetectorSoftware/mythen3DetectorServer/AD9257.h Executable file
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@ -0,0 +1,141 @@
#ifndef AD9257_H
#define AD9257_H
#include "ansi.h"
#include "commonServerFunctions.h"
#include <stdio.h>
/* AD9257 ADC DEFINES */
#define AD9257_ADC_NUMBITS (24)
#define AD9257_DEV_IND_2_REG (0x04)
#define AD9257_CHAN_H_OFST (0)
#define AD9257_CHAN_H_MSK (0x00000001 << AD9257_CHAN_H_OFST)
#define AD9257_CHAN_G_OFST (1)
#define AD9257_CHAN_G_MSK (0x00000001 << AD9257_CHAN_G_OFST)
#define AD9257_CHAN_F_OFST (2)
#define AD9257_CHAN_F_MSK (0x00000001 << AD9257_CHAN_F_OFST)
#define AD9257_CHAN_E_OFST (3)
#define AD9257_CHAN_E_MSK (0x00000001 << AD9257_CHAN_E_OFST)
#define AD9257_DEV_IND_1_REG (0x05)
#define AD9257_CHAN_D_OFST (0)
#define AD9257_CHAN_D_MSK (0x00000001 << AD9257_CHAN_D_OFST)
#define AD9257_CHAN_C_OFST (1)
#define AD9257_CHAN_C_MSK (0x00000001 << AD9257_CHAN_C_OFST)
#define AD9257_CHAN_B_OFST (2)
#define AD9257_CHAN_B_MSK (0x00000001 << AD9257_CHAN_B_OFST)
#define AD9257_CHAN_A_OFST (3)
#define AD9257_CHAN_A_MSK (0x00000001 << AD9257_CHAN_A_OFST)
#define AD9257_CLK_CH_DCO_OFST (4)
#define AD9257_CLK_CH_DCO_MSK (0x00000001 << AD9257_CLK_CH_DCO_OFST)
#define AD9257_CLK_CH_IFCO_OFST (5)
#define AD9257_CLK_CH_IFCO_MSK (0x00000001 << AD9257_CLK_CH_IFCO_OFST)
#define AD9257_POWER_MODE_REG (0x08)
#define AD9257_POWER_INTERNAL_OFST (0)
#define AD9257_POWER_INTERNAL_MSK (0x00000003 << AD9257_POWER_INTERNAL_OFST)
#define AD9257_INT_RESET_VAL (0x3)
#define AD9257_INT_CHIP_RUN_VAL (0x0)
#define AD9257_POWER_EXTERNAL_OFST (5)
#define AD9257_POWER_EXTERNAL_MSK (0x00000001 << AD9257_POWER_EXTERNAL_OFST)
#define AD9257_EXT_FULL_POWER_VAL (0x0)
#define AD9257_EXT_STANDBY_VAL (0x1)
#define AD9257_OUT_MODE_REG (0x14)
#define AD9257_OUT_FORMAT_OFST (0)
#define AD9257_OUT_FORMAT_MSK (0x00000001 << AD9257_OUT_FORMAT_OFST)
#define AD9257_OUT_BINARY_OFST_VAL (0)
#define AD9257_OUT_TWOS_COMPL_VAL (1)
#define AD9257_OUT_LVDS_OPT_OFST (6)
#define AD9257_OUT_LVDS_OPT_MSK (0x00000001 << AD9257_OUT_LVDS_OPT_OFST)
#define AD9257_OUT_LVDS_ANSI_VAL (0)
#define AD9257_OUT_LVDS_IEEE_VAL (1)
#define AD9257_OUT_PHASE_REG (0x16)
#define AD9257_OUT_CLK_OFST (0)
#define AD9257_OUT_CLK_MSK (0x0000000F << AD9257_OUT_CLK_OFST)
#define AD9257_OUT_CLK_60_VAL (0x1)
#define AD9257_IN_CLK_OFST (4)
#define AD9257_IN_CLK_MSK (0x00000007 << AD9257_IN_CLK_OFST)
#define AD9257_IN_CLK_0_VAL (0x0)
#define AD9257_VREF_REG (0x18)
#define AD9257_VREF_OFST (0)
#define AD9257_VREF_MSK (0x00000003 << AD9257_VREF_OFST)
#define AD9257_VREF_1_33_VAL (0x2)
#define AD9257_TEST_MODE_REG (0x0D)
#define AD9257_OUT_TEST_OFST (0)
#define AD9257_OUT_TEST_MSK (0x0000000F << AD9257_OUT_TEST_OFST)
#define AD9257_NONE_VAL (0x0)
#define AD9257_MIXED_BIT_FREQ_VAL (0xC)
#define AD9257_TEST_RESET_SHORT_GEN (4)
#define AD9257_TEST_RESET_LONG_GEN (5)
#define AD9257_USER_IN_MODE_OFST (6)
#define AD9257_USER_IN_MODE_MSK (0x00000003 << AD9257_USER_IN_MODE_OFST)
void setAdc(int addr, int val) {
u_int32_t codata;
codata = val + (addr << 8);
printf(" Setting ADC SPI Register. Wrote 0x%04x at 0x%04x\n", val, addr);
serializeToSPI(ADC_SPI_REG, codata, ADC_SERIAL_CS_OUT_MSK, AD9257_ADC_NUMBITS,
ADC_SERIAL_CLK_OUT_MSK, ADC_SERIAL_DATA_OUT_MSK, ADC_SERIAL_DATA_OUT_OFST);
}
void prepareADC(){
printf("\n\nPreparing ADC ... \n");
//power mode reset
printf("power mode reset:\n");
setAdc(AD9257_POWER_MODE_REG,
(AD9257_INT_RESET_VAL << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK);
//power mode chip run
printf("power mode chip run:\n");
setAdc(AD9257_POWER_MODE_REG,
(AD9257_INT_CHIP_RUN_VAL << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK);
//output clock phase
printf("output clock phase:\n");
setAdc(AD9257_OUT_PHASE_REG,
(AD9257_OUT_CLK_60_VAL << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK);
// lvds-iee reduced , binary offset
printf("lvds-iee reduced, binary offset:\n");
setAdc(AD9257_OUT_MODE_REG,
(AD9257_OUT_LVDS_IEEE_VAL << AD9257_OUT_LVDS_OPT_OFST) & AD9257_OUT_LVDS_OPT_MSK);
// all devices on chip to receive next command
printf("all devices on chip to receive next command:\n");
setAdc(AD9257_DEV_IND_2_REG,
AD9257_CHAN_H_MSK | AD9257_CHAN_G_MSK | AD9257_CHAN_F_MSK | AD9257_CHAN_E_MSK);
setAdc(AD9257_DEV_IND_1_REG,
AD9257_CHAN_D_MSK | AD9257_CHAN_C_MSK | AD9257_CHAN_B_MSK | AD9257_CHAN_A_MSK |
AD9257_CLK_CH_DCO_MSK | AD9257_CLK_CH_IFCO_MSK);
// vref 1.33
printf("vref 1.33:\n");
setAdc(AD9257_VREF_REG,
(AD9257_VREF_1_33_VAL << AD9257_VREF_OFST) & AD9257_VREF_MSK);
// no test mode
printf("no test mode:\n");
setAdc(AD9257_TEST_MODE_REG,
(AD9257_NONE_VAL << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK);
#ifdef TESTADC
printf("***************************************** *******\n");
printf("******* PUTTING ADC IN TEST MODE!!!!!!!!! *******\n");
printf("***************************************** *******\n");
// mixed bit frequency test mode
printf("mixed bit frequency test mode:\n");
setAdc(AD9257_TEST_MODE_REG,
(AD9257_MIXED_BIT_FREQ_VAL << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK);
#endif
}
#endif //AD9257_H

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slsDetectorSoftware/mythen3DetectorServer/Makefile Normal file
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CROSS = bfin-uclinux-
CC = $(CROSS)gcc
#CC = gcc
CLAGS += -Wall -DVIRTUAL -DDACS_INT -DGENERICD # -DSLS_DETECTOR_FUNCTION_LIST
LDLIBS += -lm
INCS = -I. -I../../slsReceiverSoftware/include/
PROGS = mythen3Server
#DESTDIR ?= bin
INSTMODE = 0777
SRC_CLNT = slsDetectorServer.c slsDetectorServer_funcs.c communication_funcs.c slsDetectorFunctionList.c
OBJS = $(SRC_CLNT:.c=.o)
all: clean $(PROGS)
boot: $(OBJS)
$(PROGS):
echo $(OBJS)
# mkdir -p $(DESTDIR)
$(CC) $(SRC_CLNT) $(CLAGS) $(LDLIBS) $(INCS) -o $@
# mv $(PROGS) $(DESTDIR)
clean:
rm -rf $(DESTDIR)/$(PROGS) *.o

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slsDetectorSoftware/mythen3DetectorServer/RegisterDefs.h Normal file
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#ifndef REGISTERS_G_H
#define REGISTERS_G_H
#include "sls_detector_defs.h"
/* Definitions for FPGA*/
#define CSP0 0x20200000
#define MEM_SIZE 0x100000
/* values defined for FPGA */
#define MCSNUM 0x0
#define FIXED_PATT_VAL 0xacdc1980
#define FPGA_INIT_PAT 0x60008
#define FPGA_INIT_ADDR 0xb0000000
//#ifdef JUNGFRAU_DHANYA
#define POWER_ON_REG 0x5e<<11
// Pwr_I2C_SDA <= PowerReg_s(1) when PowerReg_s(3)='1' else 'Z';
// Pwr_I2C_SCL <= PowerReg_s(0) when PowerReg_s(2)='1' else 'Z';
#define PWR_I2C_SCL_BIT 0
#define PWR_I2C_SDA_BIT 1
#define PWR_I2C_SCL_EN_BIT 2
#define PWR_I2C_SDA_EN_BIT 3
#define POWER_STATUS_REG 41<<11
#define ADCREG1 0x08
#define ADCREG2 0x14//20
#define ADCREG3 0x4
#define ADCREG4 0x5
#define ADCREG_VREFS 24
#define DBIT_PIPELINE_REG 89<<11 //0x59 same PATTERN_N_LOOP2_REG
#define MEM_MACHINE_FIFOS_REG 79<<11 //from gotthard
#define CONFGAIN_REG 93<<11 //from gotthard
#define ADC_PIPELINE_REG 66<<11 //0x42 same as ADC_OFFSET_REG
//#endif
//#define ADC_OFFSET_REG 93<<11 //same as DAQ_REG
#define ADC_INVERSION_REG 67<<11
#define DAC_REG 64<<11//0x17<<11// control the dacs
//ADC
#define ADC_WRITE_REG 65<<11//0x18<<11
//#define ADC_SYNC_REG 66<<11//0x19<<11
//#define HV_REG 67<<11//0x20<<11
//#define MUTIME_REG 0x1a<<11
//temperature
#define TEMP_IN_REG 0x1b<<11
#define TEMP_OUT_REG 0x1c<<11
//configure MAC
#define TSE_CONF_REG 0x1d<<11
#define ENET_CONF_REG 0x1e<<11
//#define WRTSE_SHAD_REG 0x1f<<11
//HV
#define DUMMY_REG 68<<11//0x21<<11
#define FPGA_VERSION_REG 0<<11 //0x22<<11
#define PCB_REV_REG 0<<11
#define FIX_PATT_REG 1<<11 //0x23<<11
#define CONTROL_REG 79<<11//0x24<<11
#define STATUS_REG 2<<11 //0x25<<11
#define CONFIG_REG 77<<11//0x26<<11
#define EXT_SIGNAL_REG 78<<11// 0x27<<11
//#define FPGA_SVN_REG 0x29<<11
#define CHIP_OF_INTRST_REG 0x2A<<11
//FIFO
#define LOOK_AT_ME_REG 3<<11 //0x28<<11
#define SYSTEM_STATUS_REG 4<<11
#define FIFO_DATA_REG 6<<11
#define FIFO_STATUS_REG 7<<11
// constant FifoDigitalInReg_c : integer := 60;
#define FIFO_DIGITAL_DATA_LSB_REG 60<<11
#define FIFO_DIGITAL_DATA_MSB_REG 61<<11
#define FIFO_DATA_REG_OFF 0x50<<11 ///////
//to read back dac registers
//#define MOD_DACS1_REG 0x65<<11
//#define MOD_DACS2_REG 0x66<<11
//#define MOD_DACS3_REG 0x67<<11
//user entered
#define GET_ACTUAL_TIME_LSB_REG 16<<11
#define GET_ACTUAL_TIME_MSB_REG 17<<11
#define GET_MEASUREMENT_TIME_LSB_REG 38<<11
#define GET_MEASUREMENT_TIME_MSB_REG 39<<11
#define SET_DELAY_LSB_REG 96<<11 //0x68<<11
#define SET_DELAY_MSB_REG 97<<11 //0x69<<11
#define GET_DELAY_LSB_REG 18<<11//0x6a<<11
#define GET_DELAY_MSB_REG 19<<11//0x6b<<11
#define SET_CYCLES_LSB_REG 98<<11//0x6c<<11
#define SET_CYCLES_MSB_REG 99<<11//0x6d<<11
#define GET_CYCLES_LSB_REG 20<<11//0x6e<<11
#define GET_CYCLES_MSB_REG 21<<11//0x6f<<11
#define SET_FRAMES_LSB_REG 100<<11//0x70<<11
#define SET_FRAMES_MSB_REG 101<<11//0x71<<11
#define GET_FRAMES_LSB_REG 22<<11//0x72<<11
#define GET_FRAMES_MSB_REG 23<<11//0x73<<11
#define SET_PERIOD_LSB_REG 102<<11//0x74<<11
#define SET_PERIOD_MSB_REG 103<<11//0x75<<11
#define GET_PERIOD_LSB_REG 24<<11//0x76<<11
#define GET_PERIOD_MSB_REG 25<<11//0x77<<11
//#define PATTERN_WAIT0_TIME_REG_LSB 114<<11
//#define PATTERN_WAIT0_TIME_REG_MSB 115<<11
#define SET_EXPTIME_LSB_REG 114<<11//0x78<<11
#define SET_EXPTIME_MSB_REG 115<<11//0x79<<11
#define GET_EXPTIME_LSB_REG 26<<11//0x7a<<11
#define GET_EXPTIME_MSB_REG 27<<11//0x7b<<11
#define SET_GATES_LSB_REG 106<<11//0x7c<<11
#define SET_GATES_MSB_REG 107<<11//0x7d<<11
#define GET_GATES_LSB_REG 28<<11//0x7e<<11
#define GET_GATES_MSB_REG 29<<11//0x7f<<11
#define DATA_IN_LSB_REG 30<<11
#define DATA_IN_MSB_REG 31<<11
#define PATTERN_OUT_LSB_REG 32<<11
#define PATTERN_OUT_MSB_REG 33<<11
#define FRAMES_FROM_START_LSB_REG 34<<11
#define FRAMES_FROM_START_MSB_REG 35<<11
#define FRAMES_FROM_START_PG_LSB_REG 36<<11
#define FRAMES_FROM_START_PG_MSB_REG 37<<11
#define SLOW_ADC_REG 43<<11
#define PLL_PARAM_REG 80<<11//0x37<<11
#define PLL_PARAM_OUT_REG 5<<11 //0x38<<11
#define PLL_CNTRL_REG 81<<11//0x34<<11
#ifdef NEW_GBE_INTERFACE
#define GBE_PARAM_OUT_REG 40<<11
#define GBE_PARAM_REG 69<<11
#define GBE_CNTRL_REG 70<<11
#else
#define RX_UDP_AREG 69<<11 //rx_udpip_AReg_c : integer:= 69; *\/
#define UDPPORTS_AREG 70<<11// udpports_AReg_c : integer:= 70; *\/
#define RX_UDPMACL_AREG 71<<11//rx_udpmacL_AReg_c : integer:= 71; *\/
#define RX_UDPMACH_AREG 72<<11//rx_udpmacH_AReg_c : integer:= 72; *\/
#define DETECTORMACL_AREG 73<<11//detectormacL_AReg_c : integer:= 73; *\/
#define DETECTORMACH_AREG 74<<11//detectormacH_AReg_c : integer:= 74; *\/
#define DETECTORIP_AREG 75<<11//detectorip_AReg_c : integer:= 75; *\/
#define IPCHKSUM_AREG 76<<11//ipchksum_AReg_c : integer:= 76; *\/ */
#endif
#define PATTERN_CNTRL_REG 82<<11 // address of patword
#define PATTERN_LIMITS_AREG 83<<11 // start/stop pattern
#define PATTERN_LOOP0_AREG 84<<11 // start/stop of loop
#define PATTERN_N_LOOP0_REG 85<<11 // # loops
#define PATTERN_LOOP1_AREG 86<<11
#define PATTERN_N_LOOP1_REG 87<<11
#define PATTERN_LOOP2_AREG 88<<11
#define PATTERN_N_LOOP2_REG 89<<11
#define PATTERN_WAIT0_AREG 90<<11 // address where to wait
#define PATTERN_WAIT1_AREG 91<<11
#define PATTERN_WAIT2_AREG 92<<11
//#define DAQ_REG 93<<11 //unused
#define NSAMPLES_REG 93<<11 //unused
#define HV_REG 95<<11
#define PATTERN_IOCTRL_REG_LSB 108<<11 // if output or not
#define PATTERN_IOCTRL_REG_MSB 109<<11
#define PATTERN_IOCLKCTRL_REG_LSB 110<<11//unused
#define PATTERN_IOCLKCTRL_REG_MSB 111<<11//unused
#define PATTERN_IN_REG_LSB 112<<11 // write word
#define PATTERN_IN_REG_MSB 113<<11
#define PATTERN_WAIT0_TIME_REG_LSB 114<<11 // how long to wait
#define PATTERN_WAIT0_TIME_REG_MSB 115<<11
#define PATTERN_WAIT1_TIME_REG_LSB 116<<11
#define PATTERN_WAIT1_TIME_REG_MSB 117<<11
#define PATTERN_WAIT2_TIME_REG_LSB 118<<11
#define PATTERN_WAIT2_TIME_REG_MSB 119<<11
//#define DAC_REG_OFF 120
//#define DAC_0_1_VAL_REG 120<<11
//#define DAC_2_3_VAL_REG 121<<11
//#define DAC_4_5_VAL_REG 122<<11
//#define DAC_6_7_VAL_REG 123<<11
//#define DAC_8_9_VAL_REG 124<<11
//#define DAC_10_11_VAL_REG 125<<11
//#define DAC_12_13_VAL_REG 126<<11
//#define DAC_14_15_VAL_REG 127<<11
#define DAC_VAL_REG 121<<11 // value of the DAC
#define DAC_NUM_REG 122<<11 // Index of the DAC, only JCTB
#define DAC_VAL_OUT_REG 42<<11
#define ADC_LATCH_DISABLE_REG 120<<11
/* registers defined in FPGA */
#define GAIN_REG 0
//#define FLOW_CONTROL_REG 0x11<<11
//#define FLOW_STATUS_REG 0x12<<11
//#define FRAME_REG 0x13<<11
#define MULTI_PURPOSE_REG 0
//#define TIME_FROM_START_REG 0x16<<11
#define ROI_REG 0 // 0x35<<11
#define OVERSAMPLING_REG 0 // 0x36<<11
#define MOENCH_CNTR_REG 0 // 0x31<<11
#define MOENCH_CNTR_OUT_REG 0 // 0x33<<11
#define MOENCH_CNTR_CONF_REG 0 // 0x32<<11
//image
#define DARK_IMAGE_REG 0 // 0x81<<11
#define GAIN_IMAGE_REG 0 // 0x82<<11
//counter block memory
#define COUNTER_MEMORY_REG 0 // 0x85<<11 //gotthard
//not used
//#define MCB_DOUT_REG_OFF 0 // 0x200000
//#define FIFO_CNTRL_REG_OFF 0 // 0x300000
//#define FIFO_COUNTR_REG_OFF 0 // 0x400000
//not used so far
//#define SPEED_REG 0 // 0x006000
//#define SET_NBITS_REG 0 // 0x008000
//not used
//#define GET_SHIFT_IN_REG 0 // 0x022000
#define SHIFTMOD 2
#define SHIFTFIFO 9
/** for PCB_REV_REG */
#define DETECTOR_TYPE_MASK 0xFF000000
#define DETECTOR_TYPE_OFFSET 24
#define BOARD_REVISION_MASK 0xFFFFFF
#define MOENCH03_MODULE_ID 2
#define JUNGFRAU_MODULE_ID 1
#define JUNGFRAU_CTB_ID 3
/* for control register (16bit only)*/
#define START_ACQ_BIT 0x0001
#define STOP_ACQ_BIT 0x0002
#define START_FIFOTEST_BIT 0x0004 // ?????
#define STOP_FIFOTEST_BIT 0x0008 // ??????
#define START_READOUT_BIT 0x0010
#define STOP_READOUT_BIT 0x0020
#define START_EXPOSURE_BIT 0x0040
#define STOP_EXPOSURE_BIT 0x0080
#define START_TRAIN_BIT 0x0100
#define STOP_TRAIN_BIT 0x0200
#define FIFO_RESET_BIT 0x8000
#define SYNC_RESET 0x0400
#define GB10_RESET_BIT 0x0800
#define MEM_RESET_BIT 0x1000
/* for status register */
#define RUN_BUSY_BIT 0x00000001
#define READOUT_BUSY_BIT 0x00000002
#define FIFOTEST_BUSY_BIT 0x00000004 //????
#define WAITING_FOR_TRIGGER_BIT 0x00000008
#define DELAYBEFORE_BIT 0x00000010
#define DELAYAFTER_BIT 0x00000020
#define EXPOSING_BIT 0x00000040
#define COUNT_ENABLE_BIT 0x00000080
#define READSTATE_0_BIT 0x00000100
#define READSTATE_1_BIT 0x00000200
#define READSTATE_2_BIT 0x00000400
#define LAM_BIT 0x00000400 // error!
#define SOME_FIFO_FULL_BIT 0x00000800 // error!
#define RUNSTATE_0_BIT 0x00001000
#define RUNSTATE_1_BIT 0x00002000
#define RUNSTATE_2_BIT 0x00004000
#define STOPPED_BIT 0x00008000 // stopped!
#define ALL_FIFO_EMPTY_BIT 0x00010000 // data ready
#define RUNMACHINE_BUSY_BIT 0x00020000
#define READMACHINE_BUSY_BIT 0x00040000
#define PLL_RECONFIG_BUSY 0x00100000
/* for fifo status register */
#define FIFO_ENABLED_BIT 0x80000000
#define FIFO_DISABLED_BIT 0x01000000
#define FIFO_ERROR_BIT 0x08000000
#define FIFO_EMPTY_BIT 0x04000000
#define FIFO_DATA_READY_BIT 0x02000000
#define FIFO_COUNTER_MASK 0x000001ff
#define FIFO_NM_MASK 0x00e00000
#define FIFO_NM_OFF 21
#define FIFO_NC_MASK 0x001ffe00
#define FIFO_NC_OFF 9
/* for config register *///not really used yet
#define TOT_ENABLE_BIT 0x00000002
#define TIMED_GATE_BIT 0x00000004
#define CONT_RO_ENABLE_BIT 0x00080000
#define GB10_NOT_CPU_BIT 0x00001000
#define ADC_OUTPUT_DISABLE_BIT 0x00100
#define DIGITAL_OUTPUT_ENABLE_BIT 0x00200
/* for speed register */
#define CLK_DIVIDER_MASK 0x000000ff
#define CLK_DIVIDER_OFFSET 0
#define SET_LENGTH_MASK 0x00000f00
#define SET_LENGTH_OFFSET 8
#define WAIT_STATES_MASK 0x0000f000
#define WAIT_STATES_OFFSET 12
#define TOTCLK_DIVIDER_MASK 0xff000000
#define TOTCLK_DIVIDER_OFFSET 24
#define TOTCLK_DUTYCYCLE_MASK 0x00ff0000
#define TOTCLK_DUTYCYCLE_OFFSET 16
/* for external signal register */
#define SIGNAL_OFFSET 4
#define SIGNAL_MASK 0xF
#define EXT_SIG_OFF 0x0
#define EXT_GATE_IN_ACTIVEHIGH 0x1
#define EXT_GATE_IN_ACTIVELOW 0x2
#define EXT_TRIG_IN_RISING 0x3
#define EXT_TRIG_IN_FALLING 0x4
#define EXT_RO_TRIG_IN_RISING 0x5
#define EXT_RO_TRIG_IN_FALLING 0x6
#define EXT_GATE_OUT_ACTIVEHIGH 0x7
#define EXT_GATE_OUT_ACTIVELOW 0x8
#define EXT_TRIG_OUT_RISING 0x9
#define EXT_TRIG_OUT_FALLING 0xA
#define EXT_RO_TRIG_OUT_RISING 0xB
#define EXT_RO_TRIG_OUT_FALLING 0xC
/* for temperature register */
#define T1_CLK_BIT 0x00000001
#define T1_CS_BIT 0x00000002
#define T2_CLK_BIT 0x00000004
#define T2_CS_BIT 0x00000008
/* fifo control register */
//#define FIFO_RESET_BIT 0x00000001
//#define FIFO_DISABLE_TOGGLE_BIT 0x00000002
//chip shiftin register meaning
#define OUTMUX_OFF 20
#define OUTMUX_MASK 0x1f
#define PROBES_OFF 4
#define PROBES_MASK 0x7f
#define OUTBUF_OFF 0
#define OUTBUF_MASK 1
/* multi purpose register */
#define PHASE_STEP_BIT 0x00000001
#define PHASE_STEP_OFFSET 0
// #define xxx_BIT 0x00000002
#define RESET_COUNTER_BIT 0x00000004
#define RESET_COUNTER_OFFSET 2
//#define xxx_BIT 0x00000008
//#define xxx_BIT 0x00000010
#define SW1_BIT 0x00000020
#define SW1_OFFSET 5
#define WRITE_BACK_BIT 0x00000040
#define WRITE_BACK_OFFSET 6
#define RESET_BIT 0x00000080
#define RESET_OFFSET 7
#define ENET_RESETN_BIT 0x00000800
#define ENET_RESETN_OFFSET 11
#define INT_RSTN_BIT 0x00002000
#define INT_RSTN_OFFSET 13
#define DIGITAL_TEST_BIT 0x00004000
#define DIGITAL_TEST_OFFSET 14
//#define CHANGE_AT_POWER_ON_BIT 0x00008000
//#define CHANGE_AT_POWER_ON_OFFSET 15
/* settings/conf gain register */
#define GAIN_MASK 0x0000000f
#define GAIN_OFFSET 0
#define SETTINGS_MASK 0x000000f0
#define SETTINGS_OFFSET 4
/* CHIP_OF_INTRST_REG */
#define CHANNEL_MASK 0xffff0000
#define CHANNEL_OFFSET 16
#define ACTIVE_ADC_MASK 0x0000001f
/**ADC SYNC CLEAN FIFO*/
#define ADCSYNC_CLEAN_FIFO_BITS 0x300000
#define CLEAN_FIFO_MASK 0x0fffff
enum {run_clk_c, adc_clk_c, sync_clk_c, dbit_clk_c};
#define PLL_CNTR_ADDR_OFF 16 //PLL_CNTR_REG bits 21 downto 16 represent the counter address
#define PLL_CNTR_RECONFIG_RESET_BIT 0
#define PLL_CNTR_READ_BIT 1
#define PLL_CNTR_WRITE_BIT 2
#define PLL_CNTR_PLL_RESET_BIT 3
#define PLL_CNTR_PHASE_EN_BIT 8
#define PLL_CNTR_UPDN_BIT 9
#define PLL_CNTR_CNTSEL_OFF 10
#define PLL_MODE_REG 0x0
#define PLL_STATUS_REG 0x1
#define PLL_START_REG 0x2
#define PLL_N_COUNTER_REG 0x3
#define PLL_M_COUNTER_REG 0x4
#define PLL_C_COUNTER_REG 0x5 //which ccounter stands in param 22:18; 7:0 lowcount 15:8 highcount; 16 bypassenable; 17 oddivision
#define PLL_PHASE_SHIFT_REG 0x6 // which ccounter stands in param 16:20; 21 updown (1 up, 0 down)
#define PLL_K_COUNTER_REG 0x7
#define PLL_BANDWIDTH_REG 0x8
#define PLL_CHARGEPUMP_REG 0x9
#define PLL_VCO_DIV_REG 0x1c
#define PLL_MIF_REG 0x1f
#define PPL_M_CNT_PARAM_DEFAULT 0x4040
#define PPL_N_CNT_PARAM_DEFAULT 0x20D0C
#define PPL_C0_CNT_PARAM_DEFAULT 0x20D0C
#define PPL_C1_CNT_PARAM_DEFAULT 0xA0A0
#define PPL_C2_CNT_PARAM_DEFAULT 0x20D0C
#define PPL_C3_CNT_PARAM_DEFAULT 0x0808
#define PPL_BW_PARAM_DEFAULT 0x2EE0
#define PPL_VCO_PARAM_DEFAULT 0x1
#define NEW_PLL_RECONFIG
#ifdef NEW_PLL_RECONFIG
#define PLL_VCO_FREQ_MHZ 400//480//800
#else
#define PLL_VCO_FREQ_MHZ 480//800
#endif
/*
GBE parameter and control registers definitions
*/
#define GBE_CTRL_WSTROBE 0
#define GBE_CTRL_VAR_OFFSET 16
#define GBE_CTRL_VAR_MASK 0XF
#define GBE_CTRL_RAMADDR_OFFSET 24
#define GBE_CTRL_RAMADDR_MASK 0X3F
#define GBE_CTRL_INTERFACE 23
#define RX_UDP_IP_ADDR 0
#define RX_UDP_PORTS_ADDR 1
#define RX_UDP_MAC_L_ADDR 2
#define RX_UDP_MAC_H_ADDR 3
#define IPCHECKSUM_ADDR 4
#define GBE_DELAY_ADDR 5
#define GBE_RESERVED1_ADDR 6
#define GBE_RESERVED2_ADDR 7
#define DETECTOR_MAC_L_ADDR 8
#define DETECTOR_MAC_H_ADDR 9
#define DETECTOR_IP_ADDR 10
/**------------------
-- pattern registers definitions
--------------------------------------------- */
#define IOSIGNALS_MASK 0xfffffffffffff
#define ADC_ENABLE_BIT 63
#define APATTERN_MASK 0xffff
#define ASTART_OFFSET 0
#define ASTOP_OFFSET 16
#define PATTERN_CTRL_WRITE_BIT 0
#define PATTERN_CTRL_READ_BIT 1
#define PATTERN_CTRL_ADDR_OFFSET 16
#define MAX_PATTERN_LENGTH 1024
#endif

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#ifndef BLACKFIN_H
#define BLACKFIN_H
#include "ansi.h"
#include <stdio.h>
#include <fcntl.h> // open
#include <sys/mman.h> // mmap
/* global variables */
u_int32_t CSP0BASE = 0;
#define CSP0 0x20200000
#define MEM_SIZE 0x100000
/**
* Write into a 16 bit register
* @param offset address offset
* @param data 16 bit data
*/
void bus_w16(u_int32_t offset, u_int16_t data) {
volatile u_int16_t *ptr1;
ptr1=(u_int16_t*)(CSP0BASE+offset*2);
*ptr1=data;
}
/**
* Read from a 16 bit register
* @param offset address offset
* @retuns 16 bit data read
*/
u_int16_t bus_r16(u_int32_t offset){
volatile u_int16_t *ptr1;
ptr1=(u_int16_t*)(CSP0BASE+offset*2);
return *ptr1;
}
/**
* Write into a 32 bit register
* @param offset address offset
* @param data 32 bit data
*/
void bus_w(u_int32_t offset, u_int32_t data) {
volatile u_int32_t *ptr1;
ptr1=(u_int32_t*)(CSP0BASE+offset*2);
*ptr1=data;
}
/**
* Read from a 32 bit register
* @param offset address offset
* @retuns 32 bit data read
*/
u_int32_t bus_r(u_int32_t offset) {
volatile u_int32_t *ptr1;
ptr1=(u_int32_t*)(CSP0BASE+offset*2);
return *ptr1;
}
/**
* Read from a 64 bit register
* @param aLSB LSB offset address
* @param aMSB MSB offset address
* @returns 64 bit data read
*/
int64_t get64BitReg(int aLSB, int aMSB){
int64_t v64;
u_int32_t vLSB,vMSB;
vLSB=bus_r(aLSB);
vMSB=bus_r(aMSB);
v64=vMSB;
v64=(v64<<32) | vLSB;
printf(" reg64(%x,%x) %x %x %llx\n", aLSB, aMSB, vLSB, vMSB, v64);
return v64;
}
/**
* Write into a 64 bit register
* @param value 64 bit data
* @param aLSB LSB offset address
* @param aMSB MSB offset address
* @returns 64 bit data read
*/
int64_t set64BitReg(int64_t value, int aLSB, int aMSB){
int64_t v64;
u_int32_t vLSB,vMSB;
if (value!=-1) {
vLSB=value&(0xffffffff);
bus_w(aLSB,vLSB);
v64=value>> 32;
vMSB=v64&(0xffffffff);
bus_w(aMSB,vMSB);
}
return get64BitReg(aLSB, aMSB);
}
/**
* Read from a 32 bit register (literal register value provided by client)
* @param offset address offset
* @retuns 32 bit data read
*/
u_int32_t readRegister(u_int32_t offset) {
return bus_r(offset << 11);
}
/**
* Write into a 32 bit register (literal register value provided by client)
* @param offset address offset
* @param data 32 bit data
*/
u_int32_t writeRegister(u_int32_t offset, u_int32_t data) {
bus_w(offset << 11, data);
return readRegister(offset);
}
/**
* Map FPGA
*/
int mapCSP0(void) {
// if not mapped
if (!CSP0BASE) {
printf("Mapping memory\n");
#ifdef VIRTUAL
CSP0BASE = malloc(MEM_SIZE);
printf("memory allocated\n");
#else
int fd;
fd = open("/dev/mem", O_RDWR | O_SYNC, 0);
if (fd == -1) {
cprintf(BG_RED, "Error: Can't find /dev/mem\n");
return FAIL;
}
#ifdef VERBOSE
printf("/dev/mem opened\n");
#endif
CSP0BASE = (u_int32_t)mmap(0, MEM_SIZE, PROT_READ|PROT_WRITE, MAP_FILE|MAP_SHARED, fd, CSP0);
if (CSP0BASE == (u_int32_t)MAP_FAILED) {
cprintf(BG_RED, "Error: Can't map memmory area\n");
return FAIL;
}
printf("CSPOBASE mapped from %08x to %08x\n",CSP0BASE,CSP0BASE+MEM_SIZE);
#endif
printf("Status Register: %08x\n",bus_r(STATUS_REG));
}else
printf("Memory already mapped before\n");
return OK;
}
#endif //BLACKFIN_H

60
slsDetectorSoftware/mythen3DetectorServer/commonServerFunctions.h Executable file
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#ifndef COMMON_SERVER_FUNCTIONS_H
#define COMMON_SERVER_FUNCTIONS_H
#ifndef GOTTHARDD //gotthard already had bus_w etc defined in its firmware_funcs.c (not yet made with common files)
#include "blackfin.h"
#endif
/* global variables */
void serializeToSPI(u_int32_t addr, u_int32_t val, u_int32_t csmask, int numbitstosend, u_int32_t clkmask, u_int32_t digoutmask, int digofset) {
#ifdef VERBOSE
if (numbitstosend == 16)
printf("Writing to SPI Register: 0x%04x\n",val);
else
printf("Writing to SPI Register: 0x%08x\n", val);
#endif
u_int32_t valw;
// start point
valw = 0xffffffff; // old board compatibility (not using specific bits)
bus_w (addr, valw);
// chip sel bar down
valw &= ~csmask; /* todo with test: done a bit different, not with previous value */
bus_w (addr, valw);
{
int i = 0;
for (i = 0; i < numbitstosend; ++i) {
// clk down
valw &= ~clkmask;
bus_w (addr, valw);
// write data (i)
valw = ((valw & ~digoutmask) + // unset bit
(((val >> (numbitstosend - 1 - i)) & 0x1) << digofset)); // each bit from val starting from msb
bus_w (addr, valw);
// clk up
valw |= clkmask ;
bus_w (addr, valw);
}
}
// chip sel bar up
valw |= csmask; /* todo with test: not done for spi */
bus_w (addr, valw);
//clk down
valw &= ~clkmask;
bus_w (addr, valw);
// stop point = start point of course
valw = 0xffffffff; // old board compatibility (not using specific bits)
bus_w (addr, valw);
}
#endif //COMMON_SERVER_FUNCTIONS_H

690
slsDetectorSoftware/mythen3DetectorServer/communication_funcs.c Executable file
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#include "communication_funcs.h"
//#include <sys/socket.h>
#include <netinet/tcp.h> /* for TCP_NODELAY */
#include <stdlib.h>
#include <string.h>
#include <stdio.h>
#include <errno.h>
#include <sys/time.h>
char lastClientIP[INET_ADDRSTRLEN];
char thisClientIP[INET_ADDRSTRLEN];
int lockStatus;
int differentClients;
//int socketDescriptor, file_des;
const int send_rec_max_size=SEND_REC_MAX_SIZE;
extern int errno;
char dummyClientIP[INET_ADDRSTRLEN];
fd_set readset, tempset;
int isock=0, maxfd;
int myport=-1;
//struct sockaddr_in address;
//#define VERBOSE
int bindSocket(unsigned short int port_number) {
int i;
struct sockaddr_in addressS;
int socketDescriptor;
//int file_des;
//file_des= -1;
if (myport==port_number)
return -10;
socketDescriptor = socket(AF_INET, SOCK_STREAM,0); //tcp
//socketDescriptor = socket(PF_INET, SOCK_STREAM, 0);
if (socketDescriptor < 0) {
printf("Can not create socket\n");
} else {
i = 1;
setsockopt(socketDescriptor, SOL_SOCKET, SO_REUSEADDR, &i, sizeof(i));
// setsockopt(socketDescriptor, IPPROTO_TCP, TCP_NODELAY, (char *) &i, sizeof(i));
// TCP_CORK
// Set some fields in the serverAddress structure.
addressS.sin_family = AF_INET;
addressS.sin_addr.s_addr = htonl(INADDR_ANY);
addressS.sin_port = htons(port_number);
// memset(&address.sin_addr, 0, sizeof(address.sin_addr));
if(bind(socketDescriptor,(struct sockaddr *) &addressS,sizeof(addressS))<0){
printf("Can not create socket\n");
socketDescriptor=-1;
} else {
if (listen(socketDescriptor, 5)==0) {
if (isock==0) {
FD_ZERO(&readset);
}
FD_SET(socketDescriptor, &readset);
isock++;
maxfd = socketDescriptor;
printf ("%d port %d fd %d\n",isock, port_number,socketDescriptor);
myport=port_number;
} else
printf("error on listen");
}
}
//int getrlimit(int resource, struct rlimit *rlim);
return socketDescriptor;
}
int getServerError(int socketDescriptor)
{
if (socketDescriptor<0) return 1;
else return 0;
};
int acceptConnection(int socketDescriptor) {
int j;
struct sockaddr_in addressC;
int file_des=-1;
struct timeval tv;
int result;
//socklen_t address_length;
socklen_t address_length=sizeof(struct sockaddr_in);
if (socketDescriptor<0)
return -1;
memcpy(&tempset, &readset, sizeof(tempset));
tv.tv_sec = 10000000;
tv.tv_usec = 0;
result = select(maxfd + 1, &tempset, NULL, NULL, &tv);
if (result == 0) {
printf("select() timed out!\n");
} else if (result < 0 && errno != EINTR) {
printf("Error in select(): %s\n", strerror(errno));
} else if (result > 0) {
#ifdef VERBOSE
printf("select returned!\n");
#endif
for (j=0; j<maxfd+1; j++) {
if (FD_ISSET(j, &tempset)) {
#ifdef VERBOSE
printf("fd %d is set\n",j);
#endif
FD_CLR(j, &tempset);
if ((file_des = accept(j,(struct sockaddr *) &addressC, &address_length)) < 0) {
printf("Error in accept(): %s\n", strerror(errno));
printf("Error: with server accept, connection refused %d\n", errno);
switch(errno) {
case EWOULDBLOCK:
printf("ewouldblock eagain\n");
break;
case EBADF:
printf("ebadf\n");
break;
case ECONNABORTED:
printf("econnaborted\n");
break;
case EFAULT:
printf("efault\n");
break;
case EINTR:
printf("eintr\n");
break;
case EINVAL:
printf("einval\n");
break;
case EMFILE:
printf("emfile\n");
break;
case ENFILE:
printf("enfile\n");
break;
case ENOTSOCK:
printf("enotsock\n");
break;
case EOPNOTSUPP:
printf("eOPNOTSUPP\n");
break;
case ENOBUFS:
printf("ENOBUFS\n");
break;
case ENOMEM:
printf("ENOMEM\n");
break;
case ENOSR:
printf("ENOSR\n");
break;
case EPROTO:
printf("EPROTO\n");
break;
default:
printf("unknown error\n");
}
// should remove descriptor
socketDescriptor=-1;
} else {
inet_ntop(AF_INET, &(addressC.sin_addr), dummyClientIP, INET_ADDRSTRLEN);
#ifdef VERBOSE
printf("connection accepted %d\n",file_des);
#endif
FD_SET(file_des, &readset);
maxfd = (maxfd < file_des)?file_des:maxfd;
}
}
}
}
return file_des;
}
void closeConnection(int file_des) {
#ifdef VERY_VERBOSE
#endif
if(file_des>=0)
close(file_des);
FD_CLR(file_des, &readset);
}
void exitServer(int socketDescriptor) {
if (socketDescriptor>=0)
close(socketDescriptor);
#ifdef VERY_VERBOSE
printf("Closing server\n");
#endif
FD_CLR(socketDescriptor, &readset);
socketDescriptor=-1;
isock--;
}
void swapData(void* val,int length,intType itype){
int i;
int16_t* c= (int16_t*)val;
int32_t* a= (int32_t*)val;
int64_t* b= (int64_t*)val;
for(i=0; length > 0; i++){
switch(itype){
case INT16:
c[i] = ((c[i] & 0x00FF) << 8) | ((c[i] & 0xFF00) >> 8);
length -= sizeof(int16_t);
break;
case INT32:
a[i]=((a[i] << 8) & 0xFF00FF00) | ((a[i] >> 8) & 0xFF00FF );
a[i]=(a[i] << 16) | ((a[i] >> 16) & 0xFFFF);
length -= sizeof(int32_t);
break;
case INT64:
b[i] = ((b[i] << 8) & 0xFF00FF00FF00FF00ULL ) | ((b[i] >> 8) & 0x00FF00FF00FF00FFULL );
b[i] = ((b[i] << 16) & 0xFFFF0000FFFF0000ULL ) | ((b[i] >> 16) & 0x0000FFFF0000FFFFULL );
b[i] = (b[i] << 32) | ((b[i] >> 32) & 0xFFFFFFFFULL);
length -= sizeof(int64_t);
break;
default:
length = 0;
break;
}
}
}
int sendData(int file_des, void* buf,int length, intType itype){
#ifndef PCCOMPILE
#ifdef EIGERD
swapData(buf, length, itype);
#endif
#endif
return sendDataOnly(file_des, buf, length);
}
int receiveData(int file_des, void* buf,int length, intType itype){
int ret = receiveDataOnly(file_des, buf, length);
#ifndef PCCOMPILE
#ifdef EIGERD
if (ret >= 0) swapData(buf, length, itype);
#endif
#endif
return ret;
}
int sendDataOnly(int file_des, void* buf,int length) {
int ret = write(file_des, buf, length); //value of -1 is other end socket crash as sigpipe is ignored
if (ret < 0) cprintf(BG_RED, "Error writing to socket. Possible socket crash\n");
return ret;
}
int receiveDataOnly(int file_des, void* buf,int length) {
int total_received=0;
int nreceiving;
int nreceived;
if (file_des<0) return -1;
#ifdef VERY_VERBOSE
printf("want to receive %d Bytes\n", length);
#endif
while(length > 0) {
nreceiving = (length>send_rec_max_size) ? send_rec_max_size:length;
nreceived = read(file_des,(char*)buf+total_received,nreceiving);
if(!nreceived){
if(!total_received) {
return -1; //to handle it
}
break;
}
length-=nreceived;
total_received+=nreceived;
}
if (total_received>0)
strcpy(thisClientIP,dummyClientIP);
if (strcmp(lastClientIP,thisClientIP))
differentClients=1;
else
differentClients=0;
return total_received;
}
int sendChannel(int file_des, sls_detector_channel *myChan) {
int ts=0;
//sendDataOnly(file_des,myChan, sizeof(sls_detector_channel));
ts+=sendData(file_des,&(myChan->chan),sizeof(myChan->chan),INT32);
ts+=sendData(file_des,&(myChan->chip),sizeof(myChan->chip),INT32);
ts+=sendData(file_des,&(myChan->module),sizeof(myChan->module),INT32);
ts+=sendData(file_des,&(myChan->reg),sizeof(myChan->reg),INT64);
return ts;
}
int sendChip(int file_des, sls_detector_chip *myChip) {
int ts=0;
//ts+=sendDataOnly(file_des,myChip,sizeof(sls_detector_chip));
ts+=sendData(file_des,&(myChip->chip),sizeof(myChip->chip),INT32);
ts+=sendData(file_des,&(myChip->module),sizeof(myChip->module),INT32);
ts+=sendData(file_des,&(myChip->nchan),sizeof(myChip->nchan),INT32);
ts+=sendData(file_des,&(myChip->reg),sizeof(myChip->reg),INT32);
ts+=sendData(file_des,(myChip->chanregs),sizeof(myChip->chanregs),INT32);
ts+=sendData(file_des,myChip->chanregs,myChip->nchan*sizeof(int),INT32);
return ts;
}
int sendModule(int file_des, sls_detector_module *myMod) {
return sendModuleGeneral(file_des, myMod, 1);
}
int sendModuleGeneral(int file_des, sls_detector_module *myMod, int sendAll) {
int ts=0;
#ifdef VERBOSE
int idac;
#endif
int nChips=myMod->nchip;
int nChans=myMod->nchan;
int nAdcs=myMod->nadc;
int nDacs=myMod->ndac;
//ts+= sendDataOnly(file_des,myMod,sizeof(sls_detector_module));
ts+=sendData(file_des,&(myMod->module),sizeof(myMod->module),INT32);
ts+=sendData(file_des,&(myMod->serialnumber),sizeof(myMod->serialnumber),INT32);
ts+=sendData(file_des,&(myMod->nchan),sizeof(myMod->nchan),INT32);
ts+=sendData(file_des,&(myMod->nchip),sizeof(myMod->nchip),INT32);
ts+=sendData(file_des,&(myMod->ndac),sizeof(myMod->ndac),INT32);
ts+=sendData(file_des,&(myMod->nadc),sizeof(myMod->nadc),INT32);
ts+=sendData(file_des,&(myMod->reg),sizeof(myMod->reg),INT32);
ts+=sendData(file_des,myMod->dacs,sizeof(myMod->ndac),OTHER);
if(sendAll){
ts+=sendData(file_des,myMod->adcs,sizeof(myMod->nadc),OTHER);
}else{
uint32_t k = 0;
ts+=sendData(file_des,&k,sizeof(k),OTHER);
}
/*some detectors dont require sending all trimbits etc.*/
if(sendAll){
ts+=sendData(file_des,myMod->chipregs,sizeof(myMod->nchip),OTHER);
ts+=sendData(file_des,myMod->chanregs,sizeof(myMod->nchan),OTHER);
}
ts+=sendData(file_des,&(myMod->gain), sizeof(myMod->gain),OTHER);
ts+=sendData(file_des,&(myMod->offset), sizeof(myMod->offset),OTHER);
#ifdef VERBOSE
printf("module %d of size %d sent\n",myMod->module, ts);
#endif
ts+= sendData(file_des,myMod->dacs,sizeof(dacs_t)*nDacs,INT32);
#ifdef VERBOSE
printf("dacs %d of size %d sent\n",myMod->module, ts);
for (idac=0; idac< nDacs; idac++)
printf("dac %d is %d\n",idac,(int)myMod->dacs[idac]);
#endif
if(sendAll)
ts+= sendData(file_des,myMod->adcs,sizeof(dacs_t)*nAdcs,INT32);
else {
uint32_t k = 0;
ts+= sendData(file_des,&k,sizeof(k),INT32);
}
#ifdef VERBOSE
printf("adcs %d of size %d sent\n",myMod->module, ts);
#endif
/*some detectors dont require sending all trimbits etc.*/
if(sendAll){
ts+=sendData(file_des,myMod->chipregs,sizeof(int)*nChips,INT32);
#ifdef VERBOSE
printf("chips %d of size %d sent\n",myMod->module, ts);
#endif
ts+=sendData(file_des,myMod->chanregs,sizeof(int)*nChans,INT32);
#ifdef VERBOSE
printf("chans %d of size %d sent - %d\n",myMod->module, ts, myMod->nchan);
#endif
}
#ifdef VERBOSE
printf("module %d of size %d sent register %x\n",myMod->module, ts, myMod->reg);
#endif
return ts;
}
int receiveChannel(int file_des, sls_detector_channel *myChan) {
int ts=0;
//receiveDataOnly(file_des,myChan,sizeof(sls_detector_channel));
ts+=receiveData(file_des,&(myChan->chan),sizeof(myChan->chan),INT32);
ts+=receiveData(file_des,&(myChan->chip),sizeof(myChan->chip),INT32);
ts+=receiveData(file_des,&(myChan->module),sizeof(myChan->module),INT32);
ts+=receiveData(file_des,&(myChan->reg),sizeof(myChan->reg),INT32);
return ts;
}
int receiveChip(int file_des, sls_detector_chip* myChip) {
int *ptr=myChip->chanregs;
int ts=0;
int nChans, nchanold=myChip->nchan, chdiff;
//ts+= receiveDataOnly(file_des,myChip,sizeof(sls_detector_chip));
ts+=receiveData(file_des,&(myChip->chip),sizeof(myChip->chip),INT32);
ts+=receiveData(file_des,&(myChip->module),sizeof(myChip->module),INT32);
ts+=receiveData(file_des,&(myChip->nchan),sizeof(myChip->nchan),INT32);
ts+=receiveData(file_des,&(myChip->reg),sizeof(myChip->reg),INT32);
ts+=receiveData(file_des,(myChip->chanregs),sizeof(myChip->chanregs),INT32);
myChip->chanregs=ptr;
nChans=myChip->nchan;
chdiff=nChans-nchanold;
if (nchanold!=nChans) {
printf("wrong number of channels received!\n");
}
#ifdef VERBOSE
printf("chip structure received\n");
printf("now receiving %d channels\n", nChans);
#endif
if (chdiff<=0)
ts+=receiveData(file_des,myChip->chanregs, sizeof(int)*nChans,INT32);
else {
ptr=(int*)malloc(chdiff*sizeof(int));
myChip->nchan=nchanold;
ts+=receiveData(file_des,myChip->chanregs, sizeof(int)*nchanold,INT32);
ts+=receiveData(file_des,ptr, sizeof(int)*chdiff,INT32);
free(ptr);
return FAIL;
}
#ifdef VERBOSE
printf("chip's channels received\n");
#endif
return ts;
}
int receiveModule(int file_des, sls_detector_module* myMod) {
return receiveModuleGeneral(file_des,myMod,1);
}
int receiveModuleGeneral(int file_des, sls_detector_module* myMod, int receiveAll) {
int ts=0;
dacs_t *dacptr=myMod->dacs;
dacs_t *adcptr=myMod->adcs;
int *chipptr=myMod->chipregs, *chanptr=myMod->chanregs;
int nChips, nchipold=myMod->nchip, nchipdiff;
int nChans, nchanold=myMod->nchan, nchandiff;
int nDacs, ndold=myMod->ndac, ndacdiff;
int nAdcs, naold=myMod->nadc, nadcdiff;
#ifdef VERBOSE
int id=0;
#endif
// ts+= receiveDataOnly(file_des,myMod,sizeof(sls_detector_module));
ts+=receiveData(file_des,&(myMod->module),sizeof(myMod->module),INT32);
ts+=receiveData(file_des,&(myMod->serialnumber),sizeof(myMod->serialnumber),INT32);
ts+=receiveData(file_des,&(myMod->nchan),sizeof(myMod->nchan),INT32);
ts+=receiveData(file_des,&(myMod->nchip),sizeof(myMod->nchip),INT32);
ts+=receiveData(file_des,&(myMod->ndac),sizeof(myMod->ndac),INT32);
ts+=receiveData(file_des,&(myMod->nadc),sizeof(myMod->nadc),INT32);
ts+=receiveData(file_des,&(myMod->reg),sizeof(myMod->reg),INT32);
ts+=receiveData(file_des,myMod->dacs,sizeof(myMod->ndac),INT32);
if(receiveAll){ // temporary fix
ts+=receiveData(file_des,myMod->adcs,sizeof(myMod->nadc),INT32);
}else {
uint32_t k;ts+=receiveData(file_des,&k,sizeof(k),INT32);//nadc is 0
}
/*some detectors dont require sending all trimbits etc.*/
if(receiveAll){
ts+=receiveData(file_des,myMod->chipregs,sizeof(myMod->nchip),INT32);
ts+=receiveData(file_des,myMod->chanregs,sizeof(myMod->nchan),INT32);
}
ts+=receiveData(file_des,&(myMod->gain), sizeof(myMod->gain),OTHER);
ts+=receiveData(file_des,&(myMod->offset), sizeof(myMod->offset),OTHER);
myMod->dacs=dacptr;
myMod->adcs=adcptr;
myMod->chipregs=chipptr;
myMod->chanregs=chanptr;
#ifdef EIGERD
//feature to exclude sending of trimbtis, nchips=0,nchans=0 in that case
if(myMod->nchip == 0 && myMod->nchan == 0) {
receiveAll=0;
nchipold=0;
nchanold=0;
}
#endif
nChips=myMod->nchip;
nchipdiff=nChips-nchipold;
if (nchipold!=nChips) {
printf("received wrong number of chips\n");
}
#ifdef VERBOSE
else
printf("received %d chips\n",nChips);
#endif
nChans=myMod->nchan;
nchandiff=nChans-nchanold;
if (nchanold!=nChans) {
printf("received wrong number of channels\n");
}
#ifdef VERBOSE
else
printf("received %d chans\n",nChans);
#endif
nDacs=myMod->ndac;
ndacdiff=nDacs-ndold;
if (ndold!=nDacs) {
printf("received wrong number of dacs\n");
}
#ifdef VERBOSE
else
printf("received %d dacs\n",nDacs);
#endif
nAdcs=myMod->nadc;
nadcdiff=nAdcs-naold;
if (naold!=nAdcs) {
printf("received wrong number of adcs\n");
}
#ifdef VERBOSE
else
printf("received %d adcs\n",nAdcs);
#endif
if (ndacdiff<=0) {
ts+=receiveData(file_des,myMod->dacs, sizeof(dacs_t)*nDacs,INT32);
#ifdef VERBOSE
printf("dacs received\n");
int id;
for (id=0; id<nDacs; id++)
printf("dac %d val %d\n",id, (int)myMod->dacs[id]);
#endif
} else {
dacptr=(dacs_t*)malloc(ndacdiff*sizeof(dacs_t));
myMod->ndac=ndold;
ts+=receiveData(file_des,myMod->dacs, sizeof(dacs_t)*ndold,INT32);
ts+=receiveData(file_des,dacptr, sizeof(dacs_t)*ndacdiff,INT32);
free(dacptr);
return FAIL;
}
if (nadcdiff<=0) {
ts+=receiveData(file_des,myMod->adcs, sizeof(dacs_t)*nAdcs,INT32);
#ifdef VERBOSE
printf("adcs received\n");
#endif
} else {
adcptr=(dacs_t*)malloc(nadcdiff*sizeof(dacs_t));
myMod->nadc=naold;
ts+=receiveData(file_des,myMod->adcs, sizeof(dacs_t)*naold,INT32);
ts+=receiveData(file_des,adcptr, sizeof(dacs_t)*nadcdiff,INT32);
free(adcptr);
return FAIL;
}
/*some detectors dont require sending all trimbits etc.*/
if(receiveAll){
if (nchipdiff<=0) {
ts+=receiveData(file_des,myMod->chipregs, sizeof(int)*nChips,INT32);
#ifdef VERBOSE
printf("chips received\n");
#endif
} else {
chipptr=(int*)malloc(nchipdiff*sizeof(int));
myMod->nchip=nchipold;
ts+=receiveData(file_des,myMod->chipregs, sizeof(int)*nchipold,INT32);
ts+=receiveData(file_des,chipptr, sizeof(int)*nchipdiff,INT32);
free(chipptr);
return FAIL;
}
if (nchandiff<=0) {
ts+=receiveData(file_des,myMod->chanregs, sizeof(int)*nChans,INT32);
#ifdef VERBOSE
printf("chans received\n");
#endif
} else {
chanptr=(int*)malloc(nchandiff*sizeof(int));
myMod->nchan=nchanold;
ts+=receiveData(file_des,myMod->chanregs, sizeof(int)*nchanold,INT32);
ts+=receiveData(file_des,chanptr, sizeof(int)*nchandiff,INT32);
free(chanptr);
return FAIL;
}
}
#ifdef VERBOSE
printf("received module %d of size %d register %x\n",myMod->module,ts,myMod->reg);
#endif
return ts;
}

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#ifndef COMMUNICATION_FUNCS_H
#define COMMUNICATION_FUNCS_H
#define SEND_REC_MAX_SIZE 4096
#define DEFAULT_PORTNO 1952
#include <sys/types.h>
#include <sys/socket.h>
#include <arpa/inet.h>
#include <netdb.h>
#include <netinet/in.h>
#include <unistd.h>
#include "sls_detector_defs.h"
typedef enum{
INT16,
INT32,
INT64,
OTHER
}intType;
int bindSocket(unsigned short int port_number);
int acceptConnection(int socketDescriptor);
void closeConnection(int file_Des);
void exitServer(int socketDescriptor);
void swapData(void* val,int length,intType itype);
int sendData(int file_des, void* buf,int length, intType itype);
int receiveData(int file_des, void* buf,int length, intType itype);
int sendDataOnly(int file_des, void* buf,int length);
int receiveDataOnly(int file_des, void* buf,int length);
int getServerError(int socketDescriptor);
int sendChannel(int file_des, sls_detector_channel *myChan);
int sendChip(int file_des, sls_detector_chip *myChip);
int sendModule(int file_des, sls_detector_module *myMod);
int sendModuleGeneral(int file_des, sls_detector_module *myMod, int sendAll);
int receiveChannel(int file_des, sls_detector_channel *myChan);
int receiveChip(int file_des, sls_detector_chip* myChip);
int receiveModule(int file_des, sls_detector_module* myMod);
int receiveModuleGeneral(int file_des, sls_detector_module* myMod, int receiveAll);
#endif

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#ifndef PROGRAM_FPGA_H
#define PROGRAM_FPGA_H
#include "ansi.h"
#include <stdio.h>
#include <unistd.h> // usleep
#include <string.h>
/* global variables */
#define CTRL_SRVR_INIT_TIME_US (300 * 1000)
int gpioDefined=0;
char mtdvalue[10];
/**
* Define GPIO pins if not defined
*/
void defineGPIOpins(){
if (!gpioDefined) {
//define the gpio pins
system("echo 7 > /sys/class/gpio/export");
system("echo 9 > /sys/class/gpio/export");
//define their direction
system("echo in > /sys/class/gpio/gpio7/direction");
system("echo out > /sys/class/gpio/gpio9/direction");
printf("gpio pins defined\n");
gpioDefined = 1;
}else printf("gpio pins already defined earlier\n");
}
/**
* Notify FPGA to not touch flash
*/
void FPGAdontTouchFlash(){
//tell FPGA to not touch flash
system("echo 0 > /sys/class/gpio/gpio9/value");
//usleep(100*1000);
}
/**
* Notify FPGA to program from flash
*/
void FPGATouchFlash(){
//tell FPGA to touch flash to program itself
system("echo 1 > /sys/class/gpio/gpio9/value");
}
/**
* Reset FPGA
*/
void resetFPGA(){
cprintf(BLUE,"\n*** Reseting FPGA ***\n");
FPGAdontTouchFlash();
FPGATouchFlash();
usleep(CTRL_SRVR_INIT_TIME_US);
}
/**
* Erasing flash
*/
void eraseFlash(){
#ifdef VERY_VERBOSE
printf("\nErasing Flash\n");
#endif
char command[255];
sprintf(command,"flash_eraseall %s",mtdvalue);
system(command);
printf("flash erased\n");
}
/**
* Open the drive to copy program and
* notify FPGA not to touch the program
* @param filefp pointer to flash
* @return 0 for success, 1 for fail (cannot open file for writing program)
*/
int startWritingFPGAprogram(FILE** filefp){
#ifdef VERY_VERBOSE
printf("\nStart Writing of FPGA program\n");
#endif
//getting the drive
char output[255];
FILE* fp = popen("awk \'$4== \"\\\"bitfile(spi)\\\"\" {print $1}\' /proc/mtd", "r");
fgets(output, sizeof(output), fp);
pclose(fp);
strcpy(mtdvalue,"/dev/");
char* pch = strtok(output,":");
if(pch == NULL){
cprintf(RED,"Could not get mtd value\n");
return FAIL;
}
strcat(mtdvalue,pch);
printf ("\nFlash drive found: %s\n",mtdvalue);
FPGAdontTouchFlash();
//writing the program to flash
*filefp = fopen(mtdvalue, "w");
if(*filefp == NULL){
cprintf(RED,"Unable to open %s in write mode\n",mtdvalue);
return 1;
}
printf("flash ready for writing\n");
return 0;
}
/**
* When done writing the program, close file pointer and
* notify FPGA to pick up the program from flash
* @param filefp pointer to flash
*/
void stopWritingFPGAprogram(FILE* filefp){
#ifdef VERY_VERBOSE
printf("\nStopping of writing FPGA program\n");
#endif
int wait = 0;
if(filefp!= NULL){
fclose(filefp);
wait = 1;
}
//touch and program
FPGATouchFlash();
if(wait){
#ifdef VERY_VERBOSE
printf("Waiting for FPGA to program from flash\n");
#endif
//waiting for success or done
char output[255];
int res=0;
while(res == 0){
FILE* sysFile = popen("cat /sys/class/gpio/gpio7/value", "r");
fgets(output, sizeof(output), sysFile);
pclose(sysFile);
sscanf(output,"%d",&res);
#ifdef VERY_VERBOSE
printf("gpi07 returned %d\n",res);
#endif
}
}
printf("FPGA has picked up the program from flash\n\n");
}
/**
* Write FPGA Program to flash
* @param fpgasrc source program
* @param fsize size of program
* @param filefp pointer to flash
* @return 0 for success, 1 for fail (cannot write)
*/
int writeFPGAProgram(char* fpgasrc, size_t fsize, FILE* filefp){
#ifdef VERY_VERBOSE
printf("\nWriting of FPGA Program\n");
cprintf(BLUE,"address of fpgasrc:%p\n",(void *)fpgasrc);
cprintf(BLUE,"fsize:%d\n",fsize);
cprintf(BLUE,"pointer:%p\n",(void*)filefp);
#endif
if(fwrite((void*)fpgasrc , sizeof(char) , fsize , filefp )!= fsize){
cprintf(RED,"Could not write FPGA source to flash\n");
return 1;
}
#ifdef VERY_VERBOSE
cprintf(BLUE, "program written to flash\n");
#endif
return 0;
}
#endif //PROGRAM_FPGA_H

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slsDetectorSoftware/mythen3DetectorServer/slsDetectorFunctionList.h Normal file
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#ifdef SLS_DETECTOR_FUNCTION_LIST
#ifndef SLS_DETECTOR_FUNCTION_LIST_H
#define SLS_DETECTOR_FUNCTION_LIST_H
#include "sls_receiver_defs.h"
#include "slsDetectorServer_defs.h" // DAC_INDEX, ADC_INDEX, also include RegisterDefs.h
#include <stdlib.h>
#include <stdio.h> // FILE
/****************************************************
This functions are used by the slsDetectroServer_funcs interface.
Here are the definitions, but the actual implementation should be done for each single detector.
****************************************************/
// basic tests
void checkFirmwareCompatibility(int flag);
#ifdef JUNGFRAUD
int checkType();
u_int32_t testFpga(void);
int testBus(void);
#endif
#if defined(MYTHEND) || defined(JUNGFRAUD)
int moduleTest( enum digitalTestMode arg, int imod);
int detectorTest( enum digitalTestMode arg);
#endif
// Ids
int64_t getDetectorId(enum idMode arg);
u_int64_t getFirmwareVersion();
#ifdef MYTHEND
int64_t getModuleId(enum idMode arg, int imod);
#elif JUNGFRAUD
u_int16_t getHardwareVersionNumber();
u_int16_t getHardwareSerialNumber();
#endif
u_int32_t getDetectorNumber();
u_int64_t getDetectorMAC();
u_int32_t getDetectorIP();
// initialization
void initControlServer();
void initStopServer();
#ifdef EIGERD
void getModuleConfiguration();
#endif
// set up detector
void allocateDetectorStructureMemory();
void setupDetector();
// advanced read/write reg
#ifndef EIGERD
extern u_int32_t writeRegister(u_int32_t offset, u_int32_t data); // blackfin.h
extern u_int32_t readRegister(u_int32_t offset); // blackfin.h
#else
uint32_t writeRegister(uint32_t offset, uint32_t data);
uint32_t readRegister(uint32_t offset);
#endif
// firmware functions (resets)
#ifdef JUNGFRAUD
int powerChip (int on);
void cleanFifos();
void resetCore();
void resetPeripheral();
int adcPhase(int st);
int getPhase();
#endif
// parameters - nmod, dr, roi
int setNMod(int nm, enum dimension dim); // mythen specific, but for detector compatibility as a get
int getNModBoard(enum dimension arg); // mythen specific, but for detector compatibility as a get
int setDynamicRange(int dr);
#ifdef GOTTHARD
int setROI(int n, ROI arg[], int *retvalsize, int *ret);
#endif
// parameters - readout
int setSpeed(enum speedVariable arg, int val);
#if defined(EIGERD) || defined(MYTHEND)
enum readOutFlags setReadOutFlags(enum readOutFlags val);
#endif
#ifdef MYTHEND
int executeTrimming(enum trimMode mode, int par1, int par2, int imod);
#endif
// parameters - timer
int64_t setTimer(enum timerIndex ind, int64_t val);
#ifndef EIGERD
int64_t getTimeLeft(enum timerIndex ind);
#endif
// parameters - channel, chip, module, settings
#ifdef MYTHEND
int setChannel(sls_detector_channel myChan);
int getChannel(sls_detector_channel *myChan);
int setChip(sls_detector_chip myChip);
int getChip(sls_detector_chip *myChip);
#endif
#ifdef EIGERD
int setModule(sls_detector_module myMod, int delay);
#else
int setModule(sls_detector_module myMod);
#endif
int getModule(sls_detector_module *myMod);
enum detectorSettings setSettings(enum detectorSettings sett, int imod);
enum detectorSettings getSettings();
// parameters - threshold
#if defined(MYTHEND) || defined(EIGERD)
int getThresholdEnergy(int imod);
int setThresholdEnergy(int ev, int imod);
#endif
// parameters - dac, adc, hv
#ifdef JUNGFRAUD
void serializeToSPI(u_int32_t addr, u_int32_t val, u_int32_t csmask, int numbitstosend, u_int32_t clkmask, u_int32_t digoutmask, int digofset);
void initDac(int dacnum);
extern void setAdc(int addr, int val); // AD9257.h
int voltageToDac(int value);
int dacToVoltage(unsigned int digital);
#endif
void setDAC(enum DACINDEX ind, int val, int imod, int mV, int retval[]);
int getADC(enum ADCINDEX ind, int imod);
#ifndef MYTHEND
int setHighVoltage(int val);
#endif
// parameters - timing, extsig
#ifdef MYTHEND
enum externalSignalFlag getExtSignal(int signalindex);
enum externalSignalFlag setExtSignal(int signalindex, enum externalSignalFlag flag);
#endif
enum externalCommunicationMode setTiming( enum externalCommunicationMode arg);
// configure mac
#ifdef JUNGFRAUD
long int calcChecksum(int sourceip, int destip);
#endif
#ifndef MYTHEND
int configureMAC(uint32_t destip, uint64_t destmac, uint64_t sourcemac, uint32_t sourceip, uint32_t udpport, uint32_t udpport2, int ival);
#endif
#if defined(JUNGFRAUD) || defined(EIGERD)
int setDetectorPosition(int pos[]);
#endif
// very detector specific
// gotthard specific - image, pedestal
#ifdef GOTTHARDD
int loadImage(enum imageType index, char *imageVals);
int readCounterBlock(int startACQ, char *counterVals);
int resetCounterBlock(int startACQ);
int calibratePedestal(int frames);
// jungfrau specific - pll, flashing firmware
#elif JUNGFRAUD
void resetPLL();
u_int32_t setPllReconfigReg(u_int32_t reg, u_int32_t val);
void configurePll();
extern void eraseFlash(); // programfpga.h
extern int startWritingFPGAprogram(FILE** filefp); // programfpga.h
extern void stopWritingFPGAprogram(FILE* filefp); // programfpga.h
extern int writeFPGAProgram(char* fpgasrc, size_t fsize, FILE* filefp); // programfpga.h
// eiger specific - iodelay, 10g, pulse, rate, temp, activate, delay nw parameter
#elif EIGERD
int setIODelay(int val, int imod);
int enableTenGigabitEthernet(int val);
int setCounterBit(int val);
int pulsePixel(int n, int x, int y);
int pulsePixelNMove(int n, int x, int y);
int pulseChip(int n);
int64_t setRateCorrection(int64_t custom_tau_in_nsec);
int getRateCorrectionEnable();
int getDefaultSettingsTau_in_nsec();
void setDefaultSettingsTau_in_nsec(int t);
int64_t getCurrentTau();
void setExternalGating(int enable[]);
int setAllTrimbits(int val);
int getAllTrimbits();
int getBebFPGATemp();
int activate(int enable);
int setNetworkParameter(enum NETWORKINDEX mode, int value);
#endif
// aquisition
#if defined(EIGERD) || defined(GOTTHARD)
int prepareAcquisition();
#endif
int startStateMachine();
#ifdef VIRTUAL
void* start_timer(void* arg);
#endif
int stopStateMachine();
#ifndef JUNGFRAUD
int startReadOut();
#endif
enum runStatus getRunStatus();
void readFrame(int *ret, char *mess);
#ifdef JUNGFRAUD
u_int32_t runBusy(void);
#endif
//common
int copyModule(sls_detector_module *destMod, sls_detector_module *srcMod);
int calculateDataBytes();
int getTotalNumberOfChannels();
int getTotalNumberOfChips();
int getTotalNumberOfModules();
int getNumberOfChannelsPerModule();
int getNumberOfChipsPerModule();
int getNumberOfDACsPerModule();
int getNumberOfADCsPerModule();
#ifdef EIGERD
int getNumberOfGainsPerModule();
int getNumberOfOffsetsPerModule();
#endif
int getNumberOfChannelsPerChip();
// sync
enum masterFlags setMaster(enum masterFlags arg);
enum synchronizationMode setSynchronization(enum synchronizationMode arg);
#endif
#endif

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slsDetectorSoftware/mythen3DetectorServer/slsDetectorServer.c Executable file
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/* A simple server in the internet domain using TCP
The port number is passed as an argument */
#include "sls_detector_defs.h"
#include "slsDetectorServer_defs.h"
#include "communication_funcs.h"
#include "slsDetectorServer_funcs.h"
#include <stdio.h>
#include <stdlib.h>
#include <signal.h>
#include <string.h>
extern int sockfd;
void error(char *msg){
perror(msg);
}
int main(int argc, char *argv[]){
int portno, b;
int retval=OK;
int sd, fd;
int debugflag = 0;
// if socket crash, ignores SISPIPE, prevents global signal handler
// subsequent read/write to socket gives error - must handle locally
signal(SIGPIPE, SIG_IGN);
// circumvent the basic tests
if(argc > 1) {
if(!strcasecmp(argv[1],"-debug")){
debugflag = 1;
argc=1;
}
}
#ifdef STOP_SERVER
char cmd[100];
#endif
if (argc==1) {
portno = DEFAULT_PORTNO;
cprintf(BLUE,
"********************************************************\n"
"********* opening control server on port %d **********\n"
"********************************************************\n\n"
, portno);
b=1;
basictests(debugflag);
#ifdef STOP_SERVER
sprintf(cmd,"%s %d &",argv[0],DEFAULT_PORTNO+1);
//cprintf(BLUE,"cmd:%s\n", cmd);
system(cmd);
#endif
} else {
portno = DEFAULT_PORTNO+1;
if ( sscanf(argv[1],"%d",&portno) == 0) {
printf("could not open stop server: unknown port\n");
return 1;
}
cprintf(BLUE,
"********************************************************\n"
"*********** opening stop server on port %d ***********\n"
"********************************************************\n\n"
, portno);
b=0;
}
init_detector(b); //defined in slsDetectorServer_funcs
sd=bindSocket(portno); //defined in communication_funcs
sockfd=sd;
if (getServerError(sd)) { //defined in communication_funcs
printf("server error!\n");
return -1;
}
/* assign function table */
function_table(); //defined in slsDetectorServer_funcs
#ifdef VERBOSE
printf("function table assigned \n");
#endif
printf("\nReady...\n\n");
/* waits for connection */
while(retval!=GOODBYE) {
#ifdef VERBOSE
printf("\n");
#endif
#ifdef VERY_VERBOSE
printf("Waiting for client call\n");
#endif
fd=acceptConnection(sockfd); //defined in communication_funcs
#ifdef VERY_VERBOSE
printf("Connection accepted\n");
#endif
if (fd>0) {
retval=decode_function(fd); //defined in slsDetectorServer_funcs
#ifdef VERY_VERBOSE
printf("function executed\n");
#endif
closeConnection(fd); //defined in communication_funcs
#ifdef VERY_VERBOSE
printf("connection closed\n");
#endif
}
}
exitServer(sockfd); //defined in communication_funcs
printf("Goodbye!\n");
return 0;
}

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slsDetectorSoftware/mythen3DetectorServer/slsDetectorServer_defs.h Normal file
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/*
* slsDetectorServer_defs.h
*
* Created on: Jan 24, 2013
* Author: l_maliakal_d
*/
#ifndef SLSDETECTORSERVER_DEFS_H_
#define SLSDETECTORSERVER_DEFS_H_
#include "sls_detector_defs.h"
#include <stdint.h>
/** This is only an example file!!! */
#define GOODBYE (-200)
enum DACINDEX {vIpre, vIbias, Vrf, VrfSh, vIinSh, VdcSh, Vth2, VPL, Vth1, Vth3, Vtrim, casSh, cas, vIbiasSh, vIcin, VPH, NC, vIpreOut}; // Mythen 3.01
#define DEFAULT_DAC_VALS {\
2150, /* vIpre */ \
1200, /* vIbias */ \
900, /* Vrf */ \
1050, /* VrfSh */ \
1400, /* vIinSh */ \
655, /* VdcSh */ \
850, /* Vth2 */ \
1400, /* VPL */ \
850, /* Vth1 */ \
850, /* Vth3 */ \
2294, /* Vtrim */ \
983, /* casSh */ \
1474, /* cas */ \
1200, /* vIbiasSh */ \
1600, /* vIcin */ \
1520, /* VPH */ \
0, /* NC */ \
1000 /* vIpreOut */ \
};
/*Hardware Definitions
#define NMAXMOD (1)
#define NMOD (1)
#define NCHAN (256 * 256)
#define NCHIP (4)
#define NADC (0)
#define NDAC (16)
#define NGAIN (0)
#define NOFFSET (0)
*/
/** Default Parameters */
#define DEFAULT_EXPTIME (10*1000) //ns
/* Hardware Definitions */
#define NMAXMOD (1)
#define NMOD (1)
#define NCHAN (256 * 256)
#define NCHIP (8)
#define NADC (0)
#define NDAC (8)
#define NDAC_OLDBOARD (16)
#define DYNAMIC_RANGE (16)
#define NUM_BITS_PER_PIXEL (DYNAMIC_RANGE / 8)
#define DATA_BYTES (NCHIP * NCHAN * NUM_BITS_PER_PIXEL)
#define IP_PACKETSIZE (0x2052)
#define CLK_RUN (40) /* MHz */
#define CLK_SYNC (20) /* MHz */
// Hardware definitions
#define NCHAN 36
#define NCHIP 1
#define NADC 9 //
/* #ifdef CTB */
/* #define NDAC 24 */
/* #define NPWR 5 */
/* #else */
/* #define NDAC 16 */
/* #define NPWR 0 */
/* #endif */
#define DAC_CMD_OFF 20
#define NMAXMODX 1
#define NMAXMODY 1
#define NMAXMOD (NMAXMODX*NMAXMODY)
#define NCHANS (NCHAN*NCHIP*NMAXMOD)
#define NDACS (NDAC*NMAXMOD)
#endif /* SLSDETECTORSERVER_DEFS_H_ */

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slsDetectorSoftware/mythen3DetectorServer/slsDetectorServer_funcs.c Executable file
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slsDetectorSoftware/mythen3DetectorServer/slsDetectorServer_funcs.h Executable file
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#ifndef SERVER_FUNCS_H
#define SERVER_FUNCS_H
#include "sls_receiver_defs.h"
#include <stdlib.h>
// initialization functions
int printSocketReadError();
void basictests(int);
void init_detector(int);
int decode_function(int);
const char* getFunctionName(enum detFuncs func);
void function_table();
int M_nofunc(int);
// functions called by client
int exec_command(int);
int get_error(int);
int get_detector_type(int);
int set_number_of_modules(int);
int get_max_number_of_modules(int);
int set_external_signal_flag(int);
int set_external_communication_mode(int);
int get_id(int);
int digital_test(int);
int analog_test(int);
int enable_analog_out(int);
int calibration_pulse(int);
int set_dac(int);
int get_adc(int);
int write_register(int);
int read_register(int);
int write_memory(int);
int read_memory(int);
int set_channel(int);
int get_channel(int);
int set_all_channels(int);
int set_chip(int);
int get_chip(int);
int set_all_chips(int);
int set_module(int);
int get_module(int);
int set_all_modules(int);
int set_settings(int);
int get_threshold_energy(int);
int set_threshold_energy(int);
int start_acquisition(int);
int stop_acquisition(int);
int start_readout(int);
int get_run_status(int);
int start_and_read_all(int);
int read_frame(int);
int read_all(int);
int set_timer(int);
int get_time_left(int);
int set_dynamic_range(int);
int set_readout_flags(int);
int set_roi(int);
int set_speed(int);
int execute_trimming(int);
int exit_server(int);
int lock_server(int);
int get_last_client_ip(int);
int set_port(int);
int update_client(int);
int send_update(int);
int configure_mac(int);
int load_image(int);
int set_master(int);
int set_synchronization(int);
int read_counter_block(int);
int reset_counter_block(int);
int calibrate_pedestal(int);
int enable_ten_giga(int);
int set_all_trimbits(int);
int set_ctb_pattern(int);
int write_adc_register(int);
int set_counter_bit(int);
int pulse_pixel(int);
int pulse_pixel_and_move(int);
int pulse_chip(int);
int set_rate_correct(int);
int get_rate_correct(int);
int set_network_parameter(int);
int program_fpga(int);
int reset_fpga(int);
int power_chip(int);
int set_activate(int);
int prepare_acquisition(int);
int cleanup_acquisition(int);
#endif

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slsDetectorSoftware/mythen3DetectorServer/slsDetector_stopServer.c Executable file
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/* A simple server in the internet domain using TCP
The port number is passed as an argument */
#include "communication_funcs.h"
#include "slsDetectorFunctionList.h"/*#include "slsDetector_firmware.h" for the time being*/
#include "slsDetectorServer_defs.h"
#include <stdio.h>
#include <stdlib.h>
int sockfd;
int main(int argc, char *argv[])
{
int portno;
int retval=0;
int sd,fd;
portno = DEFAULT_PORTNO;
sd=bindSocket(portno); //defined in communication_funcs
if (getServerError(sd)) //defined in communication_funcs
return -1;
/* waits for connection */
while(retval!=GOODBYE) {
#ifdef VERBOSE
printf("\n");
#endif
#ifdef VERY_VERBOSE
printf("Stop server: waiting for client call\n");
#endif
fd=acceptConnection(sd); //defined in communication_funcs
retval=stopStateMachine();//defined in slsDetectorFirmare_funcs
closeConnection(fd); //defined in communication_funcs
}
exitServer(sd); //defined in communication_funcs
printf("Goodbye!\n");
return 0;
}

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#ifndef SLS_DETECTOR_DEFS_H
#define SLS_DETECTOR_DEFS_H
#ifdef __CINT__
#define MYROOT
#define __cplusplus
#endif
//#include <stdint.h>
#include "sls_receiver_defs.h"
/** default maximum string length */
#define MAX_SCAN_STEPS 2000
/** maxmimum number of modules per controller*/
#define MAXMODS 24
/** maxmimum number of detectors ina multidetector structure*/
#define MAXDET 100
/** header length for data :gotthard*/
#define HEADERLENGTH 12
/** maximum rois */
#define MAX_ROIS 100
/** maximum unit size of program sent to detector */
#define MAX_FPGAPROGRAMSIZE (2 * 1024 *1024)
#define MAX_SCAN_LEVELS 2
typedef char mystring[MAX_STR_LENGTH];
typedef double mysteps[MAX_SCAN_STEPS];
#ifndef DACS_FLOAT
typedef int dacs_t;
#else
typedef float dacs_t;
#endif
#define DEFAULT_DET_MAC "00:aa:bb:cc:dd:ee"
#define DEFAULT_DET_IP "129.129.202.46"
/**
\file sls_detector_defs.h
This file contains all the basic definitions common to the slsDetector class
and to the server programs running on the detector
* @author Anna Bergamaschi
* @version 0.1alpha (any string)
* @see slsDetector
$Revision: 824 $
*/
/** get flag form most functions */
#define GET_FLAG -1
#ifdef __cplusplus
/** @short class containing all the structures, constants and enum definitions */
class slsDetectorDefs: public virtual slsReceiverDefs{
public:
slsDetectorDefs(){};
#endif
enum {startScript, scriptBefore, headerBefore, headerAfter,scriptAfter, stopScript, enCalLog, angCalLog, MAX_ACTIONS};
/**
@short structure for a detector channel
should not be used by unexperienced users
\see ::channelRegisterBit
*/
typedef struct {
int chan; /**< is the channel number */
int chip; /**< is the chip number */
int module; /**< is the module number */
int64_t reg; /**< is the is the channel register (e.g. trimbits, calibration enable, comparator enable...) */
} sls_detector_channel;
/**
@short structure for a detector chip
should not be used by unexperienced users
\see ::chipRegisterBit ::channelRegisterBit
*/
typedef struct {
int chip; /**< is the chip number */
int module; /**< is the module number */
int nchan; /**< is the number of channels in the chip */
int reg; /**<is the chip register (e.g. output analogue buffer enable)
\see ::chipRegisterBit */
int *chanregs; /**< is the pointer to the array of the channel registers
\see ::channelRegisterBit */
} sls_detector_chip;
/**
@short structure for a detector module
should not be used by unexperienced users
\see :: moduleRegisterBit ::chipRegisterBit :channelRegisterBit
@li reg is the module register (e.g. dynamic range? see moduleRegisterBit)
@li dacs is the pointer to the array of dac values (in V)
@li adcs is the pointer to the array of adc values (in V)
@li chipregs is the pointer to the array of chip registers
@li chanregs is the pointer to the array of channel registers
@li gain is the module gain
@li offset is the module offset
*/
typedef struct {
int module; /**< is the module number */
int serialnumber; /**< is the module serial number */
int nchan; /**< is the number of channels on the module*/
int nchip; /**< is the number of chips on the module */
int ndac; /**< is the number of dacs on the module */
int nadc; /**< is the number of adcs on the module */
int reg; /**< is the module register (e.g. dynamic range?)
\see moduleRegisterBit */
dacs_t *dacs; /**< is the pointer to the array of the dac values (in V) */
dacs_t *adcs; /**< is the pointer to the array of the adc values (in V) FLAT_FIELD_CORRECTION*/
int *chipregs; /**< is the pointer to the array of the chip registers
\see ::chipRegisterBit */
int *chanregs; /**< is the pointer to the array of the channel registers
\see ::channelRegisterBit */
double gain; /**< is the module gain (V/keV) */
double offset; /**< is the module offset (V) */
} sls_detector_module;
/**
@short structure for a region of interest
xmin,xmax,ymin,ymax define the limits of the region
*/
typedef struct {
int xmin; /**< is the roi xmin (in channel number) */
int xmax; /**< is the roi xmax (in channel number)*/
int ymin; /**< is the roi ymin (in channel number)*/
int ymax; /**< is the roi ymax (in channel number)*/
} ROI ;
/* /\* */
/* @short structure for a generic integer array */
/* *\/ */
/* typedef struct { */
/* int len; /\**< is the number of elements of the array *\/ */
/* int *iptr; /\**< is the pointer to the array *\/ */
/* } iarray ; */
/* /\** */
/* Communication protocol (normally TCP) */
/* *\/ */
/* enum communicationProtocol{ */
/* TCP, /\**< TCP/IP *\/ */
/* UDP /\**< UDP *\/ */
/* }; */
/**
network parameters
*/
enum networkParameter {
DETECTOR_MAC, /**< detector MAC */
DETECTOR_IP, /**< detector IP */
RECEIVER_HOSTNAME, /**< receiver IP/hostname */
RECEIVER_UDP_IP, /**< receiever UDP IP */
RECEIVER_UDP_PORT, /**< receiever UDP Port */
RECEIVER_UDP_MAC, /**< receiever UDP MAC */
RECEIVER_UDP_PORT2, /**< receiever UDP Port of second half module for eiger */
DETECTOR_TXN_DELAY_LEFT, /**< transmission delay on the (left) port for next frame */
DETECTOR_TXN_DELAY_RIGHT, /**< transmission delay on the right port for next frame */
DETECTOR_TXN_DELAY_FRAME, /**< transmission delay of a whole frame for all the ports */
FLOW_CONTROL_10G, /**< flow control for 10GbE */
FLOW_CONTROL_WR_PTR, /**< memory write pointer for flow control */
FLOW_CONTROL_RD_PTR, /**< memory read pointer for flow control */
RECEIVER_STREAMING_PORT, /**< receiever streaming TCP(ZMQ) port */
CLIENT_STREAMING_PORT, /**< client streaming TCP(ZMQ) port */
RECEIVER_STREAMING_SRC_IP,/**< receiever streaming TCP(ZMQ) ip */
CLIENT_STREAMING_SRC_IP /**< client streaming TCP(ZMQ) ip */
};
/**
type of action performed (for text client)
*/
enum {GET_ACTION, PUT_ACTION, READOUT_ACTION, HELP_ACTION};
/** online flags enum \sa setOnline*/
enum {GET_ONLINE_FLAG=-1, /**< returns wether the detector is in online or offline state */
OFFLINE_FLAG=0, /**< detector in offline state (i.e. no communication to the detector - using only local structure - no data acquisition possible!) */
ONLINE_FLAG =1/**< detector in online state (i.e. communication to the detector updating the local structure) */
};
/**
flags to get (or set) the size of the detector
*/
enum numberOf {
MAXMODX, /**<maximum number of module in X direction */
MAXMODY, /**<maximum number of module in Y direction */
NMODX, /**<installed number of module in X direction */
NMODY, /**<installed number of module in Y direction */
NCHANSX, /**<number of channels in X direction */
NCHANSY, /**<number of channels in Y direction */
NCHIPSX, /**<number of chips in X direction */
NCHIPSY /**<number of chips in Y direction */
};
/**
dimension indexes
*/
enum dimension {
X=0, /**< X dimension */
Y=1, /**< Y dimension */
Z=2 /**< Z dimension */
};
/**
enable/disable flags
*/
enum {
DISABLED, /**<flag disabled */
ENABLED /**<flag enabled */
};
/**
use of the external signals
*/
enum externalSignalFlag {
GET_EXTERNAL_SIGNAL_FLAG=-1, /**<return flag for signal */
SIGNAL_OFF, /**<signal unused - tristate*/
GATE_IN_ACTIVE_HIGH, /**<input gate active high*/
GATE_IN_ACTIVE_LOW, /**<input gate active low */
TRIGGER_IN_RISING_EDGE, /**<input exposure trigger on rising edge */
TRIGGER_IN_FALLING_EDGE, /**<input exposure trigger on falling edge */
RO_TRIGGER_IN_RISING_EDGE, /**<input raedout trigger on rising edge */
RO_TRIGGER_IN_FALLING_EDGE, /**<input readout trigger on falling edge */
GATE_OUT_ACTIVE_HIGH, /**<output active high when detector is exposing*/
GATE_OUT_ACTIVE_LOW, /**<output active low when detector is exposing*/
TRIGGER_OUT_RISING_EDGE, /**<output trigger rising edge at start of exposure */
TRIGGER_OUT_FALLING_EDGE, /**<output trigger falling edge at start of exposure */
RO_TRIGGER_OUT_RISING_EDGE, /**<output trigger rising edge at start of readout */
RO_TRIGGER_OUT_FALLING_EDGE, /**<output trigger falling edge at start of readout */
OUTPUT_LOW, /**< output always low */
OUTPUT_HIGH, /**< output always high */
MASTER_SLAVE_SYNCHRONIZATION /**< reserved for master/slave synchronization in multi detector systems */
};
/**
communication mode using external signals
*/
enum externalCommunicationMode{
GET_EXTERNAL_COMMUNICATION_MODE=-1,/**<return flag for communication mode */
AUTO_TIMING, /**< internal timing */
TRIGGER_EXPOSURE, /**< trigger mode i.e. exposure is triggered */
TRIGGER_READOUT, /**< stop trigger mode i.e. readout is triggered by external signal */
GATE_FIX_NUMBER, /**< gated and reads out after a fixed number of gates */
GATE_WITH_START_TRIGGER, /**< gated with start trigger */
BURST_TRIGGER /**< trigger a burst of frames */
};
/**
detector IDs/versions
*/
enum idMode{
MODULE_SERIAL_NUMBER, /**<return module serial number */
MODULE_FIRMWARE_VERSION, /**<return module firmware */
DETECTOR_SERIAL_NUMBER, /**<return detector system serial number */
DETECTOR_FIRMWARE_VERSION, /**<return detector system firmware version */
DETECTOR_SOFTWARE_VERSION, /**<return detector system software version */
THIS_SOFTWARE_VERSION, /**<return this software version */
RECEIVER_VERSION, /**<return receiver software version */
SOFTWARE_FIRMWARE_API_VERSION /** return software firmware API version **/
};
/**
detector digital test modes
*/
enum digitalTestMode {
CHIP_TEST, /**< test chips */
MODULE_FIRMWARE_TEST, /**< test module firmware */
DETECTOR_FIRMWARE_TEST, /**< test detector system firmware */
DETECTOR_MEMORY_TEST, /**< test detector system memory */
DETECTOR_BUS_TEST, /**< test detector system CPU-FPGA bus */
DETECTOR_SOFTWARE_TEST, /**< test detector system software */
DIGITAL_BIT_TEST /**< gotthard digital bit test */
};
/**
detector analogue test modes
*/
enum analogTestMode {
CALIBRATION_PULSES, /**< test using calibration pulses */
MY_ANALOG_TEST_MODE /**< other possible test modes */
};
/**
detector dacs indexes
*/
enum dacIndex {
THRESHOLD, /**< comparator threshold level */
CALIBRATION_PULSE, /**< calibration input pulse height */
TRIMBIT_SIZE, /**< voltage to determine the trimbits LSB */
PREAMP, /**< preamp feedback */
SHAPER1, /**< shaper1 feedback */
SHAPER2, /**< shaper2 feedback */
TEMPERATURE_ADC, /**< temperature sensor (adc) */
TEMPERATURE_FPGA, /**< temperature sensor (fpga) */
HUMIDITY, /**< humidity sensor (adc) */
DETECTOR_BIAS,/**< detector bias */
VA_POT, /**< power supply va */
VDD_POT, /**< chiptest board power supply vdd */
VSH_POT, /**< chiptest board power supply vsh */
VIO_POT, /**< chiptest board power supply va */
HV_POT, /**< gotthard, chiptest board high voltage */
G_VREF_DS, /**< gotthard */
G_VCASCN_PB, /**< gotthard */
G_VCASCP_PB, /**< gotthard */
G_VOUT_CM, /**< gotthard */
G_VCASC_OUT, /**< gotthard */
G_VIN_CM, /**< gotthard */
G_VREF_COMP, /**< gotthard */
G_IB_TESTC, /**< gotthard */
V_DAC0, /**< moench */
V_DAC1, /**< moench */
V_DAC2, /**< moench */
V_DAC3, /**< moench */
V_DAC4, /**< moench */
V_DAC5, /**< moench */
V_DAC6, /**< moench */
V_DAC7, /**< moench */
E_SvP, /**< eiger */
E_SvN, /**< eiger */
E_Vtr, /**< eiger */
E_Vrf, /**< eiger */
E_Vrs, /**< eiger */
E_Vtgstv , /**< eiger */
E_Vcmp_ll, /**< eiger */
E_Vcmp_lr, /**< eiger */
E_cal, /**< eiger */
E_Vcmp_rl, /**< eiger */
E_Vcmp_rr, /**< eiger */
E_rxb_rb , /**< eiger */
E_rxb_lb, /**< eiger */
E_Vcp, /**< eiger */
E_Vcn, /**< eiger */
E_Vis, /**< eiger */
IO_DELAY, /**< eiger io delay */
ADC_VPP, /**< adc vpp for jctb */
HV_NEW, /**< new hv index for jungfrau & c */
TEMPERATURE_FPGAEXT, /**< temperature sensor (close to fpga) */
TEMPERATURE_10GE, /**< temperature sensor (close to 10GE) */
TEMPERATURE_DCDC, /**< temperature sensor (close to DCDC) */
TEMPERATURE_SODL, /**< temperature sensor (close to SODL) */
TEMPERATURE_SODR, /**< temperature sensor (close to SODR) */
TEMPERATURE_FPGA2, /**< temperature sensor (fpga2 (eiger:febl) */
TEMPERATURE_FPGA3, /**< temperature sensor (fpga3 (eiger:febr) */
M_vIpre, /**< mythen 3 >*/
M_Vrf, /**< mythen 3 >*/
M_VrfSh, /**< mythen 3 >*/
M_Vth1, /**< mythen 3 >*/
M_Vth2, /**< mythen 3 >*/
M_Vth3, /**< mythen 3 >*/
M_Vtrim, /**< mythen 3 >*/
M_VPL, /**< mythen 3 >*/
M_VPH, /**< mythen 3 >*/
V_POWER_A = 100, /**new chiptest board */
V_POWER_B = 101, /**new chiptest board */
V_POWER_C = 102, /**new chiptest board */
V_POWER_D = 103, /**new chiptest board */
V_POWER_IO =104, /**new chiptest board */
V_POWER_CHIP=105 ,/**new chiptest board */
I_POWER_A=106 , /**new chiptest board */
I_POWER_B=107 , /**new chiptest board */
I_POWER_C=108 , /**new chiptest board */
I_POWER_D=109 , /**new chiptest board */
I_POWER_IO=110 , /**new chiptest board */
V_LIMIT=111 /**new chiptest board */
};
/**
detector settings indexes
*/
enum detectorSettings{
GET_SETTINGS=-1, /**< return current detector settings */
STANDARD, /**< standard settings */
FAST, /**< fast settings */
HIGHGAIN, /**< highgain settings */
DYNAMICGAIN, /**< dynamic gain settings */
LOWGAIN, /**< low gain settings */
MEDIUMGAIN, /**< medium gain settings */
VERYHIGHGAIN, /**< very high gain settings */
LOWNOISE, /**< low noise settings */
DYNAMICHG0, /**< dynamic high gain 0 */
FIXGAIN1, /**< fix gain 1 */
FIXGAIN2, /**< fix gain 2 */
FORCESWITCHG1, /**< force switch gain 1 */
FORCESWITCHG2, /**< force switch gain 2 */
VERYLOWGAIN, /**< very low gain settings */
UNDEFINED=200, /**< undefined or custom settings */
UNINITIALIZED /**< uninitialiazed (status at startup) */
};
/**
meaning of the channel register bits
\see ::sls_detector_channel
*/
enum channelRegisterBit {
TRIMBIT_OFF=0, /**< offset of trimbit value in the channel register */
COMPARATOR_ENABLE=0x100, /**< mask of the comparator enable bit */
ANALOG_SIGNAL_ENABLE=0x200, /**< mask of the analogue output enable bit */
CALIBRATION_ENABLE=0x300, /**< mask of the calibration input enable bit */
};
#define TRIMBITMASK 0x3f
/**
meaning of the chip register bits
\see ::sls_detector_chip
*/
enum chipRegisterBit {
ENABLE_ANALOG_OUTPUT=0x1, /**< mask of the analogue output enable bit */
CHIP_OUTPUT_WIDTH=0x2 /**< mask of the chip output width */
};
/**
meaning of the module register bits
*/
enum moduleRegisterBit {
MY_MODULE_REGISTER_BIT, /**< possible module register bit meaning */
MODULE_OUTPUT_WIDTH /**< possibly module dynamic range */
};
/**
important speed parameters
*/
enum speedVariable {
CLOCK_DIVIDER, /**< readout clock divider */
WAIT_STATES, /**< wait states for bus read */
TOT_CLOCK_DIVIDER, /**< wait states for bus read */
TOT_DUTY_CYCLE, /**< wait states for bus read */
SET_SIGNAL_LENGTH, /**< set/clear signal length */
PHASE_SHIFT, /**< adds phase shift */
OVERSAMPLING, /**< oversampling for analog detectors */
ADC_CLOCK, /**< adc clock divider */
ADC_PHASE, /**< adc clock phase */
ADC_PIPELINE, /**< adc pipeline */
DBIT_CLOCK, /**< adc clock divider */
DBIT_PHASE, /**< adc clock phase */
DBIT_PIPELINE /**< adc pipeline */
};
/**
readout flags
*/
enum readOutFlags {
GET_READOUT_FLAGS=-1, /**< return readout flags */
NORMAL_READOUT=0, /**< no flag */
STORE_IN_RAM=0x1, /**< data are stored in ram and sent only after end of acquisition for faster frame rate */
READ_HITS=0x2, /**< return only the number of the channel which counted ate least one */
ZERO_COMPRESSION=0x4,/**< returned data are 0-compressed */
PUMP_PROBE_MODE=0x8,/**<pump-probe mode */
BACKGROUND_CORRECTIONS=0x1000, /**<background corrections */
TOT_MODE=0x2000,/**< pump-probe mode */
CONTINOUS_RO=0x4000,/**< pump-probe mode */
PARALLEL=0x10000,/**< eiger parallel mode */
NONPARALLEL=0x20000,/**< eiger serial mode */
SAFE=0x40000/**< eiger safe mode */,
DIGITAL_ONLY=0x80000, /** chiptest board read only digital bits (not adc values)*/
ANALOG_AND_DIGITAL=0x100000, /** chiptest board read adc values and digital bits digital bits */
DUT_CLK=0x200000, /** chiptest board fifo clock comes from device under test */
};
/**
trimming modes
*/
enum trimMode {
NOISE_TRIMMING, /**< trim with noise */
BEAM_TRIMMING, /**< trim with x-rays (on all 63 bits) */
IMPROVE_TRIMMING, /**< trim with x-rays (on a limited range of bits - should start from an already trimmed mode) */
FIXEDSETTINGS_TRIMMING,/**< trim without optimizing the threshold and the trimbit size */
OFFLINE_TRIMMING /**< trimming is performed offline */
};
/**
data correction flags
*/
enum correctionFlags {
DISCARD_BAD_CHANNELS, /**< bad channels are discarded */
AVERAGE_NEIGHBOURS_FOR_BAD_CHANNELS, /**< bad channels are replaced with the avergae of the neighbours */
FLAT_FIELD_CORRECTION, /**< data are flat field corrected */
RATE_CORRECTION, /**< data are rate corrected */
ANGULAR_CONVERSION,/**< angular conversion is calculated */
WRITE_FILE, /**< file write enable */
I0_NORMALIZATION,
OVERWRITE_FILE /**< file over write enable */
};
/** port type */
enum portType {
CONTROL_PORT, /**< control port */
STOP_PORT, /**<stop port */
DATA_PORT /**< receiver tcp port with client*/
};
/** hierarchy in multi-detector structure, if any */
enum masterFlags {
GET_MASTER=-1, /**< return master flag */
NO_MASTER, /**< no master/slave hierarchy defined */
IS_MASTER, /**<is master */
IS_SLAVE /**< is slave */
};
/** synchronization in a multidetector structure, if any */
enum synchronizationMode {
GET_SYNCHRONIZATION_MODE=-1, /**< the multidetector will return its synchronization mode */
NO_SYNCHRONIZATION, /**< all detectors are independent (no cabling) */
MASTER_GATES, /**< the master gates the other detectors */
MASTER_TRIGGERS, /**< the master triggers the other detectors */
SLAVE_STARTS_WHEN_MASTER_STOPS /**< the slave acquires when the master finishes, to avoid deadtime */
};
enum imageType {
DARK_IMAGE, /**< dark image */
GAIN_IMAGE /**< gain image */
};
/* /\** */
/* angular conversion constant for a module */
/* *\/ */
/* typedef struct { */
/* double center; /\**< center of the module (channel at which the radius is perpendicular to the module surface) *\/ */
/* double ecenter; /\**< error in the center determination *\/ */
/* double r_conversion; /\**< detector pixel size (or strip pitch) divided by the diffractometer radius *\/ */
/* double er_conversion; /\**< error in the r_conversion determination *\/ */
/* double offset; /\**< the module offset i.e. the position of channel 0 with respect to the diffractometer 0 *\/ */
/* double eoffset; /\**< error in the offset determination *\/ */
/* double tilt; /\**< ossible tilt in the orthogonal direction (unused)*\/ */
/* double etilt; /\**< error in the tilt determination *\/ */
/* } angleConversionConstant; */
enum angleConversionParameter {
ANGULAR_DIRECTION, /**< angular direction of the diffractometer */
GLOBAL_OFFSET, /**< global offset of the diffractometer */
FINE_OFFSET, /**< fine offset of the diffractometer */
BIN_SIZE, /**< angular bin size */
MOVE_FLAG, /**< wether the detector moves with the motor or not in a multi detector system */
SAMPLE_X, /**< sample displacement in the beam direction */
SAMPLE_Y /**< sample displacement orthogonal to the beam */
};
//typedef struct {
//float center; /**< center of the module (channel at which the radius is perpendicular to the module surface) */
//float ecenter; /**< error in the center determination */
//float r_conversion; /**< detector pixel size (or strip pitch) divided by the diffractometer radius */
//float er_conversion; /**< error in the r_conversion determination */
//float offset; /**< the module offset i.e. the position of channel 0 with respect to the diffractometer 0 */
//float eoffset; /**< error in the offset determination */
//float tilt; /**< ossible tilt in the orthogonal direction (unused)*/
//float etilt; /**< error in the tilt determination *//
//} angleConversionConstant;
//#if defined(__cplusplus) && !defined(EIGERD)
#ifdef __cplusplus
protected:
#endif
#ifndef MYROOT
#include "sls_detector_funcs.h"
//#include "sls_receiver_funcs.h"
#endif
//#if defined(__cplusplus) && !defined(EIGERD)
#ifdef __cplusplus
};
#endif
;
#endif
;

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/**
@internal
function indexes to call on the server
All set functions with argument -1 work as get, when possible
*/
#ifndef SLS_DETECTOR_FUNCS_H
#define SLS_DETECTOR_FUNCS_H
enum detFuncs{
// General purpose functions
F_EXEC_COMMAND=0, /**< command is executed */
F_GET_ERROR, /**< return detector error status */
// configuration functions
F_GET_DETECTOR_TYPE, /**< return detector type */
F_SET_NUMBER_OF_MODULES, /**< set/get number of installed modules */
F_GET_MAX_NUMBER_OF_MODULES, /**< get maximum number of installed modules */
F_SET_EXTERNAL_SIGNAL_FLAG, /**< set/get flag for external signal */
F_SET_EXTERNAL_COMMUNICATION_MODE, /**< set/get external communication mode (obsolete) */
// Tests and identification
F_GET_ID, /**< get detector id of version */
F_DIGITAL_TEST, /**< digital test of the detector */
F_ANALOG_TEST, /**<analog test of the detector */
F_ENABLE_ANALOG_OUT, /**<enable the analog output */
F_CALIBRATION_PULSE, /**<pulse the calibration input */
// Initialization functions
F_SET_DAC, /**< set DAC value */
F_GET_ADC, /**< get ADC value */
F_WRITE_REGISTER, /**< write to register */
F_READ_REGISTER, /**< read register */
F_WRITE_MEMORY, /**< write to memory */
F_READ_MEMORY, /**< read memory */
F_SET_CHANNEL, /**< initialize channel */
F_GET_CHANNEL, /**< get channel register */
F_SET_ALL_CHANNELS, /**< initialize all channels */
F_SET_CHIP, /**< initialize chip */
F_GET_CHIP, /**< get chip status */
F_SET_ALL_CHIPS, /**< initialize all chips */
F_SET_MODULE, /**< initialize module */
F_GET_MODULE, /**< get module status */
F_SET_ALL_MODULES, /**< initialize all modules */
F_SET_SETTINGS, /**< set detector settings */
F_GET_THRESHOLD_ENERGY, /**< get detector threshold (in eV) */
F_SET_THRESHOLD_ENERGY, /**< set detector threshold (in eV) */
// Acquisition functions
F_START_ACQUISITION, /**< start acquisition */
F_STOP_ACQUISITION, /**< stop acquisition */
F_START_READOUT, /**< start readout */
F_GET_RUN_STATUS, /**< get acquisition status */
F_START_AND_READ_ALL, /**< start acquisition and read all frames*/
F_READ_FRAME, /**< read one frame */
F_READ_ALL, /**< read alla frames */
//Acquisition setup functions
F_SET_TIMER, /**< set/get timer value */
F_GET_TIME_LEFT, /**< get current value of the timer (time left) */
F_SET_DYNAMIC_RANGE, /**< set/get detector dynamic range */
F_SET_READOUT_FLAGS, /**< set/get readout flags */
F_SET_ROI, /**< set/get region of interest */
F_SET_SPEED, /**< set/get readout speed parameters */
//Trimming
F_EXECUTE_TRIMMING, /**< execute trimming */
F_EXIT_SERVER, /**< turn off detector server */
F_LOCK_SERVER, /**< Locks/Unlocks server communication to the given client */
F_GET_LAST_CLIENT_IP, /**< returns the IP of the client last connected to the detector */
F_SET_PORT, /**< Changes communication port of the server */
F_UPDATE_CLIENT, /**< Returns all the important parameters to update the shared memory of the client */
F_CONFIGURE_MAC, /**< Configures MAC for Gotthard readout */
F_LOAD_IMAGE, /**< Loads Dark/Gain image to the Gotthard detector */
// multi detector structures
F_SET_MASTER, /**< sets master/slave flag for multi detector structures */
F_SET_SYNCHRONIZATION_MODE, /**< sets master/slave synchronization mode for multidetector structures */
F_READ_COUNTER_BLOCK, /**< reads the counter block memory for gotthard */
F_RESET_COUNTER_BLOCK, /**< resets the counter block memory for gotthard */
F_CALIBRATE_PEDESTAL, /**< starts acquistion, calibrates pedestal and write back to fpga */
F_ENABLE_TEN_GIGA, /**< enable 10Gbe */
F_SET_ALL_TRIMBITS, /** < set all trimbits to this value */
F_SET_CTB_PATTERN, /** < loads a pattern in the CTB */
F_WRITE_ADC_REG, /** < writes an ADC register */
F_SET_COUNTER_BIT, /** < set/reset counter bit in detector for eiger */
F_PULSE_PIXEL, /** < pulse pixel n number of times in eiger at (x,y) */
F_PULSE_PIXEL_AND_MOVE, /** < pulse pixel n number of times and move relatively by x and y */
F_PULSE_CHIP, /** < pulse chip n number of times */
F_SET_RATE_CORRECT, /** < set/reset rate correction tau */
F_GET_RATE_CORRECT, /** < get rate correction tau */
F_SET_NETWORK_PARAMETER, /**< set network parameters such as transmission delay, flow control */
F_PROGRAM_FPGA, /**< program FPGA */
F_RESET_FPGA, /**< reset FPGA */
F_POWER_CHIP, /**< power chip */
F_ACTIVATE, /** < activate */
F_PREPARE_ACQUISITION, /** < prepare acquisition */
F_CLEANUP_ACQUISITION, /** < clean up after acquisition */
/* Always append functions hereafter!!! */
/* Always append functions before!!! */
NUM_DET_FUNCTIONS,
TOO_MANY_FUNCTIONS_DEFINED=127 //you should get a compilation error if there are already so many functions defined. It conflicts with sls_receiver_funcs.h
};
#endif
/** @endinternal */

3
slsReceiverSoftware/include/sls_receiver_defs.h
View File

@ -72,7 +72,8 @@ public:
MOENCH, /**< moench */
JUNGFRAU, /**< jungfrau */
JUNGFRAUCTB, /**< jungfrauCTBversion */
PROPIX /**< propix */
PROPIX, /**< propix */
MYTHEN3 /**< mythen 3 */
};