mirror of
https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2025-04-23 06:50:02 +02:00
commit
e730c124e3
@ -165,16 +165,15 @@ void Beb_GetModuleConfiguration(int *master, int *top, int *normal) {
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LOG(logERROR, ("Module Configuration FAIL\n"));
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} else {
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// read data
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ret = Beb_Read32(csp0base, MODULE_CONFIGURATION_MASK);
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ret = Beb_Read32(csp0base, BEB_CONFIG_RD_OFST);
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LOG(logDEBUG1, ("Module Configuration OK\n"));
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LOG(logDEBUG1, ("Beb: value =0x%x\n", ret));
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if (ret & TOP_BIT_MASK) {
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if (ret & BEB_CONFIG_TOP_RD_MSK) {
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*top = 1;
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Beb_top = 1;
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}
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if (ret & MASTER_BIT_MASK)
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if (ret & BEB_CONFIG_MASTER_RD_MSK)
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*master = 1;
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if (ret & NORMAL_MODULE_BIT_MASK)
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if (ret & BEB_CONFIG_NORMAL_RD_MSK)
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*normal = 1;
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// close file pointer
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Beb_close(fd, csp0base);
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@ -298,125 +297,149 @@ int Beb_IsTransmitting(int *retval, int tengiga, int waitForDelay) {
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return OK;
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}
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/* do not work at the moment */
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int Beb_SetMasterViaSoftware() {
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void Beb_SetTopVariable(int val) { Beb_top = val; }
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int Beb_SetTop(enum TOPINDEX ind) {
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if (!Beb_activated)
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return 0;
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// mapping new memory
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u_int32_t *csp0base = 0;
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u_int32_t value = 0, ret = 1;
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// open file pointer
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u_int32_t value = 0;
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int fd = Beb_open(&csp0base, XPAR_PLB_GPIO_SYS_BASEADDR);
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if (fd < 0) {
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LOG(logERROR, ("Set Master FAIL\n"));
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} else {
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value = Beb_Read32(csp0base, MASTERCONFIG_OFFSET);
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value |= MASTER_BIT;
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value |= OVERWRITE_HARDWARE_BIT;
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int newval = Beb_Write32(csp0base, MASTERCONFIG_OFFSET, value);
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if (newval != value) {
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LOG(logERROR, ("Could not set Master via Software\n"));
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} else {
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ret = 0;
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}
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LOG(logERROR, ("Set Top FAIL, could not open fd in Beb\n"));
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return 0;
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}
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value = Beb_Read32(csp0base, BEB_CONFIG_WR_OFST);
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switch (ind) {
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case TOP_HARDWARE:
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value &= ~BEB_CONFIG_OW_TOP_MSK;
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break;
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case OW_TOP:
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value |= BEB_CONFIG_OW_TOP_MSK;
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value |= BEB_CONFIG_TOP_MSK;
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break;
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case OW_BOTTOM:
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value |= BEB_CONFIG_OW_TOP_MSK;
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value &= ~BEB_CONFIG_TOP_MSK;
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break;
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default:
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LOG(logERROR, ("Unknown top index in Beb: %d\n", ind));
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Beb_close(fd, csp0base);
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return 0;
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}
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// close file pointer
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if (fd > 0)
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char *top_names[] = {TOP_NAMES};
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int newval = Beb_Write32(csp0base, BEB_CONFIG_WR_OFST, value);
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if (newval != value) {
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LOG(logERROR,
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("Could not set Top flag to %s in Beb\n", top_names[ind]));
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Beb_close(fd, csp0base);
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return ret;
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return 0;
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}
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LOG(logINFOBLUE,
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("%s Top flag to %s in Beb\n",
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(ind == TOP_HARDWARE ? "Resetting" : "Overwriting"), top_names[ind]));
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Beb_close(fd, csp0base);
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return 1;
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}
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/* do not work at the moment */
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int Beb_SetSlaveViaSoftware() {
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int Beb_SetMaster(enum MASTERINDEX ind) {
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if (!Beb_activated)
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return 0;
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// mapping new memory
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u_int32_t *csp0base = 0;
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u_int32_t value = 0, ret = 1;
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// open file pointer
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u_int32_t value = 0;
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int fd = Beb_open(&csp0base, XPAR_PLB_GPIO_SYS_BASEADDR);
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if (fd < 0) {
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LOG(logERROR, ("Set Slave FAIL\n"));
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} else {
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value = Beb_Read32(csp0base, MASTERCONFIG_OFFSET);
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value &= ~MASTER_BIT;
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value |= OVERWRITE_HARDWARE_BIT;
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int newval = Beb_Write32(csp0base, MASTERCONFIG_OFFSET, value);
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if (newval != value) {
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LOG(logERROR, ("Could not set Slave via Software\n"));
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} else {
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ret = 0;
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}
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LOG(logERROR, ("Set Master FAIL, could not open fd in Beb\n"));
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return 0;
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}
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value = Beb_Read32(csp0base, BEB_CONFIG_WR_OFST);
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switch (ind) {
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case MASTER_HARDWARE:
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value &= ~BEB_CONFIG_OW_MASTER_MSK;
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break;
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case OW_MASTER:
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value |= BEB_CONFIG_OW_MASTER_MSK;
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value |= BEB_CONFIG_MASTER_MSK;
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break;
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case OW_SLAVE:
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value |= BEB_CONFIG_OW_MASTER_MSK;
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value &= ~BEB_CONFIG_MASTER_MSK;
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break;
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default:
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LOG(logERROR, ("Unknown master index in Beb: %d\n", ind));
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Beb_close(fd, csp0base);
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return 0;
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}
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// close file pointer
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if (fd > 0)
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char *master_names[] = {MASTER_NAMES};
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int newval = Beb_Write32(csp0base, BEB_CONFIG_WR_OFST, value);
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if (newval != value) {
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LOG(logERROR,
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("Could not set Master flag to %s in Beb\n", master_names[ind]));
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Beb_close(fd, csp0base);
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return 0;
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}
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LOG(logINFOBLUE, ("%s Master flag to %s in Beb\n",
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(ind == MASTER_HARDWARE ? "Resetting" : "Overwriting"),
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master_names[ind]));
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return ret;
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Beb_close(fd, csp0base);
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return 1;
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}
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int Beb_Activate(int enable) {
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// mapping new memory
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int Beb_SetActivate(int enable) {
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if (enable < 0) {
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LOG(logERROR, ("Invalid enable value\n"));
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return 0;
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}
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u_int32_t *csp0base = 0;
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u_int32_t value = 0, ret = -1;
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// open file pointer
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int fd = Beb_open(&csp0base, XPAR_PLB_GPIO_SYS_BASEADDR);
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if (fd < 0) {
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LOG(logERROR, ("Deactivate FAIL\n"));
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LOG(logERROR, ("Activate FAIL, could not open fd\n"));
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return 0;
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} else {
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if (enable > -1) {
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value = Beb_Read32(csp0base, MASTERCONFIG_OFFSET);
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LOG(logINFO, ("Deactivate register value before:%d\n", value));
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if (enable)
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value &= ~DEACTIVATE_BIT;
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else
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value |= DEACTIVATE_BIT;
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int newval = Beb_Write32(csp0base, MASTERCONFIG_OFFSET, value);
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if (newval != value) {
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if (enable) {
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LOG(logERROR, ("Could not activate via Software\n"));
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} else {
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LOG(logERROR, ("Could not deactivate via Software\n"));
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}
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}
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}
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value = Beb_Read32(csp0base, MASTERCONFIG_OFFSET);
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if (value & DEACTIVATE_BIT)
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ret = 0;
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u_int32_t value = Beb_Read32(csp0base, BEB_CONFIG_WR_OFST);
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LOG(logDEBUG, ("Activate register value before:%d\n", value));
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if (enable)
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value |= BEB_CONFIG_ACTIVATE_MSK;
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else
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ret = 1;
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if (enable == -1) {
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if (ret) {
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LOG(logINFOBLUE,
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("Detector is active. Register value:%d\n", value));
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} else {
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LOG(logERROR,
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("Detector is deactivated! Register value:%d\n", value));
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}
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value &= ~BEB_CONFIG_ACTIVATE_MSK;
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u_int32_t retval = Beb_Write32(csp0base, BEB_CONFIG_WR_OFST, value);
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if (retval != value) {
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LOG(logERROR,
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("Could not %s. WRote 0x%x, read 0x%x\n",
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(enable ? "activate" : "deactivate"), value, retval));
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Beb_close(fd, csp0base);
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}
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}
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// close file pointer
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if (fd > 0)
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Beb_close(fd, csp0base);
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Beb_activated = ret;
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return ret;
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Beb_activated = enable;
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Beb_close(fd, csp0base);
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return 1;
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}
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int Beb_GetActivate() { return Beb_activated; }
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int Beb_GetActivate(int *retval) {
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u_int32_t *csp0base = 0;
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int fd = Beb_open(&csp0base, XPAR_PLB_GPIO_SYS_BASEADDR);
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if (fd < 0) {
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LOG(logERROR, ("Activate FAIL, could not open fd\n"));
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return 0;
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} else {
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u_int32_t value = Beb_Read32(csp0base, BEB_CONFIG_WR_OFST);
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Beb_activated = (value & BEB_CONFIG_ACTIVATE_MSK) ? 1 : 0;
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if (Beb_activated) {
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LOG(logINFOBLUE, ("Detector is active\n"));
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} else {
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LOG(logINFORED, ("Detector is deactivated!\n"));
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}
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}
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Beb_close(fd, csp0base);
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*retval = Beb_activated;
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return 1;
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}
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int Beb_Set32bitOverflow(int val) {
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if (!Beb_activated)
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@ -454,8 +477,7 @@ int Beb_Set32bitOverflow(int val) {
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FLOW_REG_OVERFLOW_32_BIT_OFST;
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}
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// close file pointer
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if (fd > 0)
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Beb_close(fd, csp0base);
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Beb_close(fd, csp0base);
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return valueread;
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}
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@ -465,8 +487,8 @@ int Beb_GetTenGigaFlowControl() {
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u_int32_t *csp0base = 0;
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int fd = Beb_open(&csp0base, XPAR_PLB_GPIO_SYS_BASEADDR);
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if (fd <= 0) {
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LOG(logERROR,
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("Could not read register to get ten giga flow control. FAIL\n"));
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LOG(logERROR, ("Could not read register to get ten giga flow "
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"control. FAIL\n"));
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return -1;
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} else {
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u_int32_t retval = Beb_Read32(csp0base, offset);
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@ -485,8 +507,8 @@ int Beb_SetTenGigaFlowControl(int value) {
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u_int32_t *csp0base = 0;
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int fd = Beb_open(&csp0base, XPAR_PLB_GPIO_SYS_BASEADDR);
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if (fd <= 0) {
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LOG(logERROR,
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("Could not read register to set ten giga flow control. FAIL\n"));
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LOG(logERROR, ("Could not read register to set ten giga flow "
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"control. FAIL\n"));
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return 0;
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} else {
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// reset bit
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@ -545,8 +567,8 @@ int Beb_GetTransmissionDelayLeft() {
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u_int32_t *csp0base = 0;
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int fd = Beb_open(&csp0base, XPAR_PLB_GPIO_SYS_BASEADDR);
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if (fd <= 0) {
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LOG(logERROR,
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("Could not read register to get transmission delay left. FAIL\n"));
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LOG(logERROR, ("Could not read register to get transmission delay "
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"left. FAIL\n"));
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return -1;
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} else {
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u_int32_t retval = Beb_Read32(csp0base, offset);
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@ -565,8 +587,8 @@ int Beb_SetTransmissionDelayLeft(int value) {
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u_int32_t *csp0base = 0;
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int fd = Beb_open(&csp0base, XPAR_PLB_GPIO_SYS_BASEADDR);
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if (fd <= 0) {
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LOG(logERROR,
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("Could not read register to set transmission delay left. FAIL\n"));
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LOG(logERROR, ("Could not read register to set transmission delay "
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"left. FAIL\n"));
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return 0;
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} else {
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Beb_Write32(csp0base, offset, value);
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@ -656,35 +678,6 @@ int Beb_SetNetworkParameter(enum NETWORKINDEX mode, int val) {
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return valueread;
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}
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int Beb_ResetToHardwareSettings() {
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if (!Beb_activated)
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return 1;
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// mapping new memory
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u_int32_t *csp0base = 0;
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u_int32_t value = 0, ret = 1;
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// open file pointer
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int fd = Beb_open(&csp0base, XPAR_PLB_GPIO_SYS_BASEADDR);
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if (fd < 0) {
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LOG(logERROR, ("Reset to Hardware Settings FAIL\n"));
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} else {
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value = Beb_Write32(csp0base, MASTERCONFIG_OFFSET, 0);
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if (value) {
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LOG(logERROR, ("Could not reset to hardware settings\n"));
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} else {
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ret = 0;
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}
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}
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// close file pointer
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if (fd > 0)
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Beb_close(fd, csp0base);
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return ret;
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}
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u_int32_t Beb_GetFirmwareRevision() {
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// mapping new memory
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u_int32_t *csp0base = 0;
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@ -697,8 +690,8 @@ u_int32_t Beb_GetFirmwareRevision() {
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} else {
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value = Beb_Read32(csp0base, FIRMWARE_VERSION_OFFSET);
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if (!value) {
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LOG(logERROR,
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("Firmware Revision Number does not exist in this version\n"));
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LOG(logERROR, ("Firmware Revision Number does not exist in "
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"this version\n"));
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}
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}
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@ -768,7 +761,8 @@ int Beb_InitBebInfos() { // file name at some point
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struct BebInfo b0;
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BebInfo_BebInfo(&b0, 0);
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if (BebInfo_SetSerialAddress(
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&b0, 0xff)) { // all bebs for reset and possibly get request data?
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&b0,
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0xff)) { // all bebs for reset and possibly get request data?
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beb_infos[bebInfoSize] = b0;
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bebInfoSize++;
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}
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@ -794,11 +788,11 @@ int Beb_InitBebInfos() { // file name at some point
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//loop through file to fill vector.
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BebInfo* b = new BebInfo(26);
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b->SetSerialAddress(0); //0xc4000000
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b->SetHeaderInfo(0,"00:50:c2:46:d9:34","129.129.205.78",42000 + 26); // 1 GbE,
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ip address can be acquire from the network "arp"
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b->SetHeaderInfo(0,"00:50:c2:46:d9:34","129.129.205.78",42000 + 26); // 1
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GbE, ip address can be acquire from the network "arp"
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b->SetHeaderInfo(1,"00:50:c2:46:d9:35","10.0.26.1",52000 + 26); //10 GbE,
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everything calculable/setable beb_infos.push_back(b);
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*/
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*/
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return Beb_CheckSourceStuffBebInfo();
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}
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@ -809,9 +803,11 @@ int Beb_SetBebSrcHeaderInfos(unsigned int beb_number, int ten_gig,
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// so that the values can be reset externally for now....
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unsigned int i = 1; /*Beb_GetBebInfoIndex(beb_number);*/
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/******* if (!i) return 0;****************************/ // i must be greater
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// than 0, zero is
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// the global send
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/******* if (!i) return 0;****************************/ // i must be
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// greater than
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// 0, zero is
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// the global
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// send
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BebInfo_SetHeaderInfo(&beb_infos[i], ten_gig, src_mac, src_ip, src_port);
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LOG(logINFO, ("Printing Beb info number (%d) :\n", i));
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@ -954,7 +950,7 @@ udp_header_type udp_header = {
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{0x00, 0x00}, //{0x00, 0x11},
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{0x00, 0x00}
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};
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*/
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*/
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if (!Beb_SetMAC(src_mac, &(udp_header.src_mac[0])))
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return 0;
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@ -1167,8 +1163,8 @@ int Beb_RequestNImages(unsigned int beb_number, int ten_gig,
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unsigned int nl = Beb_readNLines;
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unsigned int npackets = (nl * maxnp) / maxnl;
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if ((nl * maxnp) % maxnl) {
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LOG(logERROR,
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("Read N Lines is incorrect. Switching to Full Image Readout\n"));
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LOG(logERROR, ("Read N Lines is incorrect. Switching to Full Image "
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"Readout\n"));
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npackets = maxnp;
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}
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int in_two_requests = (npackets > MAX_PACKETS_PER_REQUEST) ? 1 : 0;
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@ -1270,8 +1266,8 @@ int Beb_Test(unsigned int beb_number) {
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LOG(logINFO, ("Testing module number: %d\n", beb_number));
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// int SetUpUDPHeader(unsigned int beb_number, int ten_gig, unsigned int
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// header_number, string dst_mac, string dst_ip, unsigned int dst_port) {
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// SetUpUDPHeader(26,0,0,"60:fb:42:f4:e3:d2","129.129.205.186",22000);
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// header_number, string dst_mac, string dst_ip, unsigned int dst_port)
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// { SetUpUDPHeader(26,0,0,"60:fb:42:f4:e3:d2","129.129.205.186",22000);
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unsigned int index = Beb_GetBebInfoIndex(beb_number);
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if (!index) {
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@ -1288,9 +1284,10 @@ int Beb_Test(unsigned int beb_number) {
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}
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}
|
||||
|
||||
// SendMultiReadRequest(unsigned int beb_number, unsigned int left_right,
|
||||
// int ten_gig, unsigned int dst_number, unsigned int npackets, unsigned
|
||||
// int packet_size, int stop_read_when_fifo_empty=1);
|
||||
// SendMultiReadRequest(unsigned int beb_number, unsigned int
|
||||
// left_right, int ten_gig, unsigned int dst_number, unsigned int
|
||||
// npackets, unsigned int packet_size, int
|
||||
// stop_read_when_fifo_empty=1);
|
||||
for (i = 0; i < 64; i++) {
|
||||
if (!Beb_SendMultiReadRequest(beb_number, i % 3 + 1, 0, i, 1, 0, 1)) {
|
||||
LOG(logERROR, ("Error requesting data....\n"));
|
||||
@ -1532,8 +1529,8 @@ int Beb_GetStartingFrameNumber(uint64_t *retval, int tengigaEnable) {
|
||||
(long long int)left1g, (long long int)right1g));
|
||||
*retval = (left1g > right1g)
|
||||
? left1g
|
||||
: right1g; // give max to set it to when stopping acq
|
||||
// & different value
|
||||
: right1g; // give max to set it to when stopping
|
||||
// acq & different value
|
||||
return -2; // to differentiate between failed address mapping
|
||||
}
|
||||
*retval = left1g;
|
||||
@ -1559,8 +1556,8 @@ int Beb_GetStartingFrameNumber(uint64_t *retval, int tengigaEnable) {
|
||||
(long long int)left10g, (long long int)right10g));
|
||||
*retval = (left10g > right10g)
|
||||
? left10g
|
||||
: right10g; // give max to set it to when stopping acq
|
||||
// & different value
|
||||
: right10g; // give max to set it to when stopping
|
||||
// acq & different value
|
||||
return -2; // to differentiate between failed address mapping
|
||||
}
|
||||
*retval = left10g;
|
||||
|
@ -36,10 +36,11 @@ unsigned int Beb_GetBebInfoIndex(unsigned int beb_numb);
|
||||
void Beb_GetModuleConfiguration(int *master, int *top, int *normal);
|
||||
int Beb_IsTransmitting(int *retval, int tengiga, int waitForDelay);
|
||||
|
||||
int Beb_SetMasterViaSoftware();
|
||||
int Beb_SetSlaveViaSoftware();
|
||||
int Beb_Activate(int enable);
|
||||
int Beb_GetActivate();
|
||||
void Beb_SetTopVariable(int val);
|
||||
int Beb_SetTop(enum TOPINDEX ind);
|
||||
int Beb_SetMaster(enum MASTERINDEX ind);
|
||||
int Beb_SetActivate(int enable);
|
||||
int Beb_GetActivate(int *retval);
|
||||
int Beb_Set32bitOverflow(int val);
|
||||
|
||||
int Beb_GetTenGigaFlowControl();
|
||||
@ -51,7 +52,6 @@ int Beb_SetTransmissionDelayLeft(int value);
|
||||
int Beb_GetTransmissionDelayRight();
|
||||
int Beb_SetTransmissionDelayRight(int value);
|
||||
|
||||
int Beb_ResetToHardwareSettings();
|
||||
u_int32_t Beb_GetFirmwareRevision();
|
||||
u_int32_t Beb_GetFirmwareSoftwareAPIVersion();
|
||||
void Beb_ResetFrameNumber();
|
||||
|
@ -2459,29 +2459,110 @@ int Feb_Control_GetInterruptSubframe() {
|
||||
return value[0];
|
||||
}
|
||||
|
||||
int Feb_Control_SetTop(enum TOPINDEX ind, int left, int right) {
|
||||
uint32_t offset = DAQ_REG_HRDWRE;
|
||||
unsigned int addr[2] = {0, 0};
|
||||
if (left) {
|
||||
addr[0] = Module_GetTopLeftAddress(&modules[1]);
|
||||
}
|
||||
if (right) {
|
||||
addr[1] = Module_GetTopRightAddress(&modules[1]);
|
||||
}
|
||||
char *top_names[] = {TOP_NAMES};
|
||||
int i = 0;
|
||||
for (i = 0; i < 2; ++i) {
|
||||
if (addr[i] == 0) {
|
||||
continue;
|
||||
}
|
||||
uint32_t value = 0;
|
||||
if (!Feb_Interface_ReadRegister(addr[i], offset, &value)) {
|
||||
LOG(logERROR, ("Could not read %s Feb reg to set Top flag\n",
|
||||
(i == 0 ? "left" : "right")));
|
||||
return 0;
|
||||
}
|
||||
switch (ind) {
|
||||
case TOP_HARDWARE:
|
||||
value &= ~DAQ_REG_HRDWRE_OW_TOP_MSK;
|
||||
break;
|
||||
case OW_TOP:
|
||||
value |= DAQ_REG_HRDWRE_OW_TOP_MSK;
|
||||
value |= DAQ_REG_HRDWRE_TOP_MSK;
|
||||
break;
|
||||
case OW_BOTTOM:
|
||||
value |= DAQ_REG_HRDWRE_OW_TOP_MSK;
|
||||
value &= ~DAQ_REG_HRDWRE_TOP_MSK;
|
||||
break;
|
||||
default:
|
||||
LOG(logERROR, ("Unknown top index in Feb: %d\n", ind));
|
||||
return 0;
|
||||
}
|
||||
if (!Feb_Interface_WriteRegister(addr[i], offset, value, 0, 0)) {
|
||||
LOG(logERROR, ("Could not set Top flag to %s in %s Feb\n",
|
||||
top_names[ind], (i == 0 ? "left" : "right")));
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
if (left && right) {
|
||||
LOG(logINFOBLUE, ("%s Top flag to %s Feb\n",
|
||||
(ind == TOP_HARDWARE ? "Resetting" : "Overwriting"),
|
||||
top_names[ind]));
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
|
||||
void Feb_Control_SetMasterVariable(int val) { Feb_control_master = val; }
|
||||
|
||||
int Feb_Control_SetMaster(enum MASTERINDEX ind) {
|
||||
uint32_t offset = DAQ_REG_HRDWRE;
|
||||
unsigned int addr[2] = {0, 0};
|
||||
addr[0] = Module_GetTopLeftAddress(&modules[1]);
|
||||
addr[1] = Module_GetTopRightAddress(&modules[1]);
|
||||
char *master_names[] = {MASTER_NAMES};
|
||||
int i = 0;
|
||||
for (i = 0; i < 2; ++i) {
|
||||
uint32_t value = 0;
|
||||
if (!Feb_Interface_ReadRegister(addr[i], offset, &value)) {
|
||||
LOG(logERROR, ("Could not read %s Feb reg to set Master flag\n",
|
||||
(i == 0 ? "left" : "right")));
|
||||
return 0;
|
||||
}
|
||||
switch (ind) {
|
||||
case MASTER_HARDWARE:
|
||||
value &= ~DAQ_REG_HRDWRE_OW_MASTER_MSK;
|
||||
break;
|
||||
case OW_MASTER:
|
||||
value |= DAQ_REG_HRDWRE_OW_MASTER_MSK;
|
||||
value |= DAQ_REG_HRDWRE_MASTER_MSK;
|
||||
break;
|
||||
case OW_SLAVE:
|
||||
value |= DAQ_REG_HRDWRE_OW_MASTER_MSK;
|
||||
value &= ~DAQ_REG_HRDWRE_MASTER_MSK;
|
||||
break;
|
||||
default:
|
||||
LOG(logERROR, ("Unknown master index in Feb: %d\n", ind));
|
||||
return 0;
|
||||
}
|
||||
|
||||
if (!Feb_Interface_WriteRegister(addr[i], offset, value, 0, 0)) {
|
||||
LOG(logERROR, ("Could not set Master flag to %s in %s Feb\n",
|
||||
master_names[ind], (i == 0 ? "left" : "right")));
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
LOG(logINFOBLUE, ("%s Master flag to %s Feb\n",
|
||||
(ind == MASTER_HARDWARE ? "Resetting" : "Overwriting"),
|
||||
master_names[ind]));
|
||||
return 1;
|
||||
}
|
||||
|
||||
int Feb_Control_SetQuad(int val) {
|
||||
// no bottom for quad
|
||||
if (!Module_TopAddressIsValid(&modules[1])) {
|
||||
return 1;
|
||||
}
|
||||
uint32_t offset = DAQ_REG_HRDWRE;
|
||||
LOG(logINFO, ("Setting Quad to %d in Feb\n", val));
|
||||
unsigned int addr = Module_GetTopRightAddress(&modules[1]);
|
||||
uint32_t regVal = 0;
|
||||
if (!Feb_Interface_ReadRegister(addr, offset, ®Val)) {
|
||||
LOG(logERROR, ("Could not read top right quad reg\n"));
|
||||
return 0;
|
||||
}
|
||||
uint32_t data =
|
||||
((val == 0)
|
||||
? (regVal & ~DAQ_REG_HRDWRE_OW_MSK)
|
||||
: ((regVal | DAQ_REG_HRDWRE_OW_MSK) & ~DAQ_REG_HRDWRE_TOP_MSK));
|
||||
if (!Feb_Interface_WriteRegister(addr, offset, data, 0, 0)) {
|
||||
LOG(logERROR, ("Could not write 0x%x to top right quad addr 0x%x\n",
|
||||
data, offset));
|
||||
return 0;
|
||||
}
|
||||
return 1;
|
||||
// only setting on the right feb if quad
|
||||
return Feb_Control_SetTop(val == 0 ? TOP_HARDWARE : OW_TOP, 0, 1);
|
||||
}
|
||||
|
||||
int Feb_Control_SetReadNLines(int value) {
|
||||
@ -2565,6 +2646,7 @@ int Feb_Control_ReadRegister(uint32_t offset, uint32_t *retval) {
|
||||
addr[1] = Module_TopAddressIsValid(&modules[1])
|
||||
? Module_GetTopLeftAddress(&modules[1])
|
||||
: Module_GetBottomLeftAddress(&modules[1]);
|
||||
|
||||
uint32_t value[2] = {0, 0};
|
||||
|
||||
int run[2] = {0, 0};
|
||||
|
@ -1,5 +1,6 @@
|
||||
#pragma once
|
||||
#include "FebInterface.h"
|
||||
#include "slsDetectorServer_defs.h"
|
||||
#include <netinet/in.h>
|
||||
|
||||
struct Module {
|
||||
@ -174,6 +175,10 @@ int64_t Feb_Control_GetSubMeasuredPeriod();
|
||||
int Feb_Control_SoftwareTrigger();
|
||||
int Feb_Control_SetInterruptSubframe(int val);
|
||||
int Feb_Control_GetInterruptSubframe();
|
||||
|
||||
int Feb_Control_SetTop(enum TOPINDEX ind, int left, int right);
|
||||
void Feb_Control_SetMasterVariable(int val);
|
||||
int Feb_Control_SetMaster(enum MASTERINDEX ind);
|
||||
int Feb_Control_SetQuad(int val);
|
||||
int Feb_Control_SetReadNLines(int value);
|
||||
int Feb_Control_GetReadNLines();
|
||||
|
@ -16,21 +16,24 @@
|
||||
#define DAQ_REG_PARTIAL_READOUT 8
|
||||
|
||||
#define DAQ_REG_HRDWRE 12
|
||||
|
||||
#define DAQ_REG_HRDWRE_OW_OFST (0)
|
||||
#define DAQ_REG_HRDWRE_OW_MSK (0x00000001 << DAQ_REG_HRDWRE_OW_OFST)
|
||||
// clang-format off
|
||||
#define DAQ_REG_HRDWRE_OW_TOP_OFST (0)
|
||||
#define DAQ_REG_HRDWRE_OW_TOP_MSK (0x00000001 << DAQ_REG_HRDWRE_OW_TOP_OFST)
|
||||
#define DAQ_REG_HRDWRE_TOP_OFST (1)
|
||||
#define DAQ_REG_HRDWRE_TOP_MSK (0x00000001 << DAQ_REG_HRDWRE_TOP_OFST)
|
||||
#define DAQ_REG_HRDWRE_INTRRPT_SF_OFST (2)
|
||||
#define DAQ_REG_HRDWRE_INTRRPT_SF_MSK \
|
||||
(0x00000001 << DAQ_REG_HRDWRE_INTRRPT_SF_OFST)
|
||||
#define DAQ_REG_HRDWRE_INTRRPT_SF_MSK (0x00000001 << DAQ_REG_HRDWRE_INTRRPT_SF_OFST)
|
||||
#define DAQ_REG_HRDWRE_OW_MASTER_OFST (3)
|
||||
#define DAQ_REG_HRDWRE_OW_MASTER_MSK (0x00000001 << DAQ_REG_HRDWRE_OW_MASTER_OFST)
|
||||
#define DAQ_REG_HRDWRE_MASTER_OFST (4)
|
||||
#define DAQ_REG_HRDWRE_MASTER_MSK (0x00000001 << DAQ_REG_HRDWRE_MASTER_OFST)
|
||||
|
||||
#define DAQ_REG_RO_OFFSET 20
|
||||
#define DAQ_REG_STATUS \
|
||||
(DAQ_REG_RO_OFFSET + 0) // also pg and fifo status register
|
||||
#define DAQ_REG_RO_OFFSET 20
|
||||
#define DAQ_REG_STATUS (DAQ_REG_RO_OFFSET + 0) // also pg and fifo status register
|
||||
#define FEB_REG_STATUS (DAQ_REG_RO_OFFSET + 3)
|
||||
#define MEAS_SUBPERIOD_REG (DAQ_REG_RO_OFFSET + 4)
|
||||
#define MEAS_PERIOD_REG (DAQ_REG_RO_OFFSET + 5)
|
||||
// clang-format on
|
||||
|
||||
#define DAQ_CTRL_RESET 0x80000000
|
||||
#define DAQ_CTRL_START 0x40000000
|
||||
@ -52,10 +55,11 @@
|
||||
#define DAQ_SERIALIN_SHIFT_IN_32 0x00000100
|
||||
#define DAQ_LOAD_16ROWS_OF_TRIMBITS 0x00000200
|
||||
|
||||
#define DAQ_IGNORE_INITIAL_CRAP 0x00000400 // crap before readout
|
||||
// crap before readout
|
||||
#define DAQ_IGNORE_INITIAL_CRAP 0x00000400
|
||||
#define DAQ_READOUT_NROWS 0x00000800
|
||||
#define DAQ_CLKOUT_LAST_4_BITS_AND_RETURN_TO_START \
|
||||
0x00001000 // last 4 bit of data in the last frame
|
||||
// last 4 bit of data in the last frame
|
||||
#define DAQ_CLKOUT_LAST_4_BITS_AND_RETURN_TO_START 0x00001000
|
||||
|
||||
#define DAQ_RELEASE_IMAGE_STORE_AFTER_READOUT 0x00002000
|
||||
#define DAQ_RESET_PIXEL_COUNTERS_AFTER_READOUT 0x00004000
|
||||
@ -64,23 +68,24 @@
|
||||
#define DAQ_CLK_MAIN_CLK_TO_SELECT_NEXT_PIXEL 0x00010000
|
||||
#define DAQ_SEND_N_TEST_PULSES 0x00020000
|
||||
|
||||
#define DAQ_CHIP_CONTROLLER_HALF_SPEED \
|
||||
0x00040000 // everything at 100 MHz (50MHz ddr readout)
|
||||
#define DAQ_CHIP_CONTROLLER_QUARTER_SPEED \
|
||||
0x00080000 // everything at 50 MHz (25MHz ddr readout)
|
||||
#define DAQ_CHIP_CONTROLLER_SUPER_SLOW_SPEED \
|
||||
0x000c0000 // everything at ~200 kHz (200 kHz MHz ddr readout)
|
||||
// everything at 100 MHz (50MHz ddr readout)
|
||||
#define DAQ_CHIP_CONTROLLER_HALF_SPEED 0x00040000
|
||||
// everything at 50 MHz (25MHz ddr readout)
|
||||
#define DAQ_CHIP_CONTROLLER_QUARTER_SPEED 0x00080000
|
||||
// everything at ~200 kHz (200 kHz MHz ddr readout)
|
||||
#define DAQ_CHIP_CONTROLLER_SUPER_SLOW_SPEED 0x000c0000
|
||||
|
||||
//#define DAQ_FIFO_ENABLE 0x00100000 commented out as it
|
||||
//#define DAQ_FIFO_ENABLE 0x00100000 commented out as it
|
||||
// is not used anywhere
|
||||
#define DAQ_REG_CHIP_CMDS_INT_TRIGGER 0x00100000
|
||||
|
||||
// direct chip commands to the DAQ_REG_CHIP_CMDS register
|
||||
#define DAQ_NEXPOSURERS_SAFEST_MODE_ROW_CLK_BEFORE_MODE \
|
||||
0x00200000 // row clk is before main clk readout sequence
|
||||
#define DAQ_NEXPOSURERS_NORMAL_NONPARALLEL_MODE \
|
||||
0x00400000 // expose ->readout ->expose -> ..., with store is always closed
|
||||
#define DAQ_NEXPOSURERS_PARALLEL_MODE 0x00600000 // parallel acquire/read mode
|
||||
// row clk is before main clk readout sequence
|
||||
#define DAQ_NEXPOSURERS_SAFEST_MODE_ROW_CLK_BEFORE_MODE 0x00200000
|
||||
// expose ->readout ->expose -> ..., with store is always closed
|
||||
#define DAQ_NEXPOSURERS_NORMAL_NONPARALLEL_MODE 0x00400000
|
||||
// parallel acquire/read mode
|
||||
#define DAQ_NEXPOSURERS_PARALLEL_MODE 0x00600000
|
||||
|
||||
// DAQ_NEXPOSURERS_READOUT_COMPLETE_IMAGES is old now hard-wired in the firmware
|
||||
// that every image comes with a header #define
|
||||
@ -91,12 +96,14 @@
|
||||
#define DAQ_NEXPOSURERS_EXTERNAL_ENABLING_POLARITY 0x02000000
|
||||
#define DAQ_NEXPOSURERS_EXTERNAL_TRIGGER_POLARITY 0x04000000
|
||||
|
||||
#define DAQ_NEXPOSURERS_INTERNAL_ACQUISITION 0x00000000 // internally controlled
|
||||
#define DAQ_NEXPOSURERS_EXTERNAL_ACQUISITION_START \
|
||||
0x08000000 // external acquisition start
|
||||
#define DAQ_NEXPOSURERS_EXTERNAL_IMAGE_START 0x10000000 // external image start
|
||||
#define DAQ_NEXPOSURERS_EXTERNAL_IMAGE_START_AND_STOP \
|
||||
0x18000000 // externally controlly, external image start and stop
|
||||
// internally controlled
|
||||
#define DAQ_NEXPOSURERS_INTERNAL_ACQUISITION 0x00000000
|
||||
// external acquisition start
|
||||
#define DAQ_NEXPOSURERS_EXTERNAL_ACQUISITION_START 0x08000000
|
||||
// external image start
|
||||
#define DAQ_NEXPOSURERS_EXTERNAL_IMAGE_START 0x10000000
|
||||
// externally controlly, external image start and stop
|
||||
#define DAQ_NEXPOSURERS_EXTERNAL_IMAGE_START_AND_STOP 0x18000000
|
||||
|
||||
#define DAQ_NEXPOSURERS_ACTIVATE_AUTO_SUBIMAGING 0x20000000
|
||||
#define DAQ_NEXPOSURERS_ACTIVATE_RATE_CORRECTION 0x40000000
|
||||
@ -106,11 +113,12 @@
|
||||
|
||||
// chips static bits
|
||||
#define DAQ_STATIC_BIT_PROGRAM 0x00000001
|
||||
#define DAQ_STATIC_BIT_M4 0x00000002 // these are the status bits, not bit mode
|
||||
#define DAQ_STATIC_BIT_M8 0x00000004 // these are the status bits, not bit mode
|
||||
#define DAQ_STATIC_BIT_M12 \
|
||||
0x00000000 // these are the status bits, not bit mode, ie. "00" is 12 bit
|
||||
// mode
|
||||
// these are the status bits, not bit mode
|
||||
#define DAQ_STATIC_BIT_M4 0x00000002
|
||||
#define DAQ_STATIC_BIT_M8 0x00000004
|
||||
// these are the status bits, not bit mode, ie. "00" is 12 bit mode
|
||||
#define DAQ_STATIC_BIT_M12 0x00000000
|
||||
|
||||
#define DAQ_STATIC_BIT_CHIP_TEST 0x00000008
|
||||
#define DAQ_STATIC_BIT_ROTEST 0x00000010
|
||||
#define DAQ_CS_BAR_LEFT 0x00000020
|
||||
@ -136,18 +144,28 @@
|
||||
#define CHIP_DATA_OUT_DELAY_REG4 4
|
||||
#define CHIP_DATA_OUT_DELAY_SET 0x20000000
|
||||
|
||||
// module configuration
|
||||
#define TOP_BIT_MASK 0x00f
|
||||
#define MASTER_BIT_MASK 0x200
|
||||
#define NORMAL_MODULE_BIT_MASK 0x400
|
||||
/** BEB Registers */
|
||||
|
||||
// Master Slave Top Bottom Definition
|
||||
#define MODULE_CONFIGURATION_MASK 0x84
|
||||
// Software Configuration
|
||||
#define MASTERCONFIG_OFFSET 0x160 // 0x20 * 11 (P11)
|
||||
#define MASTER_BIT 0x1
|
||||
#define OVERWRITE_HARDWARE_BIT 0x2
|
||||
#define DEACTIVATE_BIT 0x4
|
||||
// module configuration - XPAR_PLB_GPIO_SYS_BASEADDR
|
||||
#define BEB_CONFIG_WR_OFST (0x160) // 0x20 * 11 (P11)
|
||||
#define BEB_CONFIG_MASTER_OFST (0)
|
||||
#define BEB_CONFIG_MASTER_MSK (0x00000001 << BEB_CONFIG_MASTER_OFST)
|
||||
#define BEB_CONFIG_OW_MASTER_OFST (1)
|
||||
#define BEB_CONFIG_OW_MASTER_MSK (0x00000001 << BEB_CONFIG_OW_MASTER_OFST)
|
||||
#define BEB_CONFIG_ACTIVATE_OFST (2)
|
||||
#define BEB_CONFIG_ACTIVATE_MSK (0x00000001 << BEB_CONFIG_ACTIVATE_OFST)
|
||||
#define BEB_CONFIG_TOP_OFST (3)
|
||||
#define BEB_CONFIG_TOP_MSK (0x00000001 << BEB_CONFIG_TOP_OFST)
|
||||
#define BEB_CONFIG_OW_TOP_OFST (4)
|
||||
#define BEB_CONFIG_OW_TOP_MSK (0x00000001 << BEB_CONFIG_OW_TOP_OFST)
|
||||
|
||||
#define BEB_CONFIG_RD_OFST (0x84)
|
||||
#define BEB_CONFIG_TOP_RD_OFST (0)
|
||||
#define BEB_CONFIG_TOP_RD_MSK (0x00000001 << BEB_CONFIG_TOP_RD_OFST)
|
||||
#define BEB_CONFIG_MASTER_RD_OFST (9)
|
||||
#define BEB_CONFIG_MASTER_RD_MSK (0x00000001 << BEB_CONFIG_MASTER_RD_OFST)
|
||||
#define BEB_CONFIG_NORMAL_RD_OFST (10)
|
||||
#define BEB_CONFIG_NORMAL_RD_MSK (0x00000001 << BEB_CONFIG_NORMAL_RD_OFST)
|
||||
|
||||
#define FPGA_TEMP_OFFSET 0x200
|
||||
|
||||
|
Binary file not shown.
2
slsDetectorServers/eigerDetectorServer/config.txt
Normal file
2
slsDetectorServers/eigerDetectorServer/config.txt
Normal file
@ -0,0 +1,2 @@
|
||||
top 1
|
||||
master 1
|
@ -226,6 +226,19 @@ u_int64_t getFirmwareAPIVersion() {
|
||||
#endif
|
||||
}
|
||||
|
||||
void readDetectorNumber() {
|
||||
#ifndef VIRTUAL
|
||||
char output[255];
|
||||
FILE *sysFile = popen(IDFILECOMMAND, "r");
|
||||
fgets(output, sizeof(output), sysFile);
|
||||
pclose(sysFile);
|
||||
sscanf(output, "%u", &detid);
|
||||
if (isControlServer) {
|
||||
LOG(logINFOBLUE, ("Detector ID: %u\n", detid));
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
u_int32_t getDetectorNumber() {
|
||||
#ifdef VIRTUAL
|
||||
return 0;
|
||||
@ -309,85 +322,67 @@ u_int32_t getDetectorIP() {
|
||||
/* initialization */
|
||||
|
||||
void initControlServer() {
|
||||
#ifdef VIRTUAL
|
||||
LOG(logINFOBLUE, ("Configuring Control server\n"));
|
||||
if (initError == OK) {
|
||||
readDetectorNumber();
|
||||
getModuleConfiguration();
|
||||
setupDetector();
|
||||
}
|
||||
initCheckDone = 1;
|
||||
return;
|
||||
#else
|
||||
if (initError == OK) {
|
||||
// Feb and Beb Initializations
|
||||
getModuleConfiguration();
|
||||
#ifndef VIRTUAL
|
||||
Feb_Control_SetMasterVariable(master);
|
||||
Feb_Interface_FebInterface();
|
||||
Feb_Control_FebControl();
|
||||
// different addresses for top and bottom
|
||||
if (getFirmwareVersion() < FIRMWARE_VERSION_SAME_TOP_BOT_ADDR) {
|
||||
Feb_Control_Init(master, top, normal, getDetectorNumber());
|
||||
}
|
||||
// same addresses for top and bottom
|
||||
else {
|
||||
Feb_Control_Init(master, 1, normal, getDetectorNumber());
|
||||
}
|
||||
Feb_Control_Init(master, 1, normal, getDetectorNumber());
|
||||
// master of 9M, check high voltage serial communication to blackfin
|
||||
if (master && !normal) {
|
||||
if (Feb_Control_OpenSerialCommunication())
|
||||
; // Feb_Control_CloseSerialCommunication();
|
||||
}
|
||||
LOG(logDEBUG1, ("Control server: FEB Initialization done\n"));
|
||||
Beb_SetTopVariable(top);
|
||||
Beb_Beb(detid);
|
||||
Beb_SetDetectorNumber(getDetectorNumber());
|
||||
LOG(logDEBUG1, ("Control server: BEB Initialization done\n"));
|
||||
|
||||
#endif
|
||||
// also reads config file and deactivates
|
||||
setupDetector();
|
||||
// activate (if it gets ip) (later FW will deactivate at startup)
|
||||
if (getDetectorIP() != 0) {
|
||||
Beb_Activate(1);
|
||||
Feb_Control_activate(1);
|
||||
} else {
|
||||
Beb_Activate(0);
|
||||
Feb_Control_activate(0);
|
||||
}
|
||||
}
|
||||
initCheckDone = 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
void initStopServer() {
|
||||
#ifdef VIRTUAL
|
||||
LOG(logINFOBLUE, ("Configuring Stop server\n"));
|
||||
getModuleConfiguration();
|
||||
virtual_stop = 0;
|
||||
if (!isControlServer) {
|
||||
ComVirtual_setStop(virtual_stop);
|
||||
}
|
||||
return;
|
||||
// get top/master in virtual
|
||||
readConfigFile();
|
||||
#else
|
||||
// wait a few s (control server is setting top/master from config file)
|
||||
usleep(WAIT_STOP_SERVER_START);
|
||||
LOG(logINFOBLUE, ("Configuring Stop server\n"));
|
||||
// exit(-1);
|
||||
readDetectorNumber();
|
||||
getModuleConfiguration();
|
||||
Feb_Control_SetMasterVariable(master);
|
||||
Feb_Interface_FebInterface();
|
||||
Feb_Control_FebControl();
|
||||
// different addresses for top and bottom
|
||||
if (getFirmwareVersion() < FIRMWARE_VERSION_SAME_TOP_BOT_ADDR) {
|
||||
Feb_Control_Init(master, top, normal, getDetectorNumber());
|
||||
}
|
||||
// same addresses for top and bottom
|
||||
else {
|
||||
Feb_Control_Init(master, 1, normal, getDetectorNumber());
|
||||
}
|
||||
Feb_Control_Init(master, 1, normal, getDetectorNumber());
|
||||
LOG(logDEBUG1, ("Stop server: FEB Initialization done\n"));
|
||||
// activate (if it gets ip) (later FW will deactivate at startup)
|
||||
// also needed for stop server for status
|
||||
if (getDetectorIP() != 0) {
|
||||
Beb_Activate(1);
|
||||
Feb_Control_activate(1);
|
||||
} else {
|
||||
Beb_Activate(0);
|
||||
Feb_Control_activate(0);
|
||||
}
|
||||
#endif
|
||||
// client first connect (from shm) will activate
|
||||
if (setActivate(0) == FAIL) {
|
||||
LOG(logERROR, ("Could not deactivate in stop server\n"));
|
||||
}
|
||||
}
|
||||
|
||||
void getModuleConfiguration() {
|
||||
if (initError == FAIL) {
|
||||
return;
|
||||
}
|
||||
#ifdef VIRTUAL
|
||||
#ifdef VIRTUAL_MASTER
|
||||
master = 1;
|
||||
@ -400,34 +395,219 @@ void getModuleConfiguration() {
|
||||
top = 0;
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef VIRTUAL_9M
|
||||
normal = 0;
|
||||
#else
|
||||
normal = 1;
|
||||
#endif
|
||||
LOG(logINFOBLUE,
|
||||
("Module: %s %s %s\n", (top ? "TOP" : "BOTTOM"),
|
||||
(master ? "MASTER" : "SLAVE"), (normal ? "NORMAL" : "SPECIAL")));
|
||||
return;
|
||||
|
||||
#else
|
||||
int *m = &master;
|
||||
int *t = ⊤
|
||||
int *n = &normal;
|
||||
Beb_GetModuleConfiguration(m, t, n);
|
||||
Beb_GetModuleConfiguration(&master, &top, &normal);
|
||||
#endif
|
||||
if (isControlServer) {
|
||||
LOG(logINFOBLUE,
|
||||
("Module: %s %s %s\n", (top ? "TOP" : "BOTTOM"),
|
||||
(master ? "MASTER" : "SLAVE"), (normal ? "NORMAL" : "SPECIAL")));
|
||||
}
|
||||
}
|
||||
|
||||
// read detector id
|
||||
char output[255];
|
||||
FILE *sysFile = popen(IDFILECOMMAND, "r");
|
||||
fgets(output, sizeof(output), sysFile);
|
||||
pclose(sysFile);
|
||||
sscanf(output, "%u", &detid);
|
||||
if (isControlServer) {
|
||||
LOG(logINFOBLUE, ("Detector ID: %u\n\n", detid));
|
||||
int readConfigFile() {
|
||||
|
||||
if (initError == FAIL) {
|
||||
return initError;
|
||||
}
|
||||
master = -1;
|
||||
top = -1;
|
||||
FILE *fd = fopen(CONFIG_FILE, "r");
|
||||
if (fd == NULL) {
|
||||
LOG(logINFO, ("No config file found. Resetting to hardware settings "
|
||||
"(Top/Master)\n"));
|
||||
// reset to hardware settings if not in config file (if overwritten)
|
||||
resetToHardwareSettings();
|
||||
return initError;
|
||||
}
|
||||
LOG(logINFO, ("Reading config file %s\n", CONFIG_FILE));
|
||||
|
||||
// Initialization
|
||||
const size_t LZ = 256;
|
||||
char line[LZ];
|
||||
memset(line, 0, LZ);
|
||||
char command[LZ];
|
||||
|
||||
// keep reading a line
|
||||
while (fgets(line, LZ, fd)) {
|
||||
// ignore comments
|
||||
if (line[0] == '#') {
|
||||
LOG(logDEBUG1, ("Ignoring Comment\n"));
|
||||
continue;
|
||||
}
|
||||
|
||||
// ignore empty lines
|
||||
if (strlen(line) <= 1) {
|
||||
LOG(logDEBUG1, ("Ignoring Empty line\n"));
|
||||
continue;
|
||||
}
|
||||
|
||||
// ignoring lines beginning with space or tab
|
||||
if (line[0] == ' ' || line[0] == '\t') {
|
||||
LOG(logDEBUG1, ("Ignoring Lines starting with space or tabs\n"));
|
||||
continue;
|
||||
}
|
||||
|
||||
LOG(logDEBUG1, ("Command to process: (size:%d) %.*s\n", strlen(line),
|
||||
strlen(line) - 1, line));
|
||||
memset(command, 0, LZ);
|
||||
|
||||
// top command
|
||||
if (!strncmp(line, "top", strlen("top"))) {
|
||||
// cannot scan values
|
||||
if (sscanf(line, "%s %d", command, &top) != 2) {
|
||||
sprintf(initErrorMessage,
|
||||
"Could not scan top commands from on-board server "
|
||||
"config file. Line:[%s].\n",
|
||||
line);
|
||||
break;
|
||||
}
|
||||
#ifndef VIRTUAL
|
||||
enum TOPINDEX ind = (top == 1 ? OW_TOP : OW_BOTTOM);
|
||||
if (!Beb_SetTop(ind)) {
|
||||
sprintf(
|
||||
initErrorMessage,
|
||||
"Could not overwrite top to %d in Beb from on-board server "
|
||||
"config file. Line:[%s].\n",
|
||||
top, line);
|
||||
break;
|
||||
}
|
||||
if (!Feb_Control_SetTop(ind, 1, 1)) {
|
||||
sprintf(
|
||||
initErrorMessage,
|
||||
"Could not overwrite top to %d in Feb from on-board server "
|
||||
"config file. Line:[%s].\n",
|
||||
top, line);
|
||||
break;
|
||||
}
|
||||
// validate change
|
||||
int actual_top = -1, temp = -1, temp2 = -1;
|
||||
Beb_GetModuleConfiguration(&temp, &actual_top, &temp2);
|
||||
if (actual_top != top) {
|
||||
sprintf(initErrorMessage, "Could not set top to %d. Read %d\n",
|
||||
top, actual_top);
|
||||
break;
|
||||
}
|
||||
Beb_SetTopVariable(top);
|
||||
#endif
|
||||
}
|
||||
|
||||
// master command
|
||||
else if (!strncmp(line, "master", strlen("master"))) {
|
||||
// cannot scan values
|
||||
if (sscanf(line, "%s %d", command, &master) != 2) {
|
||||
sprintf(initErrorMessage,
|
||||
"Could not scan master commands from on-board server "
|
||||
"config file. Line:[%s].\n",
|
||||
line);
|
||||
break;
|
||||
}
|
||||
#ifndef VIRTUAL
|
||||
enum MASTERINDEX ind = (master == 1 ? OW_MASTER : OW_SLAVE);
|
||||
if (!Beb_SetMaster(ind)) {
|
||||
sprintf(initErrorMessage,
|
||||
"Could not overwrite master to %d in Beb from on-board "
|
||||
"server "
|
||||
"config file. Line:[%s].\n",
|
||||
master, line);
|
||||
break;
|
||||
}
|
||||
if (!Feb_Control_SetMaster(ind)) {
|
||||
sprintf(initErrorMessage,
|
||||
"Could not overwrite master to %d in Feb from on-board "
|
||||
"server "
|
||||
"config file. Line:[%s].\n",
|
||||
master, line);
|
||||
break;
|
||||
}
|
||||
// validate change
|
||||
int actual_master = -1, temp = -1, temp2 = -1;
|
||||
Beb_GetModuleConfiguration(&actual_master, &temp, &temp2);
|
||||
if (actual_master != master) {
|
||||
sprintf(initErrorMessage,
|
||||
"Could not set master to %d. Read %d\n", master,
|
||||
actual_master);
|
||||
break;
|
||||
}
|
||||
Feb_Control_SetMasterVariable(master);
|
||||
#endif
|
||||
}
|
||||
|
||||
// other commands
|
||||
else {
|
||||
sprintf(initErrorMessage,
|
||||
"Could not scan command from on-board server "
|
||||
"config file. Line:[%s].\n",
|
||||
line);
|
||||
break;
|
||||
}
|
||||
}
|
||||
fclose(fd);
|
||||
|
||||
if (strlen(initErrorMessage)) {
|
||||
initError = FAIL;
|
||||
LOG(logERROR, ("%s\n\n", initErrorMessage));
|
||||
} else {
|
||||
LOG(logINFO, ("Successfully read config file\n"));
|
||||
}
|
||||
|
||||
// reset to hardware settings if not in config file (if overwritten)
|
||||
resetToHardwareSettings();
|
||||
|
||||
return initError;
|
||||
}
|
||||
|
||||
void resetToHardwareSettings() {
|
||||
#ifndef VIRTUAL
|
||||
if (initError == FAIL) {
|
||||
return;
|
||||
}
|
||||
// top not set in config file
|
||||
if (top == -1) {
|
||||
if (!Beb_SetTop(TOP_HARDWARE)) {
|
||||
initError = FAIL;
|
||||
strcpy(initErrorMessage,
|
||||
"Could not reset Top flag to Beb hardware settings.\n");
|
||||
LOG(logERROR, ("%s\n\n", initErrorMessage));
|
||||
return;
|
||||
}
|
||||
if (!Feb_Control_SetTop(TOP_HARDWARE, 1, 1)) {
|
||||
initError = FAIL;
|
||||
strcpy(initErrorMessage,
|
||||
"Could not reset Top flag to Feb hardware settings.\n");
|
||||
LOG(logERROR, ("%s\n\n", initErrorMessage));
|
||||
return;
|
||||
}
|
||||
int temp = -1, temp2 = -1;
|
||||
Beb_GetModuleConfiguration(&temp, &top, &temp2);
|
||||
Beb_SetTopVariable(top);
|
||||
}
|
||||
// master not set in config file
|
||||
if (master == -1) {
|
||||
if (!Beb_SetMaster(TOP_HARDWARE)) {
|
||||
initError = FAIL;
|
||||
strcpy(initErrorMessage,
|
||||
"Could not reset Master flag to Beb hardware settings.\n");
|
||||
LOG(logERROR, ("%s\n\n", initErrorMessage));
|
||||
return;
|
||||
}
|
||||
if (!Feb_Control_SetMaster(TOP_HARDWARE)) {
|
||||
initError = FAIL;
|
||||
strcpy(initErrorMessage,
|
||||
"Could not reset Master flag to Feb hardware settings.\n");
|
||||
LOG(logERROR, ("%s\n\n", initErrorMessage));
|
||||
return;
|
||||
}
|
||||
int temp = -1, temp2 = -1;
|
||||
Beb_GetModuleConfiguration(&master, &temp, &temp2);
|
||||
Feb_Control_SetMasterVariable(master);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
@ -517,6 +697,20 @@ void setupDetector() {
|
||||
#ifndef VIRTUAL
|
||||
Feb_Control_CheckSetup();
|
||||
#endif
|
||||
// force top or master if in config file
|
||||
if (readConfigFile() == FAIL) {
|
||||
return;
|
||||
}
|
||||
LOG(logINFOBLUE,
|
||||
("Module: %s %s %s\n", (top ? "TOP" : "BOTTOM"),
|
||||
(master ? "MASTER" : "SLAVE"), (normal ? "NORMAL" : "SPECIAL")));
|
||||
|
||||
// client first connect (from shm) will activate
|
||||
if (setActivate(0) == FAIL) {
|
||||
initError = FAIL;
|
||||
sprintf(initErrorMessage, "Could not deactivate\n");
|
||||
LOG(logERROR, (initErrorMessage));
|
||||
}
|
||||
LOG(logDEBUG1, ("Setup detector done\n\n"));
|
||||
}
|
||||
|
||||
@ -1681,16 +1875,38 @@ int getBebFPGATemp() {
|
||||
#endif
|
||||
}
|
||||
|
||||
int activate(int enable) {
|
||||
int setActivate(int enable) {
|
||||
if (enable < 0) {
|
||||
LOG(logERROR, ("Invalid activate argument: %d\n", enable));
|
||||
return FAIL;
|
||||
}
|
||||
#ifdef VIRTUAL
|
||||
if (enable >= 0)
|
||||
eiger_virtual_activate = enable;
|
||||
return eiger_virtual_activate;
|
||||
eiger_virtual_activate = enable;
|
||||
#else
|
||||
int ret = Beb_Activate(enable);
|
||||
Feb_Control_activate(ret);
|
||||
return ret;
|
||||
if (!Beb_SetActivate(enable)) {
|
||||
return FAIL;
|
||||
}
|
||||
Feb_Control_activate(enable);
|
||||
#endif
|
||||
if (enable) {
|
||||
LOG(logINFOGREEN, ("Activated in %s Server!\n",
|
||||
isControlServer ? " Control" : "Stop"));
|
||||
} else {
|
||||
LOG(logINFORED, ("Deactivated in %s Server!\n",
|
||||
isControlServer ? " Control" : "Stop"));
|
||||
}
|
||||
return OK;
|
||||
}
|
||||
|
||||
int getActivate(int *retval) {
|
||||
#ifdef VIRTUAL
|
||||
*retval = eiger_virtual_activate;
|
||||
#else
|
||||
if (!Beb_GetActivate(retval)) {
|
||||
return FAIL;
|
||||
}
|
||||
#endif
|
||||
return OK;
|
||||
}
|
||||
|
||||
int getTenGigaFlowControl() {
|
||||
@ -1939,8 +2155,7 @@ void *start_timer(void *arg) {
|
||||
memset(packetData, 0, packetsize);
|
||||
sls_detector_header *header =
|
||||
(sls_detector_header *)(packetData);
|
||||
header->detType = 3; //(uint16_t)myDetectorType; updated
|
||||
// when firmware updates
|
||||
header->detType = (uint16_t)myDetectorType;
|
||||
header->version = SLS_DETECTOR_HEADER_VERSION - 1;
|
||||
header->frameNumber = frameNr + iframes;
|
||||
header->packetNumber = i;
|
||||
@ -1950,8 +2165,7 @@ void *start_timer(void *arg) {
|
||||
char packetData2[packetsize];
|
||||
memset(packetData2, 0, packetsize);
|
||||
header = (sls_detector_header *)(packetData2);
|
||||
header->detType = 3; //(uint16_t)myDetectorType; updated
|
||||
// when firmware updates
|
||||
header->detType = (uint16_t)myDetectorType;
|
||||
header->version = SLS_DETECTOR_HEADER_VERSION - 1;
|
||||
header->frameNumber = frameNr + iframes;
|
||||
header->packetNumber = i;
|
||||
@ -2091,7 +2305,7 @@ int startReadOut() {
|
||||
// for(i=0;i<nimages_per_request;i++)
|
||||
// if ((ret_val =
|
||||
//(!Beb_RequestNImages(beb_num,send_to_ten_gig,on_dst,1,0))))
|
||||
//break;
|
||||
// break;
|
||||
|
||||
dst_requested[on_dst++] = 0;
|
||||
on_dst %= ndsts_in_use;
|
||||
@ -2128,7 +2342,7 @@ enum runStatus getRunStatus() {
|
||||
return ERROR;
|
||||
}
|
||||
if (isTransmitting) {
|
||||
printf("Status: TRANSMITTING\n");
|
||||
LOG(logINFOBLUE, ("Status: TRANSMITTING\n"));
|
||||
return TRANSMITTING;
|
||||
}
|
||||
LOG(logINFOBLUE, ("Status: IDLE\n"));
|
||||
@ -2178,7 +2392,7 @@ void readFrame(int *ret, char *mess) {
|
||||
printf("Transmitting...\n");
|
||||
}
|
||||
}
|
||||
printf("Detector has sent all data\n");
|
||||
LOG(logINFO, ("Detector has sent all data\n"));
|
||||
LOG(logINFOGREEN, ("Acquisition successfully finished\n"));
|
||||
#endif
|
||||
}
|
||||
|
@ -1,9 +1,10 @@
|
||||
#pragma once
|
||||
#include "sls_detector_defs.h"
|
||||
|
||||
#define REQUIRED_FIRMWARE_VERSION (24)
|
||||
#define IDFILECOMMAND "more /home/root/executables/detid.txt"
|
||||
#define FIRMWARE_VERSION_SAME_TOP_BOT_ADDR (26)
|
||||
#define REQUIRED_FIRMWARE_VERSION (26)
|
||||
#define IDFILECOMMAND "more /home/root/executables/detid.txt"
|
||||
#define CONFIG_FILE ("config.txt")
|
||||
#define WAIT_STOP_SERVER_START (1 * 1000 * 1000)
|
||||
|
||||
#define STATUS_IDLE 0
|
||||
#define STATUS_RUNNING 1
|
||||
@ -61,6 +62,11 @@ enum ADCINDEX {
|
||||
enum NETWORKINDEX { TXN_LEFT, TXN_RIGHT, TXN_FRAME, FLOWCTRL_10G };
|
||||
enum ROINDEX { E_PARALLEL, E_NON_PARALLEL };
|
||||
enum CLKINDEX { RUN_CLK, NUM_CLOCKS };
|
||||
enum TOPINDEX { TOP_HARDWARE, OW_TOP, OW_BOTTOM };
|
||||
#define TOP_NAMES "hardware", "top", "bottom"
|
||||
enum MASTERINDEX { MASTER_HARDWARE, OW_MASTER, OW_SLAVE };
|
||||
#define MASTER_NAMES "hardware", "master", "slave"
|
||||
|
||||
#define CLK_NAMES "run"
|
||||
|
||||
/* Hardware Definitions */
|
||||
|
@ -84,6 +84,9 @@ u_int16_t getHardwareSerialNumber();
|
||||
#ifdef JUNGFRAUD
|
||||
int isHardwareVersion2();
|
||||
#endif
|
||||
#ifdef EIGERD
|
||||
void readDetectorNumber();
|
||||
#endif
|
||||
u_int32_t getDetectorNumber();
|
||||
u_int64_t getDetectorMAC();
|
||||
u_int32_t getDetectorIP();
|
||||
@ -112,9 +115,12 @@ void updateDataBytes();
|
||||
defined(MOENCHD)
|
||||
int setDefaultDacs();
|
||||
#endif
|
||||
#ifdef GOTTHARD2D
|
||||
#if defined(GOTTHARD2D) || defined(EIGERD)
|
||||
int readConfigFile();
|
||||
#endif
|
||||
#ifdef EIGERD
|
||||
void resetToHardwareSettings();
|
||||
#endif
|
||||
|
||||
// advanced read/write reg
|
||||
#ifdef EIGERD
|
||||
@ -432,7 +438,8 @@ void setExternalGating(int enable[]);
|
||||
int setAllTrimbits(int val);
|
||||
int getAllTrimbits();
|
||||
int getBebFPGATemp();
|
||||
int activate(int enable);
|
||||
int setActivate(int enable);
|
||||
int getActivate(int *retval);
|
||||
|
||||
// gotthard specific - adc phase
|
||||
#elif GOTTHARDD
|
||||
|
@ -4119,9 +4119,24 @@ int set_activate(int file_des) {
|
||||
#else
|
||||
// set & get
|
||||
if ((arg == -1) || (Server_VerifyLock() == OK)) {
|
||||
retval = activate(arg);
|
||||
LOG(logDEBUG1, ("Activate: %d\n", retval));
|
||||
validate(arg, retval, "set activate", DEC);
|
||||
if (arg >= 0) {
|
||||
if (setActivate(arg) == FAIL) {
|
||||
ret = FAIL;
|
||||
sprintf(mess, "Could not %s\n",
|
||||
(arg == 0 ? "deactivate" : "activate"));
|
||||
LOG(logERROR, (mess));
|
||||
}
|
||||
}
|
||||
if (ret == OK) {
|
||||
if (getActivate(&retval) == FAIL) {
|
||||
ret = FAIL;
|
||||
sprintf(mess, "Could not get activate flag\n");
|
||||
LOG(logERROR, (mess));
|
||||
} else {
|
||||
LOG(logDEBUG1, ("Activate: %d\n", retval));
|
||||
validate(arg, retval, "set/get activate", DEC);
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
return Server_SendResult(file_des, INT32, &retval, sizeof(retval));
|
||||
@ -7264,7 +7279,8 @@ int get_receiver_parameters(int file_des) {
|
||||
|
||||
// activate
|
||||
#ifdef EIGERD
|
||||
i32 = activate(-1);
|
||||
i32 = 0;
|
||||
getActivate(&i32);
|
||||
#else
|
||||
i32 = 0;
|
||||
#endif
|
||||
|
@ -791,7 +791,7 @@ class Detector {
|
||||
Result<bool> getActive(Positions pos = {}) const;
|
||||
|
||||
/** [Eiger] */
|
||||
void setActive(bool active, Positions pos = {});
|
||||
void setActive(const bool active, Positions pos = {});
|
||||
|
||||
/** [Eiger] */
|
||||
Result<bool> getRxPadDeactivatedMode(Positions pos = {}) const;
|
||||
|
@ -1031,11 +1031,11 @@ Result<ns> Detector::getMeasuredSubFramePeriod(Positions pos) const {
|
||||
}
|
||||
|
||||
Result<bool> Detector::getActive(Positions pos) const {
|
||||
return pimpl->Parallel(&Module::activate, pos, -1);
|
||||
return pimpl->Parallel(&Module::getActivate, pos);
|
||||
}
|
||||
|
||||
void Detector::setActive(bool active, Positions pos) {
|
||||
pimpl->Parallel(&Module::activate, pos, static_cast<int>(active));
|
||||
void Detector::setActive(const bool active, Positions pos) {
|
||||
pimpl->Parallel(&Module::setActivate, pos, active);
|
||||
}
|
||||
|
||||
Result<bool> Detector::getRxPadDeactivatedMode(Positions pos) const {
|
||||
|
@ -515,7 +515,7 @@ void DetectorImpl::readFrameFromReceiver() {
|
||||
nDetPixelsX = nX * nPixelsX;
|
||||
nDetPixelsY = nY * nPixelsY;
|
||||
// det type
|
||||
eiger = (zHeader.detType == static_cast<int>(3))
|
||||
eiger = (zHeader.detType == EIGER)
|
||||
? true
|
||||
: false; // to be changed to EIGER when
|
||||
// firmware updates its header data
|
||||
|
@ -344,19 +344,19 @@ void Module::setHostname(const std::string &hostname,
|
||||
sls::strcpy_safe(shm()->hostname, hostname.c_str());
|
||||
auto client = DetectorSocket(shm()->hostname, shm()->controlPort);
|
||||
client.close();
|
||||
|
||||
LOG(logINFO) << "Checking Detector Version Compatibility";
|
||||
if (!initialChecks) {
|
||||
try {
|
||||
checkDetectorVersionCompatibility();
|
||||
} catch (const DetectorError &e) {
|
||||
LOG(logWARNING) << "Bypassing Initial Checks at your own risk!";
|
||||
}
|
||||
} else {
|
||||
try {
|
||||
checkDetectorVersionCompatibility();
|
||||
LOG(logINFO) << "Detector Version Compatibility - Success";
|
||||
} catch (const DetectorError &e) {
|
||||
if (!initialChecks) {
|
||||
LOG(logWARNING) << "Bypassing Initial Checks at your own risk!";
|
||||
} else {
|
||||
throw;
|
||||
}
|
||||
}
|
||||
if (shm()->myDetectorType == EIGER) {
|
||||
setActivate(true);
|
||||
}
|
||||
|
||||
LOG(logINFO) << "Detector connecting - updating!";
|
||||
}
|
||||
|
||||
std::string Module::getHostname() const { return shm()->hostname; }
|
||||
@ -2186,16 +2186,29 @@ void Module::writeAdcRegister(uint32_t addr, uint32_t val) {
|
||||
sendToDetector(F_WRITE_ADC_REG, args, nullptr);
|
||||
}
|
||||
|
||||
int Module::activate(int enable) {
|
||||
bool Module::getActivate() {
|
||||
int retval = -1, retval2 = -1;
|
||||
int arg = -1;
|
||||
sendToDetector(F_ACTIVATE, arg, retval);
|
||||
sendToDetectorStop(F_ACTIVATE, arg, retval2);
|
||||
if (retval != retval2) {
|
||||
std::ostringstream oss;
|
||||
oss << "Inconsistent activate state. Control Server: " << retval
|
||||
<< ". Stop Server: " << retval2;
|
||||
throw RuntimeError(oss.str());
|
||||
}
|
||||
return retval;
|
||||
}
|
||||
|
||||
void Module::setActivate(const bool enable) {
|
||||
int retval = -1;
|
||||
int arg = static_cast<int>(enable);
|
||||
LOG(logDEBUG1) << "Setting activate flag to " << enable;
|
||||
sendToDetector(F_ACTIVATE, enable, retval);
|
||||
sendToDetectorStop(F_ACTIVATE, enable, retval);
|
||||
LOG(logDEBUG1) << "Activate: " << retval;
|
||||
sendToDetector(F_ACTIVATE, arg, retval);
|
||||
sendToDetectorStop(F_ACTIVATE, arg, retval);
|
||||
if (shm()->useReceiverFlag) {
|
||||
sendToReceiver(F_RECEIVER_ACTIVATE, retval, nullptr);
|
||||
}
|
||||
return retval;
|
||||
}
|
||||
|
||||
bool Module::getDeactivatedRxrPaddingMode() {
|
||||
|
@ -1095,12 +1095,8 @@ class Module : public virtual slsDetectorDefs {
|
||||
*/
|
||||
void writeAdcRegister(uint32_t addr, uint32_t val);
|
||||
|
||||
/**
|
||||
* Activates/Deactivates the detector (Eiger only)
|
||||
* @param enable active (1) or inactive (0), -1 gets
|
||||
* @returns 0 (inactive) or 1 (active)for activate mode
|
||||
*/
|
||||
int activate(int const enable = -1);
|
||||
bool getActivate();
|
||||
void setActivate(const bool enable);
|
||||
|
||||
bool getDeactivatedRxrPaddingMode();
|
||||
|
||||
|
@ -4,10 +4,10 @@
|
||||
#define APIRECEIVER 0x200409
|
||||
#define APIGUI 0x200409
|
||||
|
||||
#define APICTB 0x200508
|
||||
#define APIGOTTHARD 0x200508
|
||||
#define APICTB 0x200508
|
||||
#define APIGOTTHARD 0x200508
|
||||
#define APIGOTTHARD2 0x200508
|
||||
#define APIJUNGFRAU 0x200508
|
||||
#define APIMYTHEN3 0x200508
|
||||
#define APIMOENCH 0x200508
|
||||
#define APIEIGER 0x200508
|
||||
#define APIJUNGFRAU 0x200508
|
||||
#define APIMYTHEN3 0x200508
|
||||
#define APIMOENCH 0x200508
|
||||
#define APIEIGER 0x200513
|
||||
|
Loading…
x
Reference in New Issue
Block a user