formatting

This commit is contained in:
maliakal_d 2025-03-04 10:48:13 +01:00
parent 905a509a17
commit e7247f1fee
2 changed files with 125 additions and 119 deletions

View File

@ -2,7 +2,6 @@
// Copyright (C) 2021 Contributors to the SLS Detector Package // Copyright (C) 2021 Contributors to the SLS Detector Package
#pragma once #pragma once
#define CTRL_REG (0x8000) #define CTRL_REG (0x8000)
#define POWER_VIO_OFST (0) #define POWER_VIO_OFST (0)
@ -117,7 +116,8 @@
#define RO_MODE_X_OFST (15) #define RO_MODE_X_OFST (15)
#define RO_MODE_X_MSK (0x00000001 << RO_MODE_X_OFST) #define RO_MODE_X_MSK (0x00000001 << RO_MODE_X_OFST)
#define COUNT_FRAMES_FROM_UPDATE_OFST (16) #define COUNT_FRAMES_FROM_UPDATE_OFST (16)
#define COUNT_FRAMES_FROM_UPDATE_MSK (0x00000001 << COUNT_FRAMES_FROM_UPDATE_OFST) #define COUNT_FRAMES_FROM_UPDATE_MSK \
(0x00000001 << COUNT_FRAMES_FROM_UPDATE_OFST)
#define START_STREAMING_P_OFST (17) #define START_STREAMING_P_OFST (17)
#define START_STREAMING_P_MSK (0x00000001 << START_STREAMING_P_OFST) #define START_STREAMING_P_MSK (0x00000001 << START_STREAMING_P_OFST)
#define STREAM_BUFFER_CLEAR_OFST (18) #define STREAM_BUFFER_CLEAR_OFST (18)
@ -282,7 +282,8 @@
#define PATTERN_LOOP_0_ADDR_REG (0xB128) #define PATTERN_LOOP_0_ADDR_REG (0xB128)
#define PATTERN_LOOP_0_ADDR_STRT_OFST (0) #define PATTERN_LOOP_0_ADDR_STRT_OFST (0)
#define PATTERN_LOOP_0_ADDR_STRT_MSK (0x00001fff << PATTERN_LOOP_0_ADDR_STRT_OFST) #define PATTERN_LOOP_0_ADDR_STRT_MSK \
(0x00001fff << PATTERN_LOOP_0_ADDR_STRT_OFST)
#define PATTERN_LOOP_0_ADDR_STP_OFST (16) #define PATTERN_LOOP_0_ADDR_STP_OFST (16)
#define PATTERN_LOOP_0_ADDR_STP_MSK (0x00001fff << PATTERN_LOOP_0_ADDR_STP_OFST) #define PATTERN_LOOP_0_ADDR_STP_MSK (0x00001fff << PATTERN_LOOP_0_ADDR_STP_OFST)
@ -300,7 +301,8 @@
#define PATTERN_LOOP_1_ADDR_REG (0xB13C) #define PATTERN_LOOP_1_ADDR_REG (0xB13C)
#define PATTERN_LOOP_1_ADDR_STRT_OFST (0) #define PATTERN_LOOP_1_ADDR_STRT_OFST (0)
#define PATTERN_LOOP_1_ADDR_STRT_MSK (0x00001fff << PATTERN_LOOP_1_ADDR_STRT_OFST) #define PATTERN_LOOP_1_ADDR_STRT_MSK \
(0x00001fff << PATTERN_LOOP_1_ADDR_STRT_OFST)
#define PATTERN_LOOP_1_ADDR_STP_OFST (16) #define PATTERN_LOOP_1_ADDR_STP_OFST (16)
#define PATTERN_LOOP_1_ADDR_STP_MSK (0x00001fff << PATTERN_LOOP_1_ADDR_STP_OFST) #define PATTERN_LOOP_1_ADDR_STP_MSK (0x00001fff << PATTERN_LOOP_1_ADDR_STP_OFST)
@ -318,7 +320,8 @@
#define PATTERN_LOOP_2_ADDR_REG (0xB150) #define PATTERN_LOOP_2_ADDR_REG (0xB150)
#define PATTERN_LOOP_2_ADDR_STRT_OFST (0) #define PATTERN_LOOP_2_ADDR_STRT_OFST (0)
#define PATTERN_LOOP_2_ADDR_STRT_MSK (0x00001fff << PATTERN_LOOP_2_ADDR_STRT_OFST) #define PATTERN_LOOP_2_ADDR_STRT_MSK \
(0x00001fff << PATTERN_LOOP_2_ADDR_STRT_OFST)
#define PATTERN_LOOP_2_ADDR_STP_OFST (16) #define PATTERN_LOOP_2_ADDR_STP_OFST (16)
#define PATTERN_LOOP_2_ADDR_STP_MSK (0x00001fff << PATTERN_LOOP_2_ADDR_STP_OFST) #define PATTERN_LOOP_2_ADDR_STP_MSK (0x00001fff << PATTERN_LOOP_2_ADDR_STP_OFST)
@ -336,7 +339,8 @@
#define PATTERN_LOOP_3_ADDR_REG (0xB164) #define PATTERN_LOOP_3_ADDR_REG (0xB164)
#define PATTERN_LOOP_3_ADDR_STRT_OFST (0) #define PATTERN_LOOP_3_ADDR_STRT_OFST (0)
#define PATTERN_LOOP_3_ADDR_STRT_MSK (0x00001fff << PATTERN_LOOP_3_ADDR_STRT_OFST) #define PATTERN_LOOP_3_ADDR_STRT_MSK \
(0x00001fff << PATTERN_LOOP_3_ADDR_STRT_OFST)
#define PATTERN_LOOP_3_ADDR_STP_OFST (16) #define PATTERN_LOOP_3_ADDR_STP_OFST (16)
#define PATTERN_LOOP_3_ADDR_STP_MSK (0x00001fff << PATTERN_LOOP_3_ADDR_STP_OFST) #define PATTERN_LOOP_3_ADDR_STP_MSK (0x00001fff << PATTERN_LOOP_3_ADDR_STP_OFST)
@ -354,7 +358,8 @@
#define PATTERN_LOOP_4_ADDR_REG (0xB178) #define PATTERN_LOOP_4_ADDR_REG (0xB178)
#define PATTERN_LOOP_4_ADDR_STRT_OFST (0) #define PATTERN_LOOP_4_ADDR_STRT_OFST (0)
#define PATTERN_LOOP_4_ADDR_STRT_MSK (0x00001fff << PATTERN_LOOP_4_ADDR_STRT_OFST) #define PATTERN_LOOP_4_ADDR_STRT_MSK \
(0x00001fff << PATTERN_LOOP_4_ADDR_STRT_OFST)
#define PATTERN_LOOP_4_ADDR_STP_OFST (16) #define PATTERN_LOOP_4_ADDR_STP_OFST (16)
#define PATTERN_LOOP_4_ADDR_STP_MSK (0x00001fff << PATTERN_LOOP_4_ADDR_STP_OFST) #define PATTERN_LOOP_4_ADDR_STP_MSK (0x00001fff << PATTERN_LOOP_4_ADDR_STP_OFST)
@ -372,7 +377,8 @@
#define PATTERN_LOOP_5_ADDR_REG (0xB18C) #define PATTERN_LOOP_5_ADDR_REG (0xB18C)
#define PATTERN_LOOP_5_ADDR_STRT_OFST (0) #define PATTERN_LOOP_5_ADDR_STRT_OFST (0)
#define PATTERN_LOOP_5_ADDR_STRT_MSK (0x00001fff << PATTERN_LOOP_5_ADDR_STRT_OFST) #define PATTERN_LOOP_5_ADDR_STRT_MSK \
(0x00001fff << PATTERN_LOOP_5_ADDR_STRT_OFST)
#define PATTERN_LOOP_5_ADDR_STP_OFST (16) #define PATTERN_LOOP_5_ADDR_STP_OFST (16)
#define PATTERN_LOOP_5_ADDR_STP_MSK (0x00001fff << PATTERN_LOOP_5_ADDR_STP_OFST) #define PATTERN_LOOP_5_ADDR_STP_MSK (0x00001fff << PATTERN_LOOP_5_ADDR_STP_OFST)