mirror of
https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2025-06-23 18:17:59 +02:00
created AD9252 for old gotthard modules in use, it runs in both roi and non roi for old and new modules, data needs to be checked by Jiaguo to confirm some parts of the code that has FIXME to be checked later
This commit is contained in:
162
slsDetectorServers/slsDetectorServer/AD9252.h
Executable file
162
slsDetectorServers/slsDetectorServer/AD9252.h
Executable file
@ -0,0 +1,162 @@
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#pragma once
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#include "commonServerFunctions.h" // blackfin.h, ansi.h
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#ifdef GOTTHARDD
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#include <unistd.h>
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#endif
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/* AD9252 ADC DEFINES */
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#define AD9252_ADC_NUMBITS (24)
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// default value is 0xF
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#define AD9252_DEV_IND_2_REG (0x04)
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#define AD9252_CHAN_H_OFST (0)
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#define AD9252_CHAN_H_MSK (0x00000001 << AD9252_CHAN_H_OFST)
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#define AD9252_CHAN_G_OFST (1)
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#define AD9252_CHAN_G_MSK (0x00000001 << AD9252_CHAN_G_OFST)
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#define AD9252_CHAN_F_OFST (2)
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#define AD9252_CHAN_F_MSK (0x00000001 << AD9252_CHAN_F_OFST)
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#define AD9252_CHAN_E_OFST (3)
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#define AD9252_CHAN_E_MSK (0x00000001 << AD9252_CHAN_E_OFST)
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// default value is 0x0F
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#define AD9252_DEV_IND_1_REG (0x05)
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#define AD9252_CHAN_D_OFST (0)
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#define AD9252_CHAN_D_MSK (0x00000001 << AD9252_CHAN_D_OFST)
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#define AD9252_CHAN_C_OFST (1)
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#define AD9252_CHAN_C_MSK (0x00000001 << AD9252_CHAN_C_OFST)
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#define AD9252_CHAN_B_OFST (2)
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#define AD9252_CHAN_B_MSK (0x00000001 << AD9252_CHAN_B_OFST)
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#define AD9252_CHAN_A_OFST (3)
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#define AD9252_CHAN_A_MSK (0x00000001 << AD9252_CHAN_A_OFST)
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#define AD9252_CLK_CH_DCO_OFST (4)
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#define AD9252_CLK_CH_DCO_MSK (0x00000001 << AD9252_CLK_CH_DCO_OFST)
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#define AD9252_CLK_CH_IFCO_OFST (5)
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#define AD9252_CLK_CH_IFCO_MSK (0x00000001 << AD9252_CLK_CH_IFCO_OFST)
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// default value is 0x00
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#define AD9252_POWER_MODE_REG (0x08)
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#define AD9252_POWER_INTERNAL_OFST (0)
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#define AD9252_POWER_INTERNAL_MSK (0x00000007 << AD9252_POWER_INTERNAL_OFST)
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#define AD9252_INT_CHIP_RUN_VAL ((0x0 << AD9252_POWER_INTERNAL_OFST) & AD9252_POWER_INTERNAL_MSK)
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#define AD9252_INT_FULL_PWR_DWN_VAL ((0x1 << AD9252_POWER_INTERNAL_OFST) & AD9252_POWER_INTERNAL_MSK)
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#define AD9252_INT_STANDBY_VAL ((0x2 << AD9252_POWER_INTERNAL_OFST) & AD9252_POWER_INTERNAL_MSK)
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#define AD9252_INT_RESET_VAL ((0x3 << AD9252_POWER_INTERNAL_OFST) & AD9252_POWER_INTERNAL_MSK)
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// default value is 0x0
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#define AD9252_TEST_MODE_REG (0x0D)
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#define AD9252_OUT_TEST_OFST (0)
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#define AD9252_OUT_TEST_MSK (0x0000000F << AD9252_OUT_TEST_OFST)
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#define AD9252_TST_OFF_VAL ((0x0 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
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#define AD9252_TST_MDSCL_SHRT_VAL ((0x1 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
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#define AD9252_TST_PSTV_FS_VAL ((0x2 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
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#define AD9252_TST_NGTV_FS_VAL ((0x3 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
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#define AD9252_TST_ALTRNTNG_CHKRBRD_VAL ((0x4 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
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#define AD9252_TST_PN_23_SQNC_VAL ((0x5 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
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#define AD9252_TST_PN_9_SQNC__VAL ((0x6 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
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#define AD9252_TST_1_0_WRD_TGGL_VAL ((0x7 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
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#define AD9252_TST_USR_INPT_VAL ((0x8 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
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#define AD9252_TST_1_0_BT_TGGL_VAL ((0x9 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
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#define AD9252_TST_1_x_SYNC_VAL ((0xa << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
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#define AD9252_TST_1_BIT_HGH_VAL ((0xb << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
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#define AD9252_TST_MXD_BT_FRQ_VAL ((0xc << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK)
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#define AD9252_TST_RST_SHRT_GN_OFST (4)
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#define AD9252_TST_RST_SHRT_GN_MSK (0x00000001 << AD9252_TST_RST_SHRT_GN_OFST)
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#define AD9252_TST_RST_LNG_GN_OFST (5)
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#define AD9252_TST_RST_LNG_GN_MSK (0x00000001 << AD9252_TST_RST_LNG_GN_OFST)
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#define AD9252_USER_IN_MODE_OFST (6)
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#define AD9252_USER_IN_MODE_MSK (0x00000003 << AD9252_USER_IN_MODE_OFST)
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#define AD9252_USR_IN_SNGL_VAL ((0x0 << AD9252_USER_IN_MODE_OFST) & AD9252_USER_IN_MODE_MSK)
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#define AD9252_USR_IN_ALTRNT_VAL ((0x1 << AD9252_USER_IN_MODE_OFST) & AD9252_USER_IN_MODE_MSK)
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#define AD9252_USR_IN_SNGL_ONC_VAL ((0x2 << AD9252_USER_IN_MODE_OFST) & AD9252_USER_IN_MODE_MSK)
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#define AD9252_USR_IN_ALTRNT_ONC_VAL ((0x3 << AD9252_USER_IN_MODE_OFST) & AD9252_USER_IN_MODE_MSK)
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// default value is 0x00
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#define AD9252_OUT_MODE_REG (0x14)
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#define AD9252_OUT_FORMAT_OFST (0)
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#define AD9252_OUT_FORMAT_MSK (0x00000003 << AD9252_OUT_FORMAT_OFST)
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#define AD9252_OUT_BINARY_OFST_VAL ((0x0 << AD9252_OUT_FORMAT_OFST) & AD9252_OUT_FORMAT_MSK)
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#define AD9252_OUT_TWOS_COMPL_VAL ((0x1 << AD9252_OUT_FORMAT_OFST) & AD9252_OUT_FORMAT_MSK)
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#define AD9252_OUT_OTPT_INVRT_OFST (2)
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#define AD9252_OUT_OTPT_INVRT_MSK (0x00000001 << AD9252_OUT_OTPT_INVRT_OFST)
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#define AD9252_OUT_LVDS_OPT_OFST (6)
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#define AD9252_OUT_LVDS_OPT_MSK (0x00000001 << AD9252_OUT_LVDS_OPT_OFST)
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#define AD9252_OUT_LVDS_ANSI_VAL ((0x0 << AD9252_OUT_LVDS_OPT_OFST) & AD9252_OUT_LVDS_OPT_MSK)
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#define AD9252_OUT_LVDS_IEEE_VAL ((0x1 << AD9252_OUT_LVDS_OPT_OFST) & AD9252_OUT_LVDS_OPT_MSK)
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// default value is 0x3
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#define AD9252_OUT_PHASE_REG (0x16)
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#define AD9252_OUT_CLK_OFST (0)
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#define AD9252_OUT_CLK_MSK (0x0000000F << AD9252_OUT_CLK_OFST)
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#define AD9252_OUT_CLK_0_VAL ((0x0 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK)
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#define AD9252_OUT_CLK_60_VAL ((0x1 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK)
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#define AD9252_OUT_CLK_120_VAL ((0x2 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK)
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#define AD9252_OUT_CLK_180_VAL ((0x3 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK)
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#define AD9252_OUT_CLK_300_VAL ((0x5 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK)
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#define AD9252_OUT_CLK_360_VAL ((0x6 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK)
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#define AD9252_OUT_CLK_480_VAL ((0x8 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK)
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#define AD9252_OUT_CLK_540_VAL ((0x9 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK)
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#define AD9252_OUT_CLK_600_VAL ((0xa << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK)
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#define AD9252_OUT_CLK_660_VAL ((0xb << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK) // 0xb - 0xf is 660
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void setAdc9252(int addr, int val) {
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u_int32_t codata;
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codata = val + (addr << 8);
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FILE_LOG(logINFO, ("\tSetting ADC SPI Register. Wrote 0x%04x at 0x%04x\n", val, addr));
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serializeToSPI(ADC_SPI_REG, codata, ADC_SERIAL_CS_OUT_MSK, AD9252_ADC_NUMBITS,
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ADC_SERIAL_CLK_OUT_MSK, ADC_SERIAL_DATA_OUT_MSK, ADC_SERIAL_DATA_OUT_OFST);
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}
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void prepareADC9252(){
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FILE_LOG(logINFOBLUE, ("Preparing ADC:\n"));
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//power mode reset
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FILE_LOG(logINFO, ("\tPower mode reset\n"));
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setAdc9252(AD9252_POWER_MODE_REG, AD9252_INT_RESET_VAL);
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/*#ifdef GOTTHARDD //FIXME:?
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usleep(50000);
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#endif*/
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//power mode chip run
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FILE_LOG(logINFO, ("\tPower mode chip run\n"));
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setAdc9252(AD9252_POWER_MODE_REG, AD9252_INT_CHIP_RUN_VAL);
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#ifdef GOTTHARDD
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/*usleep(50000);*///FIXME:?
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// binary offset
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FILE_LOG(logINFO, ("\tBinary offset\n"));
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setAdc9252(AD9252_OUT_MODE_REG, AD9252_OUT_BINARY_OFST_VAL);
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/*usleep(50000);*///FIXME:?
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#endif
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//output clock phase
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FILE_LOG(logINFO, ("\tOutput clock phase\n"));
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setAdc9252(AD9252_OUT_PHASE_REG, AD9252_OUT_CLK_60_VAL);
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// lvds-iee reduced , binary offset
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FILE_LOG(logINFO, ("\tLvds-iee reduced, binary offset\n"));
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setAdc9252(AD9252_OUT_MODE_REG, AD9252_OUT_LVDS_IEEE_VAL);
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// all devices on chip to receive next command
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FILE_LOG(logINFO, ("\tAll devices on chip to receive next command\n"));
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setAdc9252(AD9252_DEV_IND_2_REG,
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AD9252_CHAN_H_MSK | AD9252_CHAN_G_MSK | AD9252_CHAN_F_MSK | AD9252_CHAN_E_MSK);
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setAdc9252(AD9252_DEV_IND_1_REG,
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AD9252_CHAN_D_MSK | AD9252_CHAN_C_MSK | AD9252_CHAN_B_MSK | AD9252_CHAN_A_MSK |
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AD9252_CLK_CH_DCO_MSK | AD9252_CLK_CH_IFCO_MSK); // unlike 9257, by default ad9252 has this (dco and ifco)off
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// no test mode
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FILE_LOG(logINFO, ("\tNo test mode\n"));
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setAdc9252(AD9252_TEST_MODE_REG, AD9252_TST_OFF_VAL);
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#ifdef TESTADC
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FILE_LOG(logINFOBLUE, ("Putting ADC in Test Mode!\n");
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// mixed bit frequency test mode
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FILE_LOG(logINFO, ("\tMixed bit frequency test mode\n"));
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setAdc9252(AD9252_TEST_MODE_REG, AD9252_TST_MXD_BT_FRQ_VAL);
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#endif
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}
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@ -8,6 +8,7 @@
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/* AD9257 ADC DEFINES */
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#define AD9257_ADC_NUMBITS (24)
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// default value is 0xF
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#define AD9257_DEV_IND_2_REG (0x04)
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#define AD9257_CHAN_H_OFST (0)
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#define AD9257_CHAN_H_MSK (0x00000001 << AD9257_CHAN_H_OFST)
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@ -18,6 +19,7 @@
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#define AD9257_CHAN_E_OFST (3)
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#define AD9257_CHAN_E_MSK (0x00000001 << AD9257_CHAN_E_OFST)
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// default value is 0x3F
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#define AD9257_DEV_IND_1_REG (0x05)
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#define AD9257_CHAN_D_OFST (0)
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#define AD9257_CHAN_D_MSK (0x00000001 << AD9257_CHAN_D_OFST)
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@ -32,51 +34,99 @@
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#define AD9257_CLK_CH_IFCO_OFST (5)
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#define AD9257_CLK_CH_IFCO_MSK (0x00000001 << AD9257_CLK_CH_IFCO_OFST)
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// default value is 0x00
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#define AD9257_POWER_MODE_REG (0x08)
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#define AD9257_POWER_INTERNAL_OFST (0)
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#define AD9257_POWER_INTERNAL_MSK (0x00000003 << AD9257_POWER_INTERNAL_OFST)
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#define AD9257_INT_RESET_VAL (0x3)
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#define AD9257_INT_CHIP_RUN_VAL (0x0)
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#define AD9257_INT_CHIP_RUN_VAL ((0x0 << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK)
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#define AD9257_INT_FULL_PWR_DWN_VAL ((0x1 << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK)
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#define AD9257_INT_STANDBY_VAL ((0x2 << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK)
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#define AD9257_INT_RESET_VAL ((0x3 << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK)
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#define AD9257_POWER_EXTERNAL_OFST (5)
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#define AD9257_POWER_EXTERNAL_MSK (0x00000001 << AD9257_POWER_EXTERNAL_OFST)
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#define AD9257_EXT_FULL_POWER_VAL (0x0)
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#define AD9257_EXT_STANDBY_VAL (0x1)
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#define AD9257_EXT_FULL_POWER_VAL ((0x0 << AD9257_POWER_EXTERNAL_OFST) & AD9257_POWER_EXTERNAL_MSK)
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#define AD9257_EXT_STANDBY_VAL ((0x1 << AD9257_POWER_EXTERNAL_OFST) & AD9257_POWER_EXTERNAL_MSK)
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// default value is 0x0
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#define AD9257_TEST_MODE_REG (0x0D)
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#define AD9257_OUT_TEST_OFST (0)
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#define AD9257_OUT_TEST_MSK (0x0000000F << AD9257_OUT_TEST_OFST)
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#define AD9257_TST_OFF_VAL ((0x0 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
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#define AD9257_TST_MDSCL_SHRT_VAL ((0x1 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
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#define AD9257_TST_PSTV_FS_VAL ((0x2 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
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#define AD9257_TST_NGTV_FS_VAL ((0x3 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
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#define AD9257_TST_ALTRNTNG_CHKRBRD_VAL ((0x4 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
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#define AD9257_TST_PN_23_SQNC_VAL ((0x5 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
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#define AD9257_TST_PN_9_SQNC__VAL ((0x6 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
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#define AD9257_TST_1_0_WRD_TGGL_VAL ((0x7 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
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#define AD9257_TST_USR_INPT_VAL ((0x8 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
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#define AD9257_TST_1_0_BT_TGGL_VAL ((0x9 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
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#define AD9257_TST_1_x_SYNC_VAL ((0xa << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
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#define AD9257_TST_1_BIT_HGH_VAL ((0xb << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
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#define AD9257_TST_MXD_BT_FRQ_VAL ((0xc << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK)
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#define AD9257_TST_RST_SHRT_GN_OFST (4)
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#define AD9257_TST_RST_SHRT_GN_MSK (0x00000001 << AD9257_TST_RST_SHRT_GN_OFST)
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#define AD9257_TST_RST_LNG_GN_OFST (5)
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#define AD9257_TST_RST_LNG_GN_MSK (0x00000001 << AD9257_TST_RST_LNG_GN_OFST)
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#define AD9257_USER_IN_MODE_OFST (6)
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#define AD9257_USER_IN_MODE_MSK (0x00000003 << AD9257_USER_IN_MODE_OFST)
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#define AD9257_USR_IN_SNGL_VAL ((0x0 << AD9257_USER_IN_MODE_OFST) & AD9257_USER_IN_MODE_MSK)
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#define AD9257_USR_IN_ALTRNT_VAL ((0x1 << AD9257_USER_IN_MODE_OFST) & AD9257_USER_IN_MODE_MSK)
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#define AD9257_USR_IN_SNGL_ONC_VAL ((0x2 << AD9257_USER_IN_MODE_OFST) & AD9257_USER_IN_MODE_MSK)
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#define AD9257_USR_IN_ALTRNT_ONC_VAL ((0x3 << AD9257_USER_IN_MODE_OFST) & AD9257_USER_IN_MODE_MSK)
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// default value is 0x01
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#define AD9257_OUT_MODE_REG (0x14)
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#define AD9257_OUT_FORMAT_OFST (0)
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#define AD9257_OUT_FORMAT_MSK (0x00000001 << AD9257_OUT_FORMAT_OFST)
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#define AD9257_OUT_BINARY_OFST_VAL (0)
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#define AD9257_OUT_TWOS_COMPL_VAL (1)
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#define AD9257_OUT_BINARY_OFST_VAL ((0x0 << AD9257_OUT_FORMAT_OFST) & AD9257_OUT_FORMAT_MSK)
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#define AD9257_OUT_TWOS_COMPL_VAL ((0x1 << AD9257_OUT_FORMAT_OFST) & AD9257_OUT_FORMAT_MSK)
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#define AD9257_OUT_OTPT_INVRT_OFST (2)
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#define AD9257_OUT_OTPT_INVRT_MSK (0x00000001 << AD9257_OUT_OTPT_INVRT_OFST)
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#define AD9257_OUT_LVDS_OPT_OFST (6)
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#define AD9257_OUT_LVDS_OPT_MSK (0x00000001 << AD9257_OUT_LVDS_OPT_OFST)
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#define AD9257_OUT_LVDS_ANSI_VAL (0)
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#define AD9257_OUT_LVDS_IEEE_VAL (1)
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#define AD9257_OUT_LVDS_ANSI_VAL ((0x0 << AD9257_OUT_LVDS_OPT_OFST) & AD9257_OUT_LVDS_OPT_MSK)
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#define AD9257_OUT_LVDS_IEEE_VAL ((0x1 << AD9257_OUT_LVDS_OPT_OFST) & AD9257_OUT_LVDS_OPT_MSK)
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// default value is 0x3
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#define AD9257_OUT_PHASE_REG (0x16)
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#define AD9257_OUT_CLK_OFST (0)
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#define AD9257_OUT_CLK_MSK (0x0000000F << AD9257_OUT_CLK_OFST)
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||||
#define AD9257_OUT_CLK_60_VAL (0x1)
|
||||
#define AD9257_OUT_CLK_0_VAL ((0x0 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
|
||||
#define AD9257_OUT_CLK_60_VAL ((0x1 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
|
||||
#define AD9257_OUT_CLK_120_VAL ((0x2 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
|
||||
#define AD9257_OUT_CLK_180_VAL ((0x3 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
|
||||
#define AD9257_OUT_CLK_240_VAL ((0x4 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
|
||||
#define AD9257_OUT_CLK_300_VAL ((0x5 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
|
||||
#define AD9257_OUT_CLK_360_VAL ((0x6 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
|
||||
#define AD9257_OUT_CLK_420_VAL ((0x7 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
|
||||
#define AD9257_OUT_CLK_480_VAL ((0x8 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
|
||||
#define AD9257_OUT_CLK_540_VAL ((0x9 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
|
||||
#define AD9257_OUT_CLK_600_VAL ((0xa << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
|
||||
#define AD9257_OUT_CLK_660_VAL ((0xb << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK)
|
||||
#define AD9257_IN_CLK_OFST (4)
|
||||
#define AD9257_IN_CLK_MSK (0x00000007 << AD9257_IN_CLK_OFST)
|
||||
#define AD9257_IN_CLK_0_VAL (0x0)
|
||||
#define AD9257_IN_CLK_0_VAL ((0x0 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK)
|
||||
#define AD9257_IN_CLK_1_VAL ((0x1 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK)
|
||||
#define AD9257_IN_CLK_2_VAL ((0x2 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK)
|
||||
#define AD9257_IN_CLK_3_VAL ((0x3 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK)
|
||||
#define AD9257_IN_CLK_4_VAL ((0x4 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK)
|
||||
#define AD9257_IN_CLK_5_VAL ((0x5 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK)
|
||||
#define AD9257_IN_CLK_6_VAL ((0x6 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK)
|
||||
#define AD9257_IN_CLK_7_VAL ((0x7 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK)
|
||||
|
||||
// default value is 0x4
|
||||
#define AD9257_VREF_REG (0x18)
|
||||
#define AD9257_VREF_OFST (0)
|
||||
#define AD9257_VREF_MSK (0x00000003 << AD9257_VREF_OFST)
|
||||
#define AD9257_VREF_1_33_VAL (0x2)
|
||||
|
||||
#define AD9257_TEST_MODE_REG (0x0D)
|
||||
#define AD9257_OUT_TEST_OFST (0)
|
||||
#define AD9257_OUT_TEST_MSK (0x0000000F << AD9257_OUT_TEST_OFST)
|
||||
#define AD9257_NONE_VAL (0x0)
|
||||
#define AD9257_MIXED_BIT_FREQ_VAL (0xC)
|
||||
#define AD9257_TEST_RESET_SHORT_GEN (4)
|
||||
#define AD9257_TEST_RESET_LONG_GEN (5)
|
||||
#define AD9257_USER_IN_MODE_OFST (6)
|
||||
#define AD9257_USER_IN_MODE_MSK (0x00000003 << AD9257_USER_IN_MODE_OFST)
|
||||
#define AD9257_VREF_MSK (0x00000007 << AD9257_VREF_OFST)
|
||||
#define AD9257_VREF_1_0_VAL ((0x0 << AD9257_VREF_OFST) & AD9257_VREF_MSK)
|
||||
#define AD9257_VREF_1_14_VAL ((0x1 << AD9257_VREF_OFST) & AD9257_VREF_MSK)
|
||||
#define AD9257_VREF_1_33_VAL ((0x2 << AD9257_VREF_OFST) & AD9257_VREF_MSK)
|
||||
#define AD9257_VREF_1_6_VAL ((0x3 << AD9257_VREF_OFST) & AD9257_VREF_MSK)
|
||||
#define AD9257_VREF_2_0_VAL ((0x4 << AD9257_VREF_OFST) & AD9257_VREF_MSK)
|
||||
|
||||
|
||||
void setAdc(int addr, int val) {
|
||||
void setAdc9257(int addr, int val) {
|
||||
|
||||
u_int32_t codata;
|
||||
codata = val + (addr << 8);
|
||||
@ -85,64 +135,54 @@ void setAdc(int addr, int val) {
|
||||
ADC_SERIAL_CLK_OUT_MSK, ADC_SERIAL_DATA_OUT_MSK, ADC_SERIAL_DATA_OUT_OFST);
|
||||
}
|
||||
|
||||
void prepareADC(){
|
||||
void prepareADC9257(){
|
||||
FILE_LOG(logINFOBLUE, ("Preparing ADC:\n"));
|
||||
|
||||
//power mode reset
|
||||
FILE_LOG(logINFO, ("\tPower mode reset\n"));
|
||||
setAdc(AD9257_POWER_MODE_REG,
|
||||
(AD9257_INT_RESET_VAL << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK);
|
||||
#ifdef GOTTHARDD
|
||||
usleep(50000);
|
||||
#endif
|
||||
setAdc9257(AD9257_POWER_MODE_REG, AD9257_INT_RESET_VAL);
|
||||
|
||||
//power mode chip run
|
||||
FILE_LOG(logINFO, ("\tPower mode chip run\n"));
|
||||
setAdc(AD9257_POWER_MODE_REG,
|
||||
(AD9257_INT_CHIP_RUN_VAL << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK);
|
||||
#ifdef GOTTHARDD
|
||||
usleep(50000);
|
||||
setAdc9257(AD9257_POWER_MODE_REG, AD9257_INT_CHIP_RUN_VAL);
|
||||
|
||||
// binary offset
|
||||
FILE_LOG(logINFO, ("\tBinary offset\n"));
|
||||
setAdc(AD9257_OUT_MODE_REG,
|
||||
(AD9257_OUT_BINARY_OFST_VAL << AD9257_OUT_FORMAT_OFST) & AD9257_OUT_FORMAT_MSK);
|
||||
usleep(50000);
|
||||
return;
|
||||
#endif
|
||||
setAdc9257(AD9257_OUT_MODE_REG, AD9257_OUT_BINARY_OFST_VAL);
|
||||
|
||||
//output clock phase
|
||||
FILE_LOG(logINFO, ("\tOutput clock phase\n"));
|
||||
setAdc(AD9257_OUT_PHASE_REG,
|
||||
(AD9257_OUT_CLK_60_VAL << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK);
|
||||
FILE_LOG(logINFO, ("\tOutput clock phase\n")); //FIXME:??
|
||||
setAdc9257(AD9257_OUT_PHASE_REG, AD9257_OUT_CLK_60_VAL);
|
||||
|
||||
// lvds-iee reduced , binary offset
|
||||
FILE_LOG(logINFO, ("\tLvds-iee reduced, binary offset\n"));
|
||||
setAdc(AD9257_OUT_MODE_REG,
|
||||
(AD9257_OUT_LVDS_IEEE_VAL << AD9257_OUT_LVDS_OPT_OFST) & AD9257_OUT_LVDS_OPT_MSK);
|
||||
setAdc9257(AD9257_OUT_MODE_REG, AD9257_OUT_LVDS_IEEE_VAL);
|
||||
|
||||
// all devices on chip to receive next command
|
||||
FILE_LOG(logINFO, ("\tAll devices on chip to receive next command\n"));
|
||||
setAdc(AD9257_DEV_IND_2_REG,
|
||||
setAdc9257(AD9257_DEV_IND_2_REG,
|
||||
AD9257_CHAN_H_MSK | AD9257_CHAN_G_MSK | AD9257_CHAN_F_MSK | AD9257_CHAN_E_MSK);
|
||||
setAdc(AD9257_DEV_IND_1_REG,
|
||||
AD9257_CHAN_D_MSK | AD9257_CHAN_C_MSK | AD9257_CHAN_B_MSK | AD9257_CHAN_A_MSK |
|
||||
AD9257_CLK_CH_DCO_MSK | AD9257_CLK_CH_IFCO_MSK);
|
||||
#ifdef GOTTHARDD
|
||||
setAdc9257(AD9257_DEV_IND_1_REG,
|
||||
AD9257_CHAN_D_MSK | AD9257_CHAN_C_MSK | AD9257_CHAN_B_MSK | AD9257_CHAN_A_MSK );// FIXME: gotthard setting dco and ifco to off??
|
||||
#else
|
||||
setAdc9257(AD9257_DEV_IND_1_REG,
|
||||
AD9257_CHAN_D_MSK | AD9257_CHAN_C_MSK | AD9257_CHAN_B_MSK | AD9257_CHAN_A_MSK |
|
||||
AD9257_CLK_CH_DCO_MSK | AD9257_CLK_CH_IFCO_MSK);
|
||||
#endif
|
||||
|
||||
// vref 1.33
|
||||
FILE_LOG(logINFO, ("\tVref 1.33\n"));
|
||||
setAdc(AD9257_VREF_REG,
|
||||
(AD9257_VREF_1_33_VAL << AD9257_VREF_OFST) & AD9257_VREF_MSK);
|
||||
FILE_LOG(logINFO, ("\tVref 1.33\n"));// FIXME: needed for Gottthard? earlier not set (default 3.0 v)
|
||||
setAdc9257(AD9257_VREF_REG, AD9257_VREF_1_33_VAL);
|
||||
|
||||
// no test mode
|
||||
FILE_LOG(logINFO, ("\tNo test mode\n"));
|
||||
setAdc(AD9257_TEST_MODE_REG,
|
||||
(AD9257_NONE_VAL << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK);
|
||||
setAdc9257(AD9257_TEST_MODE_REG, AD9257_TST_OFF_VAL);
|
||||
|
||||
#ifdef TESTADC
|
||||
FILE_LOG(logINFOBLUE, ("Putting ADC in Test Mode!\n");
|
||||
// mixed bit frequency test mode
|
||||
FILE_LOG(logINFO, ("\tMixed bit frequency test mode\n"));
|
||||
setAdc(AD9257_TEST_MODE_REG,
|
||||
(AD9257_MIXED_BIT_FREQ_VAL << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK);
|
||||
setAdc9257(AD9257_TEST_MODE_REG, AD9257_TST_MXD_BT_FRQ_VAL);
|
||||
#endif
|
||||
}
|
||||
|
||||
@ -140,24 +140,27 @@ int setThresholdEnergy(int ev);
|
||||
#endif
|
||||
|
||||
// parameters - dac, adc, hv
|
||||
#ifdef JUNGFRAUD
|
||||
void serializeToSPI(u_int32_t addr, u_int32_t val, u_int32_t csmask, int numbitstosend, u_int32_t clkmask, u_int32_t digoutmask, int digofset); //commonServerFunction.h
|
||||
void initDac(int dacnum);
|
||||
#endif
|
||||
#if defined(GOTTHARDD) || defined(JUNGFRAUD)
|
||||
void serializeToSPI(u_int32_t addr, u_int32_t val, u_int32_t csmask, int numbitstosend, u_int32_t clkmask, u_int32_t digoutmask, int digofset); //commonServerFunction.h
|
||||
void initDac(int dacnum);
|
||||
int voltageToDac(int value);
|
||||
int dacToVoltage(unsigned int digital);
|
||||
extern void setAdc(int addr, int val); // AD9257.h
|
||||
#endif
|
||||
#ifdef GOTTHARDD
|
||||
extern void setAdc9257(int addr, int val); // AD9257.h
|
||||
extern void setAdc9252(int addr, int val); // AD9252.h (old board)
|
||||
#elif JUNGFRAUD
|
||||
extern void setAdc9257(int addr, int val); // AD9257.h
|
||||
#endif
|
||||
|
||||
void setDAC(enum DACINDEX ind, int val, int mV, int retval[]);
|
||||
#ifdef GOTTHARDD
|
||||
/*#ifdef GOTTHARDD
|
||||
void initDAC(int dac_addr, int value);
|
||||
void clearDACSregister();
|
||||
void nextDAC();
|
||||
void program_one_dac(int addr, int value);
|
||||
u_int32_t putout(char *s);
|
||||
#endif
|
||||
#endif*/
|
||||
int getADC(enum ADCINDEX ind);
|
||||
|
||||
int setHighVoltage(int val);
|
||||
|
||||
@ -2151,7 +2151,14 @@ int write_adc_register(int file_des) {
|
||||
#ifndef VIRTUAL
|
||||
// only set
|
||||
if (Server_VerifyLock() == OK)
|
||||
setAdc(addr, val);
|
||||
#ifdef JUNGFRAUD
|
||||
setAdc9257(addr, val);
|
||||
#elif GOTTHARDD
|
||||
if (getBoardRevision() == 1)
|
||||
setAdc9252(addr, val);
|
||||
else
|
||||
setAdc9257(addr, val);
|
||||
#endif
|
||||
#endif
|
||||
#endif
|
||||
return Server_SendResult(file_des, INT32, UPDATE, NULL, 0);
|
||||
|
||||
Reference in New Issue
Block a user