mirror of
https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2025-05-08 05:40:03 +02:00
gotthard works, data to be authenticated when personnel available
This commit is contained in:
parent
89fa30ee4b
commit
8942098a90
@ -1,7 +1,7 @@
|
||||
#pragma once
|
||||
|
||||
/* Definitions for FPGA*/
|
||||
#define MEM_MAP_SHIFT 11
|
||||
#define MEM_MAP_SHIFT (11)
|
||||
|
||||
/** Gain register */
|
||||
#define GAIN_REG (0x10 << MEM_MAP_SHIFT)
|
||||
|
||||
@ -1,9 +1,9 @@
|
||||
Path: slsDetectorPackage/slsDetectorServers/gotthardDetectorServer
|
||||
URL: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git
|
||||
Repository Root: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git
|
||||
Repsitory UUID: 91dd176a0fb314f583ca6e29140053f1eb742896
|
||||
Revision: 5
|
||||
Repsitory UUID: 89fa30ee4b815dd208c5e2ca0c401707eacbcef7
|
||||
Revision: 7
|
||||
Branch: refactor
|
||||
Last Changed Author: Dhanya_Thattil
|
||||
Last Changed Rev: 4166
|
||||
Last Changed Date: 2018-11-08 17:15:25.000000002 +0100 ./RegisterDefs.h
|
||||
Last Changed Rev: 4170
|
||||
Last Changed Date: 2018-11-09 11:03:24.000000002 +0100 ./RegisterDefs.h
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
#define GITURL "git@github.com:slsdetectorgroup/slsDetectorPackage.git"
|
||||
#define GITREPUUID "91dd176a0fb314f583ca6e29140053f1eb742896"
|
||||
#define GITREPUUID "89fa30ee4b815dd208c5e2ca0c401707eacbcef7"
|
||||
#define GITAUTH "Dhanya_Thattil"
|
||||
#define GITREV 0x4166
|
||||
#define GITDATE 0x20181108
|
||||
#define GITREV 0x4170
|
||||
#define GITDATE 0x20181109
|
||||
#define GITBRANCH "refactor"
|
||||
|
||||
@ -150,7 +150,7 @@ u_int32_t testFpga(void) {
|
||||
int ret = OK;
|
||||
u_int32_t val = bus_r(FIX_PATT_REG);
|
||||
if (val == FIX_PATT_VAL) {
|
||||
FILE_LOG(logINFO, ("Fixed pattern: successful match 0x%08x\n",val));
|
||||
FILE_LOG(logINFO, ("Fixed pattern: successful match (0x%08x)\n",val));
|
||||
} else {
|
||||
FILE_LOG(logERROR, ("Fixed pattern does not match! Read 0x%08x, expected 0x%08x\n", val, FIX_PATT_VAL));
|
||||
ret = FAIL;
|
||||
@ -168,7 +168,7 @@ u_int32_t testFpga(void) {
|
||||
bus_w(addr, val);
|
||||
readval = bus_r(addr);
|
||||
if (readval != val) {
|
||||
FILE_LOG(logERROR, ("Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n",
|
||||
FILE_LOG(logERROR, ("1:Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n",
|
||||
i, val, readval));
|
||||
ret = FAIL;
|
||||
break;
|
||||
@ -177,7 +177,7 @@ u_int32_t testFpga(void) {
|
||||
bus_w(addr, val);
|
||||
readval = bus_r(addr);
|
||||
if (readval != val) {
|
||||
FILE_LOG(logERROR, ("Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n",
|
||||
FILE_LOG(logERROR, ("2:Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n",
|
||||
i, val, readval));
|
||||
ret = FAIL;
|
||||
break;
|
||||
@ -186,15 +186,16 @@ u_int32_t testFpga(void) {
|
||||
bus_w(addr, val);
|
||||
readval = bus_r(addr);
|
||||
if (readval != val) {
|
||||
FILE_LOG(logERROR, ("Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n",
|
||||
FILE_LOG(logERROR, ("3:Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n",
|
||||
i, val, readval));
|
||||
ret = FAIL;
|
||||
break;
|
||||
}
|
||||
val = 0xF0F0F0F0;
|
||||
bus_w(addr, val);
|
||||
readval = bus_r(addr);
|
||||
if (readval != val) {
|
||||
FILE_LOG(logERROR, ("Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n",
|
||||
FILE_LOG(logERROR, ("4:Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n",
|
||||
i, val, readval));
|
||||
ret = FAIL;
|
||||
break;
|
||||
@ -370,7 +371,8 @@ void setupDetector() {
|
||||
|
||||
// Initialization
|
||||
setPhaseShiftOnce();
|
||||
prepareADC(); /* TODO: check if need to replace with configureADC from firmwarE_funcs.c? */
|
||||
//prepareADC(); /* TODO: check if need to replace with configureADC from firmwarE_funcs.c? */
|
||||
configureADC();
|
||||
setROIADC(-1); // set adcsyncreg, daqreg, chipofinterestreg, cleanfifos,
|
||||
setGbitReadout();
|
||||
//initDac(0); /*FIXME: if it doesnt work, switch to the old dac*/
|
||||
@ -414,19 +416,18 @@ int setDefaultDacs() {
|
||||
}
|
||||
|
||||
uint32_t writeRegister16And32(uint32_t offset, uint32_t data) {
|
||||
u_int32_t addr = offset << MEM_MAP_SHIFT;
|
||||
if ((addr == CONTROL_REG) || (addr == FIFO_DATA_REG)) {
|
||||
bus_w16(addr, (u_int16_t)data);
|
||||
return (u_int32_t)bus_r16(addr);
|
||||
if (((offset << MEM_MAP_SHIFT) == CONTROL_REG) ||
|
||||
((offset << MEM_MAP_SHIFT) == FIFO_DATA_REG)) {
|
||||
return writeRegister16(offset, data);
|
||||
} else
|
||||
return writeRegister(offset, data);
|
||||
|
||||
}
|
||||
|
||||
uint32_t readRegister16And32(uint32_t offset) {
|
||||
u_int32_t addr = offset << MEM_MAP_SHIFT;
|
||||
if ((addr == CONTROL_REG) || (addr == FIFO_DATA_REG)) {
|
||||
return (u_int32_t)bus_r16(addr);
|
||||
if (((offset << MEM_MAP_SHIFT) == CONTROL_REG) ||
|
||||
((offset << MEM_MAP_SHIFT) == FIFO_DATA_REG)) {
|
||||
return readRegister16(offset);
|
||||
} else
|
||||
return readRegister(offset);
|
||||
}
|
||||
@ -466,6 +467,65 @@ void setPhaseShift(int numphaseshift) {
|
||||
FILE_LOG(logDEBUG1, ("Multipurpose reg: 0x%x\n", val));
|
||||
}
|
||||
|
||||
void configureADC() {
|
||||
printf("Preparing ADC\n");
|
||||
u_int32_t valw,codata,csmask;
|
||||
int i,j,cdx,ddx;
|
||||
cdx=0; ddx=1;
|
||||
csmask=0x7c; // 1111100
|
||||
|
||||
for(j=0;j<3;j++){
|
||||
//command and value;
|
||||
codata = 0;
|
||||
if(j==0)
|
||||
codata=(0x08<<8)+(0x3);//Power modes(global) //reset
|
||||
else if(j==1)
|
||||
codata=(0x08<<8)+(0x0);//Power modes(global) //chip run
|
||||
else
|
||||
codata = (0x14<<8)+(0x0);//Output mode //offset binary
|
||||
|
||||
|
||||
// start point
|
||||
valw=0xffffffff;
|
||||
bus_w(ADC_SPI_REG,(valw));
|
||||
|
||||
//chip sel bar down
|
||||
valw=((0xffffffff&(~csmask)));
|
||||
bus_w(ADC_SPI_REG,valw);
|
||||
|
||||
for (i=0;i<24;i++) {
|
||||
//cldwn
|
||||
valw=valw&(~(0x1<<cdx));
|
||||
bus_w(ADC_SPI_REG,valw);
|
||||
//usleep(0);
|
||||
|
||||
//write data (i)
|
||||
valw=(valw&(~(0x1<<ddx)))+(((codata>>(23-i))&0x1)<<ddx);
|
||||
bus_w(ADC_SPI_REG,valw);
|
||||
//usleep(0);
|
||||
|
||||
//clkup
|
||||
valw=valw+(0x1<<cdx);
|
||||
bus_w(ADC_SPI_REG,valw);
|
||||
//usleep(0);
|
||||
}
|
||||
|
||||
valw |= csmask;
|
||||
bus_w(ADC_SPI_REG,valw);
|
||||
//usleep(0);
|
||||
|
||||
// stop point =start point
|
||||
valw=valw&(~(0x1<<cdx));
|
||||
bus_w(ADC_SPI_REG,(valw));
|
||||
|
||||
valw = 0xffffffff;
|
||||
bus_w(ADC_SPI_REG,(valw));
|
||||
|
||||
//usleep in between
|
||||
usleep(50000);
|
||||
}
|
||||
}
|
||||
|
||||
void cleanFifos() {
|
||||
FILE_LOG(logINFO, ("Cleaning FIFOs\n"));
|
||||
bus_w(ADC_SYNC_REG, bus_r(ADC_SYNC_REG) | ADC_SYNC_CLEAN_FIFOS_MSK);
|
||||
@ -516,7 +576,8 @@ void setChipOfInterestRegister(int adc) {
|
||||
(((1 << adc) << CHIP_OF_INTRST_ADC_SEL_OFST) & CHIP_OF_INTRST_ADC_SEL_MSK));
|
||||
|
||||
// 0x0500(no roi), 0x0100(roi)
|
||||
u_int32_t numChannels = ((adcConfigured == -1) ? NCHIP : NCHIPS_PER_ADC) * NCHAN;
|
||||
u_int32_t numChannels = (adcConfigured == -1) ? (NCHIP * NCHAN) : (NCHIPS_PER_ADC * NCHAN);
|
||||
numChannels = ((numChannels << CHIP_OF_INTRST_NUM_CHNNLS_OFST) & CHIP_OF_INTRST_NUM_CHNNLS_MSK);
|
||||
|
||||
// 0x500001f(no roi), 0x10000xx(roi) MSB:num channels, LSB: selected ADC
|
||||
u_int32_t val = (numChannels | adcSelect);
|
||||
@ -781,16 +842,16 @@ ROI* setROI(int n, ROI arg[], int *retvalsize, int *ret) {
|
||||
|
||||
//set adc of interest
|
||||
setROIADC(adc);
|
||||
}
|
||||
} else FILE_LOG(logINFO, ("Getting ROI:\n"));
|
||||
|
||||
// print
|
||||
if (!nROI) {
|
||||
FILE_LOG(logINFO, ("\tROI: None\n\n"));
|
||||
FILE_LOG(logINFO, ("\tROI: None\n"));
|
||||
} else {
|
||||
FILE_LOG(logINFO, ("ROI:\n"));
|
||||
int i = 0;
|
||||
for (i = 0; i < nROI; ++i) {
|
||||
FILE_LOG(logINFO, ("\t(%d, %d)\n\n", rois[i].xmin, rois[i].xmax));
|
||||
FILE_LOG(logINFO, ("\t(%d, %d)\n", rois[i].xmin, rois[i].xmax));
|
||||
|
||||
}
|
||||
}
|
||||
@ -809,56 +870,56 @@ int64_t setTimer(enum timerIndex ind, int64_t val) {
|
||||
|
||||
case FRAME_NUMBER:
|
||||
if(val >= 0) {
|
||||
FILE_LOG(logINFO, ("Setting #frames: %lld\n",(long long int)val));
|
||||
FILE_LOG(logINFO, ("Setting Frames: %lld\n",(long long int)val));
|
||||
}
|
||||
retval = set64BitReg(val, SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG);
|
||||
FILE_LOG(logDEBUG1, ("\tGetting #frames: %lld\n", (long long int)retval));
|
||||
FILE_LOG(logDEBUG1, ("\tGetting Frames: %lld\n", (long long int)retval));
|
||||
break;
|
||||
|
||||
case ACQUISITION_TIME:
|
||||
if(val >= 0){
|
||||
FILE_LOG(logINFO, ("Setting exptime: %lldns\n", (long long int)val));
|
||||
FILE_LOG(logINFO, ("Setting Exptime: %lld ns\n", (long long int)val));
|
||||
val = (val * 1E-3 * CLK_FREQ) + 0.5;
|
||||
}
|
||||
retval = (set64BitReg(val, SET_EXPTIME_LSB_REG, SET_EXPTIME_MSB_REG) /
|
||||
(1E-3 * CLK_FREQ)) + 0.5;
|
||||
FILE_LOG(logDEBUG1, ("\tGetting exptime: %lldns\n", (long long int)retval));
|
||||
FILE_LOG(logINFO, ("\tGetting Exptime: %lld ns\n", (long long int)retval));
|
||||
break;
|
||||
|
||||
case FRAME_PERIOD:
|
||||
if(val >= 0){
|
||||
FILE_LOG(logINFO, ("Setting period: %lldns\n",(long long int)val));
|
||||
FILE_LOG(logINFO, ("Setting Period: %lld ns\n",(long long int)val));
|
||||
val = (val * 1E-3 * CLK_FREQ) + 0.5;
|
||||
}
|
||||
retval = (set64BitReg(val, SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG) /
|
||||
(1E-3 * CLK_FREQ)) + 0.5;
|
||||
FILE_LOG(logDEBUG1, ("\tGetting period: %lldns\n", (long long int)retval));
|
||||
FILE_LOG(logINFO, ("\tGetting Period: %lld ns\n", (long long int)retval));
|
||||
break;
|
||||
|
||||
case DELAY_AFTER_TRIGGER:
|
||||
if(val >= 0){
|
||||
FILE_LOG(logINFO, ("Setting delay: %lldns\n", (long long int)val));
|
||||
FILE_LOG(logINFO, ("Setting Delay: %lld ns\n", (long long int)val));
|
||||
if (masterflags == IS_MASTER) {
|
||||
val += masterdefaultdelay;
|
||||
FILE_LOG(logINFO, ("\tActual delay (master): %lld\n", (long long int) val));
|
||||
FILE_LOG(logINFO, ("\tActual Delay (master): %lld\n", (long long int) val));
|
||||
}
|
||||
val = (val * 1E-3 * CLK_FREQ) + 0.5;
|
||||
}
|
||||
retval = (set64BitReg(val, SET_DELAY_LSB_REG, SET_DELAY_MSB_REG) /
|
||||
(1E-3 * CLK_FREQ)) + 0.5;
|
||||
FILE_LOG(logDEBUG1, ("\tGetting delay: %lldns\n", (long long int)retval));
|
||||
FILE_LOG(logINFO, ("\tGetting Delay: %lld ns\n", (long long int)retval));
|
||||
if (masterflags == IS_MASTER) {
|
||||
FILE_LOG(logDEBUG1, ("\tActual delay read (master): %lld\n", (long long int) retval));
|
||||
FILE_LOG(logDEBUG1, ("\tActual Delay read (master): %lld\n", (long long int) retval));
|
||||
retval -= masterdefaultdelay;
|
||||
}
|
||||
break;
|
||||
|
||||
case CYCLES_NUMBER:
|
||||
if(val >= 0) {
|
||||
FILE_LOG(logINFO, ("Setting #cycles: %lld\n", (long long int)val));
|
||||
FILE_LOG(logINFO, ("Setting Cycles: %lld\n", (long long int)val));
|
||||
}
|
||||
retval = set64BitReg(val, SET_TRAINS_LSB_REG, SET_TRAINS_MSB_REG);
|
||||
FILE_LOG(logDEBUG1, ("\tGetting #cycles: %lld\n", (long long int)retval));
|
||||
FILE_LOG(logDEBUG1, ("\tGetting Cycles: %lld\n", (long long int)retval));
|
||||
break;
|
||||
|
||||
default:
|
||||
@ -919,6 +980,33 @@ int64_t getTimeLeft(enum timerIndex ind){
|
||||
return retval;
|
||||
}
|
||||
|
||||
int validateTimer(enum timerIndex ind, int64_t val, int64_t retval) {
|
||||
if (val < 0)
|
||||
return OK;
|
||||
switch(ind) {
|
||||
case ACQUISITION_TIME:
|
||||
case FRAME_PERIOD:
|
||||
val = (val * 1E-3 * CLK_FREQ) + 0.5; // convert to freq
|
||||
val = (val / (1E-3 * CLK_FREQ)) + 0.5; // convert back to timer
|
||||
if (val != retval)
|
||||
return FAIL;
|
||||
case DELAY_AFTER_TRIGGER:
|
||||
if (masterflags == IS_MASTER) {
|
||||
val += masterdefaultdelay;
|
||||
}
|
||||
val = (val * 1E-3 * CLK_FREQ) + 0.5; // convert to freq
|
||||
val = (val / (1E-3 * CLK_FREQ)) + 0.5; // convert back to timer
|
||||
if (masterflags == IS_MASTER) {
|
||||
val -= masterdefaultdelay;
|
||||
}
|
||||
if (val != retval)
|
||||
return FAIL;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
return OK;
|
||||
}
|
||||
|
||||
|
||||
/* parameters - channel, chip, module, settings */
|
||||
|
||||
@ -1005,23 +1093,23 @@ enum detectorSettings getSettings(){
|
||||
uint32_t val = regval & GAIN_CONFGAIN_MSK;
|
||||
switch(val) {
|
||||
case GAIN_CONFGAIN_DYNMC_GAIN_VAL:
|
||||
FILE_LOG(logINFO, ("Settings read: Dyanmic Gain. Gain Reg: 0x%x\n", regval));
|
||||
FILE_LOG(logDEBUG1, ("Settings read: Dynamic Gain. Gain Reg: 0x%x\n", regval));
|
||||
thisSettings = DYNAMICGAIN;
|
||||
break;
|
||||
case GAIN_CONFGAIN_HGH_GAIN_VAL:
|
||||
FILE_LOG(logINFO, ("Settings read: High Gain. Gain Reg: 0x%x\n", regval));
|
||||
FILE_LOG(logDEBUG1, ("Settings read: High Gain. Gain Reg: 0x%x\n", regval));
|
||||
thisSettings = HIGHGAIN;
|
||||
break;
|
||||
case GAIN_CONFGAIN_LW_GAIN_VAL:
|
||||
FILE_LOG(logINFO, ("Settings read: Low Gain. Gain Reg: 0x%x\n", regval));
|
||||
FILE_LOG(logDEBUG1, ("Settings read: Low Gain. Gain Reg: 0x%x\n", regval));
|
||||
thisSettings = LOWGAIN;
|
||||
break;
|
||||
case GAIN_CONFGAIN_MDM_GAIN_VAL:
|
||||
FILE_LOG(logINFO, ("Settings read: Medium Gain. Gain Reg: 0x%x\n", regval));
|
||||
FILE_LOG(logDEBUG1, ("Settings read: Medium Gain. Gain Reg: 0x%x\n", regval));
|
||||
thisSettings = MEDIUMGAIN;
|
||||
break;
|
||||
case GAIN_CONFGAIN_VRY_HGH_GAIN_VAL:
|
||||
FILE_LOG(logINFO, ("Settings read: Very High Gain. Gain Reg: 0x%x\n", regval));
|
||||
FILE_LOG(logDEBUG1, ("Settings read: Very High Gain. Gain Reg: 0x%x\n", regval));
|
||||
thisSettings = VERYHIGHGAIN;
|
||||
break;
|
||||
default:
|
||||
@ -1070,7 +1158,7 @@ void setDAC(enum DACINDEX ind, int val, int mV, int retval[]){
|
||||
}
|
||||
|
||||
if (val >= 0) {
|
||||
FILE_LOG(logINFO, ("Setting DAC %d: %d dac (%d mV)\n",ind, val, mV));
|
||||
FILE_LOG(logINFO, ("Setting DAC %d: %d dac (%d mV)\n",ind, val, dacmV));
|
||||
#ifndef VIRTUAL
|
||||
initDAC(ind,val);
|
||||
clearDACSregister();
|
||||
@ -1322,14 +1410,17 @@ enum externalCommunicationMode getTiming() {
|
||||
void setExtSignal(enum externalSignalFlag mode) {
|
||||
switch (mode) {
|
||||
case TRIGGER_IN_RISING_EDGE:
|
||||
FILE_LOG(logINFO, ("Setting External Signal flag: Trigger in Rising Edge\n"));
|
||||
break;
|
||||
case TRIGGER_IN_FALLING_EDGE:
|
||||
signalMode = mode;
|
||||
setTiming(getTiming());
|
||||
FILE_LOG(logINFO, ("Setting External Signal flag: Trigger in Falling Edge\n"));
|
||||
break;
|
||||
default:
|
||||
FILE_LOG(logERROR, ("Extsig (signal mode) %d not defined for this detector\n", mode));
|
||||
break;
|
||||
return;
|
||||
}
|
||||
signalMode = mode;
|
||||
setTiming(getTiming());
|
||||
}
|
||||
|
||||
int getExtSignal() {
|
||||
@ -1368,7 +1459,7 @@ void calcChecksum(mac_conf* mac, int sourceip, int destip) {
|
||||
while (sum>>16)
|
||||
sum = (sum & 0xffff) + (sum >> 16);// Fold 32-bit sum to 16 bits
|
||||
long int checksum = (~sum) & 0xffff;
|
||||
FILE_LOG(logINFO, ("\tIP checksum is 0x%lx\n", checksum));
|
||||
FILE_LOG(logINFO, ("\tIP checksum : 0x%lx\n", checksum));
|
||||
mac->ip.ip_chksum = checksum;
|
||||
}
|
||||
|
||||
@ -1383,9 +1474,9 @@ int configureMAC(uint32_t destip, uint64_t destmac, uint64_t sourcemac, uint32_t
|
||||
adcConfigured, ipPacketSize, udpPacketSize));
|
||||
|
||||
uint32_t sourceport = DEFAULT_TX_UDP_PORT;
|
||||
FILE_LOG(logINFO, ("\tSource IP : %d.%d.%d.%d \t\t(0x%08x)\n",
|
||||
FILE_LOG(logINFO, ("\tSource IP : %d.%d.%d.%d (0x%08x)\n",
|
||||
(sourceip>>24)&0xff,(sourceip>>16)&0xff,(sourceip>>8)&0xff,(sourceip)&0xff, sourceip));
|
||||
FILE_LOG(logINFO, ("\tSource MAC : %02x:%02x:%02x:%02x:%02x:%02x \t(0x%010llx)\n",
|
||||
FILE_LOG(logINFO, ("\tSource MAC : %02x:%02x:%02x:%02x:%02x:%02x (0x%010llx)\n",
|
||||
(unsigned int)((sourcemac>>40)&0xFF),
|
||||
(unsigned int)((sourcemac>>32)&0xFF),
|
||||
(unsigned int)((sourcemac>>24)&0xFF),
|
||||
@ -1393,10 +1484,10 @@ int configureMAC(uint32_t destip, uint64_t destmac, uint64_t sourcemac, uint32_t
|
||||
(unsigned int)((sourcemac>>8)&0xFF),
|
||||
(unsigned int)((sourcemac>>0)&0xFF),
|
||||
(long long unsigned int)sourcemac));
|
||||
FILE_LOG(logINFO, ("\tSource Port : %d \t\t\t(0x%08x)\n",sourceport, sourceport));
|
||||
FILE_LOG(logINFO, ("\tDest. IP : %d.%d.%d.%d \t\t(0x%08x)\n",
|
||||
FILE_LOG(logINFO, ("\tSource Port : %d (0x%08x)\n",sourceport, sourceport));
|
||||
FILE_LOG(logINFO, ("\tDest. IP : %d.%d.%d.%d (0x%08x)\n",
|
||||
(destip>>24)&0xff,(destip>>16)&0xff,(destip>>8)&0xff,(destip)&0xff, destip));
|
||||
FILE_LOG(logINFO, ("\tDest. MAC : %02x:%02x:%02x:%02x:%02x:%02x \t(0x%010llx)\n",
|
||||
FILE_LOG(logINFO, ("\tDest. MAC : %02x:%02x:%02x:%02x:%02x:%02x (0x%010llx)\n",
|
||||
(unsigned int)((destmac>>40)&0xFF),
|
||||
(unsigned int)((destmac>>32)&0xFF),
|
||||
(unsigned int)((destmac>>24)&0xFF),
|
||||
@ -1404,7 +1495,7 @@ int configureMAC(uint32_t destip, uint64_t destmac, uint64_t sourcemac, uint32_t
|
||||
(unsigned int)((destmac>>8)&0xFF),
|
||||
(unsigned int)((destmac>>0)&0xFF),
|
||||
(long long unsigned int)destmac));
|
||||
FILE_LOG(logINFO, ("\tDest. Port : %d \t\t\t(0x%08x)\n",udpport, udpport));
|
||||
FILE_LOG(logINFO, ("\tDest. Port : %d (0x%08x)\n",udpport, udpport));
|
||||
|
||||
// set/ unset the digital test bit
|
||||
if (digitalTestBit)
|
||||
@ -1492,8 +1583,6 @@ int configureMAC(uint32_t destip, uint64_t destmac, uint64_t sourcemac, uint32_t
|
||||
tse_conf_regs->tx_almost_full = 0x3;
|
||||
tse_conf_regs->mdio_addr0 = 0x12;
|
||||
tse_conf_regs->mdio_addr1 = 0x0;
|
||||
|
||||
FILE_LOG(logDEBUG1, ("\tConfigure Mac Done"));
|
||||
mac_conf_regs->cdone = 0xFFFFFFFF;
|
||||
|
||||
// write shadow regs /* FIXME: Only INT_RSTN_MSK | WRT_BCK_MSK */
|
||||
@ -1511,6 +1600,7 @@ int configureMAC(uint32_t destip, uint64_t destmac, uint64_t sourcemac, uint32_t
|
||||
FILE_LOG(logDEBUG1, ("\tSw1. MultiPurpose reg: 0x%x\n", bus_r(addr)));
|
||||
|
||||
usleep(1000 * 1000);
|
||||
FILE_LOG(logDEBUG1, ("\tConfigure Mac Done\n"));
|
||||
return OK;
|
||||
}
|
||||
|
||||
@ -1639,9 +1729,9 @@ int startStateMachine(){
|
||||
cleanFifos();
|
||||
|
||||
//start state machine
|
||||
bus_w16(CONTROL_REG, CONTROL_STRT_ACQ_MSK);
|
||||
bus_w16(CONTROL_REG, CONTROL_STRT_ACQ_MSK | CONTROL_STRT_EXPSR_MSK);
|
||||
bus_w16(CONTROL_REG, 0x0);
|
||||
FILE_LOG(logINFO, ("Status Register: %08x\n", runState()));
|
||||
runState(logINFO);
|
||||
return OK;
|
||||
}
|
||||
|
||||
@ -1670,17 +1760,18 @@ int stopStateMachine(){
|
||||
#endif
|
||||
//stop state machine
|
||||
bus_w16(CONTROL_REG, CONTROL_STP_ACQ_MSK);
|
||||
usleep(100);/**FIXME:Needed? not there earlier*/
|
||||
//usleep(100);/**FIXME:Needed? not there earlier*/
|
||||
bus_w16(CONTROL_REG, 0x0);
|
||||
|
||||
// check
|
||||
usleep(500);
|
||||
if ((runState() & STATUS_RN_MSHN_BSY_MSK)) {
|
||||
FILE_LOG(logERROR, ("\tFailed to stop state machine\n"));
|
||||
if ((runState(logDEBUG1) & STATUS_RN_MSHN_BSY_MSK)) {
|
||||
FILE_LOG(logERROR, ("\tFailed to stop state machine.\n"));
|
||||
runState(logINFORED);
|
||||
return FAIL;
|
||||
}
|
||||
|
||||
FILE_LOG(logINFO, ("Status Register: %08x\n", runState()));
|
||||
runState(logINFO);
|
||||
return OK;
|
||||
}
|
||||
|
||||
@ -1697,8 +1788,7 @@ enum runStatus getRunStatus(){
|
||||
FILE_LOG(logDEBUG1, ("Getting status\n"));
|
||||
|
||||
enum runStatus s = IDLE;
|
||||
u_int32_t retval = runState();
|
||||
FILE_LOG(logINFO, ("Status Register: %08x\n",retval));
|
||||
u_int32_t retval = runState(logINFO);
|
||||
|
||||
// finished (external stop or fifo full)
|
||||
if (retval & STATUS_RN_FNSHD_MSK) {
|
||||
@ -1706,10 +1796,11 @@ enum runStatus getRunStatus(){
|
||||
s = STOPPED;
|
||||
|
||||
FILE_LOG(logINFO, ("\t Reading status reg again\n"));
|
||||
retval = runState();
|
||||
retval = runState(logINFO);
|
||||
// fifo full
|
||||
if (runState() & STATUS_RN_FNSHD_MSK) {
|
||||
if (runState(logDEBUG1) & STATUS_RN_FNSHD_MSK) {
|
||||
FILE_LOG(logINFORED, ("Status: Error\n"));
|
||||
runState(logINFORED);
|
||||
s = ERROR;
|
||||
}
|
||||
}
|
||||
@ -1721,7 +1812,7 @@ enum runStatus getRunStatus(){
|
||||
}
|
||||
|
||||
// not running
|
||||
else if (!(retval & STATUS_RN_MSHN_BSY_MSK)) {
|
||||
else if (!(retval & STATUS_RN_BSY_MSK)) {
|
||||
// read last frames
|
||||
if (retval & STATUS_RD_MSHN_BSY_MSK) {
|
||||
FILE_LOG(logINFOBLUE, ("Status: Read Machine Busy\n"));
|
||||
@ -1737,8 +1828,14 @@ enum runStatus getRunStatus(){
|
||||
FILE_LOG(logINFOBLUE, ("Status: IDLE\n"));
|
||||
s = IDLE;
|
||||
} else {
|
||||
FILE_LOG(logINFORED, ("Status: Unknown Status: 0x%x\n", retval));
|
||||
s = ERROR;
|
||||
FILE_LOG(logINFORED, ("Status: Unknown Status: 0x%x. Trying again.\n", retval));
|
||||
int iloop = 0;
|
||||
for (iloop = 0; iloop < 10; ++iloop) {
|
||||
usleep(1000 * 1000);
|
||||
if (runState(logDEBUG1) != retval)
|
||||
return getRunStatus();
|
||||
}
|
||||
s = ERROR;
|
||||
}
|
||||
}
|
||||
|
||||
@ -1786,15 +1883,15 @@ u_int32_t runBusy() {
|
||||
#ifdef VIRTUAL
|
||||
return virtual_status;
|
||||
#endif
|
||||
return runState() & STATUS_RN_BSY_MSK;
|
||||
return runState(logDEBUG1) & STATUS_RN_BSY_MSK;
|
||||
}
|
||||
|
||||
u_int32_t runState() {
|
||||
u_int32_t runState(enum TLogLevel lev) {
|
||||
#ifdef VIRTUAL
|
||||
return virtual_status;
|
||||
#endif
|
||||
u_int32_t s = bus_r(STATUS_REG);
|
||||
FILE_LOG(logDEBUG1, ("Status Register: %08x\n", s));
|
||||
FILE_LOG(lev, ("Status Register: 0x%08x\n", s));
|
||||
return s;
|
||||
}
|
||||
|
||||
|
||||
@ -790,7 +790,32 @@ int64_t getTimeLeft(enum timerIndex ind){
|
||||
}
|
||||
|
||||
|
||||
|
||||
int validateTimer(enum timerIndex ind, int64_t val, int64_t retval) {
|
||||
if (val < 0)
|
||||
return OK;
|
||||
switch(ind) {
|
||||
case ACQUISITION_TIME:
|
||||
// convert to freq
|
||||
val *= (1E-3 * CLK_RUN);
|
||||
val -= ACQ_TIME_MIN_CLOCK;
|
||||
if(val < 0) val = 0;
|
||||
// convert back to timer
|
||||
val = (val + ACQ_TIME_MIN_CLOCK) / (1E-3 * CLK_RUN);
|
||||
if (val != retval)
|
||||
return FAIL;
|
||||
case FRAME_PERIOD:
|
||||
case DELAY_AFTER_TRIGGER:
|
||||
// convert to freq
|
||||
val *= (1E-3 * CLK_SYNC);
|
||||
// convert back to timer
|
||||
val = (val) / (1E-3 * CLK_SYNC);
|
||||
if (val != retval)
|
||||
return FAIL;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
return OK;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
@ -114,6 +114,25 @@ u_int32_t writeRegister(u_int32_t offset, u_int32_t data) {
|
||||
return readRegister(offset);
|
||||
}
|
||||
|
||||
/**
|
||||
* Read from a 16 bit register (literal register value provided by client)
|
||||
* @param offset address offset
|
||||
* @retuns 16 bit data read
|
||||
*/
|
||||
u_int32_t readRegister16(u_int32_t offset) {
|
||||
return (u_int32_t)bus_r16(offset << MEM_MAP_SHIFT);
|
||||
}
|
||||
|
||||
/**
|
||||
* Write into a 16 bit register (literal register value provided by client)
|
||||
* @param offset address offset
|
||||
* @param data 16 bit data
|
||||
*/
|
||||
u_int32_t writeRegister16(u_int32_t offset, u_int32_t data) {
|
||||
bus_w16(offset << MEM_MAP_SHIFT, (u_int16_t)data);
|
||||
return readRegister16(offset);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* Map FPGA
|
||||
|
||||
@ -132,7 +132,7 @@ int acceptConnection(int socketDescriptor) {
|
||||
|
||||
// timeout
|
||||
if (result == 0) {
|
||||
FILE_LOG(logDEBUG1, ("%s socket select() timed out!\n",
|
||||
FILE_LOG(logDEBUG3, ("%s socket select() timed out!\n",
|
||||
(isControlServer ? "control":"stop"), myport));
|
||||
}
|
||||
|
||||
@ -144,14 +144,14 @@ int acceptConnection(int socketDescriptor) {
|
||||
|
||||
// activity in descriptor set
|
||||
else if (result > 0) {
|
||||
FILE_LOG(logDEBUG1, ("%s select returned!\n", (isControlServer ? "control":"stop")));
|
||||
FILE_LOG(logDEBUG3, ("%s select returned!\n", (isControlServer ? "control":"stop")));
|
||||
|
||||
// loop through the file descriptor set
|
||||
for (j = 0; j < maxfd + 1; ++j) {
|
||||
|
||||
// checks if file descriptor part of set
|
||||
if (FD_ISSET(j, &tempset)) {
|
||||
FILE_LOG(logDEBUG1, ("fd %d is set\n",j));
|
||||
FILE_LOG(logDEBUG3, ("fd %d is set\n",j));
|
||||
|
||||
// clear the temporary set
|
||||
FD_CLR(j, &tempset);
|
||||
@ -212,7 +212,7 @@ int acceptConnection(int socketDescriptor) {
|
||||
// accept success
|
||||
else {
|
||||
inet_ntop(AF_INET, &(addressC.sin_addr), dummyClientIP, INET_ADDRSTRLEN);
|
||||
FILE_LOG(logDEBUG1, ("%s socket accepted connection, fd= %d\n",
|
||||
FILE_LOG(logDEBUG3, ("%s socket accepted connection, fd= %d\n",
|
||||
(isControlServer ? "control":"stop"), file_des));
|
||||
// add the file descriptor from accept
|
||||
FD_SET(file_des, &readset);
|
||||
@ -240,7 +240,7 @@ void closeConnection(int file_des) {
|
||||
void exitServer(int socketDescriptor) {
|
||||
if (socketDescriptor >= 0)
|
||||
close(socketDescriptor);
|
||||
FILE_LOG(logDEBUG1, ("Closing %s server\n", (isControlServer ? "control":"stop")));
|
||||
FILE_LOG(logDEBUG3, ("Closing %s server\n", (isControlServer ? "control":"stop")));
|
||||
FD_CLR(socketDescriptor, &readset);
|
||||
isock--;
|
||||
}
|
||||
@ -316,7 +316,7 @@ int receiveDataOnly(int file_des, void* buf,int length) {
|
||||
int nreceiving;
|
||||
int nreceived;
|
||||
if (file_des<0) return -1;
|
||||
FILE_LOG(logDEBUG1, ("want to receive %d Bytes to %s server\n",
|
||||
FILE_LOG(logDEBUG3, ("want to receive %d Bytes to %s server\n",
|
||||
length, (isControlServer ? "control":"stop")));
|
||||
|
||||
while(length > 0) {
|
||||
@ -335,8 +335,9 @@ int receiveDataOnly(int file_des, void* buf,int length) {
|
||||
if (total_received>0)
|
||||
strcpy(thisClientIP,dummyClientIP);
|
||||
|
||||
if (strcmp(lastClientIP,thisClientIP))
|
||||
if (strcmp(lastClientIP,thisClientIP)) {
|
||||
differentClients = 1;
|
||||
}
|
||||
else
|
||||
differentClients = 0;
|
||||
|
||||
@ -379,7 +380,7 @@ int sendModule(int file_des, sls_detector_module *myMod) {
|
||||
|
||||
|
||||
int receiveModule(int file_des, sls_detector_module* myMod) {
|
||||
TLogLevel level = logDEBUG1;
|
||||
enum TLogLevel level = logDEBUG1;
|
||||
FILE_LOG(level, ("Receiving Module\n"));
|
||||
int ts = 0, n = 0;
|
||||
int nDacs = myMod->ndac;
|
||||
@ -454,7 +455,7 @@ int Server_VerifyLock() {
|
||||
int Server_SendResult(int fileDes, intType itype, int update, void* retval, int retvalSize) {
|
||||
|
||||
// update if different clients (ret can be ok or acquisition finished), not fail to not overwrite e message
|
||||
if (update && ret != FAIL && differentClients)
|
||||
if (update && isControlServer && ret != FAIL && differentClients)
|
||||
ret = FORCE_UPDATE;
|
||||
|
||||
// send success of operation
|
||||
|
||||
@ -19,10 +19,10 @@
|
||||
#define FILELOG_MAX_LEVEL logINFO
|
||||
#endif
|
||||
|
||||
typedef enum {
|
||||
enum TLogLevel{
|
||||
logERROR, logWARNING, logINFOBLUE, logINFOGREEN, logINFORED, logINFO,
|
||||
logDEBUG, logDEBUG1, logDEBUG2, logDEBUG3, logDEBUG4, logDEBUG5
|
||||
}TLogLevel;
|
||||
};
|
||||
|
||||
#define ERROR_MSG_LENGTH 1000
|
||||
|
||||
@ -30,7 +30,7 @@ logDEBUG, logDEBUG1, logDEBUG2, logDEBUG3, logDEBUG4, logDEBUG5
|
||||
if (lvl > FILELOG_MAX_LEVEL); \
|
||||
else {char* temp = FILELOG_BuildLog fmt; FILELOG_PrintLog(lvl, temp);free(temp);}
|
||||
|
||||
static inline void FILELOG_PrintLog(TLogLevel level, char* m) {
|
||||
static inline void FILELOG_PrintLog(enum TLogLevel level, char* m) {
|
||||
switch(level) {
|
||||
case logERROR: cprintf(RED BOLD, "ERROR: %s", m); break;
|
||||
case logWARNING: cprintf(YELLOW BOLD, "WARNING: %s", m); break;
|
||||
|
||||
@ -1,6 +1,8 @@
|
||||
#include "sls_detector_defs.h"
|
||||
#include "slsDetectorServer_defs.h" // DAC_INDEX, ADC_INDEX, also include RegisterDefs.h
|
||||
|
||||
#ifdef GOTTHARDD
|
||||
#include "logger.h" // runState(enum TLogLevel)
|
||||
#endif
|
||||
#include <stdlib.h>
|
||||
#include <stdio.h> // FILE
|
||||
|
||||
@ -89,6 +91,7 @@ void configureASICTimer();
|
||||
#elif GOTTHARDD
|
||||
void setPhaseShiftOnce();
|
||||
void setPhaseShift(int numphaseshift);
|
||||
void configureADC();
|
||||
void cleanFifos();
|
||||
void setADCSyncRegister();
|
||||
void setDAQRegister();
|
||||
@ -119,7 +122,9 @@ int selectStoragecellStart(int pos);
|
||||
#endif
|
||||
int64_t setTimer(enum timerIndex ind, int64_t val);
|
||||
int64_t getTimeLeft(enum timerIndex ind);
|
||||
|
||||
#if defined(JUNGFRAUD) || (GOTTHARDD)
|
||||
int validateTimer(enum timerIndex ind, int64_t val, int64_t retval);
|
||||
#endif
|
||||
|
||||
// parameters - module, settings
|
||||
int setModule(sls_detector_module myMod, char* mess);
|
||||
@ -250,7 +255,7 @@ void readFrame(int *ret, char *mess);
|
||||
u_int32_t runBusy();
|
||||
#endif
|
||||
#ifdef GOTTHARDD
|
||||
u_int32_t runState();
|
||||
u_int32_t runState(enum TLogLevel lev);
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
@ -104,8 +104,8 @@ int decode_function(int file_des) {
|
||||
if (ret == FAIL) {
|
||||
FILE_LOG(logDEBUG1, ("Error executing the function = %d (%s)\n",
|
||||
fnum, getFunctionName((enum detFuncs)fnum)));
|
||||
} else FILE_LOG(logDEBUG1, ("Function (%s) executed ok\n",
|
||||
getFunctionName((enum detFuncs)fnum)));
|
||||
} else FILE_LOG(logDEBUG1, ("Function (%s) executed %s\n",
|
||||
getFunctionName((enum detFuncs)fnum), (ret == OK)?"OK":"FORCE_UPDATE"));
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
@ -366,7 +366,7 @@ int get_detector_type(int file_des) {
|
||||
memset(mess, 0, sizeof(mess));
|
||||
enum detectorType retval = myDetectorType;
|
||||
FILE_LOG(logDEBUG1,("Returning detector type %d\n", retval));
|
||||
return Server_SendResult(file_des, INT32, UPDATE, &retval, sizeof(retval));
|
||||
return Server_SendResult(file_des, INT32, NO_UPDATE, &retval, sizeof(retval));
|
||||
}
|
||||
|
||||
|
||||
@ -849,7 +849,7 @@ int read_register(int file_des) {
|
||||
#else
|
||||
retval = readRegister(addr);
|
||||
#endif
|
||||
FILE_LOG(logDEBUG1, ("Read register (0x%x): 0x%x\n", retval));
|
||||
FILE_LOG(logINFO, ("Read register (0x%x): 0x%x\n", addr, retval));
|
||||
|
||||
return Server_SendResult(file_des, INT32, UPDATE, &retval, sizeof(retval));
|
||||
}
|
||||
@ -1308,8 +1308,34 @@ int set_timer(int file_des) {
|
||||
modeNotImplemented("Timer index", (int)ind);
|
||||
break;
|
||||
}
|
||||
|
||||
// validate
|
||||
validate64(tns, retval, "set timer", DEC);
|
||||
#ifdef EIGERD
|
||||
validate64(tns, retval, "set timer", DEC); // copied to server, not read from detector register
|
||||
#else
|
||||
switch(ind) {
|
||||
case FRAME_NUMBER:
|
||||
case CYCLES_NUMBER:
|
||||
case STORAGE_CELL_NUMBER:
|
||||
validate64(tns, retval, "set timer", DEC); // no conversion, so all good
|
||||
break;
|
||||
case ACQUISITION_TIME:
|
||||
case FRAME_PERIOD:
|
||||
case DELAY_AFTER_TRIGGER:
|
||||
case SUBFRAME_ACQUISITION_TIME:
|
||||
case SUBFRAME_DEADTIME:
|
||||
// losing precision due to conversion to clock (also gotthard master delay is different)
|
||||
if (validateTimer(ind, tns, retval) == FAIL) {
|
||||
ret = FAIL;
|
||||
sprintf(mess, "Could not set timer. Set %lld, but read %lld\n",
|
||||
(long long unsigned int)tns, (long long unsigned int)retval);
|
||||
FILE_LOG(logERROR,(mess));
|
||||
}
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
if (ret != FAIL) {
|
||||
FILE_LOG(logDEBUG1, ("Timer index %d: %lld\n", ind, retval));
|
||||
@ -1608,7 +1634,7 @@ int set_speed(int file_des) {
|
||||
|
||||
|
||||
int exit_server(int file_des) {
|
||||
cprintf(BG_RED, "Closing Server\n");
|
||||
FILE_LOG(logINFORED, ("Closing Server\n"));
|
||||
ret = OK;
|
||||
memset(mess, 0, sizeof(mess));
|
||||
Server_SendResult(file_des, INT32, NO_UPDATE, NULL, 0);
|
||||
@ -1791,7 +1817,7 @@ int configure_mac(int file_des) {
|
||||
|
||||
if (receiveData(file_des, args, sizeof(args), OTHER) < 0)
|
||||
return printSocketReadError();
|
||||
FILE_LOG(logDEBUG1, ("\n Configuring UDP Destination\n"));
|
||||
FILE_LOG(logDEBUG1, ("\n Configuring MAC\n"));
|
||||
uint32_t dstIp = 0;
|
||||
sscanf(args[0], "%x", &dstIp);
|
||||
FILE_LOG(logDEBUG1, ("Dst Ip Addr: %d.%d.%d.%d = 0x%x \n",
|
||||
@ -1890,10 +1916,11 @@ int configure_mac(int file_des) {
|
||||
if (ret == FAIL) {
|
||||
sprintf(mess,"Configure Mac failed\n");
|
||||
FILE_LOG(logERROR,(mess));
|
||||
} else {
|
||||
FILE_LOG(logINFO, ("\tConfigure MAC successful\n"));
|
||||
}
|
||||
#if defined(EIGERD) || defined (JUNGFRAUD)
|
||||
else {
|
||||
FILE_LOG(logINFO, ("Configure MAC successful: %d\n", ret));
|
||||
if (ret != FAIL) {
|
||||
ret = setDetectorPosition(pos);
|
||||
if (ret == FAIL) {
|
||||
sprintf(mess, "Could not set detector position\n");
|
||||
@ -2463,7 +2490,7 @@ int program_fpga(int file_des) {
|
||||
|
||||
|
||||
if (ret == FAIL) {
|
||||
cprintf(RED,"Failure: Breaking out of program receiving\n");
|
||||
FILE_LOG(logERROR, ("Failure: Breaking out of program receiving\n"));
|
||||
} else {
|
||||
//print progress
|
||||
FILE_LOG(logINFO, ("Writing to Flash:%d%%\r",
|
||||
@ -2787,7 +2814,7 @@ int check_version(int file_des) {
|
||||
}
|
||||
|
||||
if (ret == OK) {
|
||||
FILE_LOG(logDEBUG1, ("Checking versioning compatibility with value %d\n",arg));
|
||||
FILE_LOG(logDEBUG1, ("Checking versioning compatibility with value 0x%llx\n",arg));
|
||||
|
||||
int64_t client_requiredVersion = arg;
|
||||
int64_t det_apiVersion = getDetectorId(CLIENT_SOFTWARE_API_VERSION);
|
||||
@ -2813,7 +2840,7 @@ int check_version(int file_des) {
|
||||
FILE_LOG(logERROR,(mess));
|
||||
}
|
||||
}
|
||||
return Server_SendResult(file_des, INT32, UPDATE, NULL, 0);
|
||||
return Server_SendResult(file_des, INT32, NO_UPDATE, NULL, 0);
|
||||
}
|
||||
|
||||
|
||||
|
||||
@ -2637,7 +2637,7 @@ uint32_t slsDetector::writeRegister(uint32_t addr, uint32_t val) {
|
||||
uint32_t slsDetector::readRegister(uint32_t addr) {
|
||||
int fnum = F_READ_REGISTER;
|
||||
int ret = FAIL;
|
||||
uint32_t arg = -1;
|
||||
uint32_t arg = addr;
|
||||
uint32_t retval = -1;
|
||||
FILE_LOG(logDEBUG1) << "Reading register 0x" << std::hex << addr << std::dec;
|
||||
|
||||
|
||||
@ -1038,7 +1038,8 @@ void slsReceiverImplementation::stopReceiver() {
|
||||
tot += dataProcessor[i]->GetNumFramesCaught();
|
||||
|
||||
uint64_t missingpackets = numberOfFrames*generalData->packetsPerFrame-listener[i]->GetPacketsCaught();
|
||||
FILE_LOG(((int)missingpackets > 0) ? logINFORED : logINFOGREEN) <<
|
||||
TLogLevel lev = ((int)missingpackets > 0) ? logINFORED : logINFOGREEN;
|
||||
FILE_LOG(lev) <<
|
||||
"Summary of Port " << udpPortNum[i] <<
|
||||
"\n\tMissing Packets\t\t: " << missingpackets <<
|
||||
"\n\tComplete Frames\t\t: " << dataProcessor[i]->GetNumFramesCaught() <<
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user