* ctb, moench and jungfrau: pll reset at start not happening as no defines
This commit is contained in:
Dhanya Thattil
2022-09-29 14:03:26 +02:00
committed by GitHub
parent bac32dcba9
commit d9e34e1657
8 changed files with 22 additions and 20 deletions

View File

@@ -503,7 +503,13 @@ void setupDetector() {
#endif
setupUDPCommParameters();
// altera pll
ALTERA_PLL_SetDefines(PLL_CNTRL_REG, PLL_PARAM_REG,
PLL_CNTRL_RCNFG_PRMTR_RST_MSK, PLL_CNTRL_WR_PRMTR_MSK,
PLL_CNTRL_PLL_RST_MSK, PLL_CNTRL_ADDR_MSK,
PLL_CNTRL_ADDR_OFST);
ALTERA_PLL_ResetPLLAndReconfiguration();
resetCore();
resetPeripheral();
cleanFifos();
@@ -536,11 +542,6 @@ void setupDetector() {
LTC2620_Configure();
resetToDefaultDacs(0);
// altera pll
ALTERA_PLL_SetDefines(PLL_CNTRL_REG, PLL_PARAM_REG,
PLL_CNTRL_RCNFG_PRMTR_RST_MSK, PLL_CNTRL_WR_PRMTR_MSK,
PLL_CNTRL_PLL_RST_MSK, PLL_CNTRL_ADDR_MSK,
PLL_CNTRL_ADDR_OFST);
// not using setADCInvertRegister command (as it xors the default)
bus_w(ADC_PORT_INVERT_REG, ADC_PORT_INVERT_VAL);