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moench server compiles

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This commit is contained in:
maliakal_d
2019-01-15 20:06:11 +01:00
parent 4b9e41e23b
commit d240ab7a29
13 changed files with 190 additions and 171 deletions
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2
slsDetectorServers/ctbDetectorServer/RegisterDefs.h
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@ -316,7 +316,7 @@
//#define CONTROL_STP_RDT_OFST (5)
//#define CONTROL_STP_RDT_MSK (0x00000001 << CONTROL_STP_RDT_OFST)
#define CONTROL_STRT_EXPSR_OFST (6)
#define CONTROL_STRT_EXPSR_MSK (0x00000001 << CONTROL_STRT_RDT_OFST)
#define CONTROL_STRT_EXPSR_MSK (0x00000001 << CONTROL_STRT_EXPSR_OFST)
//#define CONTROL_STP_EXPSR_OFST (7)
//#define CONTROL_STP_EXPSR_MSK (0x00000001 << CONTROL_STP_RDT_OFST)
//#define CONTROL_STRT_TRN_OFST (8)

97
slsDetectorServers/ctbDetectorServer/slsDetectorFunctionList.c
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@ -516,7 +516,7 @@ void setupDetector() {
{
int idac = 0;
for (idac = 0; idac < NDAC; ++idac) {
setDac(idac, LTC2620_PWR_DOWN_VAL, 0);
setDAC(idac, LTC2620_PWR_DOWN_VAL, 0);
}
}
@ -551,7 +551,7 @@ int allocateRAM() {
updateDataBytes();
// update only if change in databytes
if (dataBytes == dataBytes) {
if (dataBytes == oldDataBytes) {
FILE_LOG(logDEBUG1, ("RAM of size %d already allocated. Nothing to be done.\n", dataBytes));
return OK;
}
@ -580,8 +580,9 @@ int allocateRAM() {
void updateDataBytes() {
int oldDataBytes = dataBytes;
dataBytes = NCHIP * getChannels() * NUM_BYTES_PER_PIXEL * nSamples;
if (dataBytes != dataBytes)
if (dataBytes != oldDataBytes) {
FILE_LOG(logINFO, ("Updating Databytes: %d\n", dataBytes));
}
}
int getChannels() {
@ -597,8 +598,8 @@ int getChannels() {
}
}
if (digitalEnable)
nchan += NCHAN_DIGITAL;
return nchan;
nchans += NCHAN_DIGITAL;
return nchans;
}
@ -658,9 +659,9 @@ ROI* setROI(int n, ROI arg[], int *retvalsize, int *ret) {
FILE_LOG(logINFO, ("\t%d: (%d, %d)\n", arg[iroi].xmin, arg[iroi].xmax));
// swap if xmin > xmax
if (arg[iroi].xmin > arg[iroi].xmax) {
int temp = xmin;
int temp = arg[iroi].xmin;
arg[iroi].xmin = arg[iroi].xmax;
arg[iroi].xmax = arg[iroi].temp;
arg[iroi].xmax = temp;
FILE_LOG(logINFORED, ("\tCorrected %d: (%d, %d)\n", arg[iroi].xmin, arg[iroi].xmax));
}
int ich = 0;
@ -829,15 +830,15 @@ enum readOutFlags setReadOutFlags(enum readOutFlags val) {
switch(val) {
case NORMAL_READOUT:
FILE_LOG(logINFO, ("Setting Normal Readout\n"));
bus_w(bus_r(addr) & (~CONFIG_DSBL_ANLG_OTPT_MSK) & (~CONFIG_ENBLE_DGTL_OTPT_MSK));
bus_w(addr, bus_r(addr) & (~CONFIG_DSBL_ANLG_OTPT_MSK) & (~CONFIG_ENBLE_DGTL_OTPT_MSK));
break;
case DIGITAL_ONLY:
FILE_LOG(logINFO, ("Setting Digital Only Readout\n"));
bus_w(bus_r(addr) | CONFIG_DSBL_ANLG_OTPT_MSK | CONFIG_ENBLE_DGTL_OTPT_MSK);
bus_w(addr, bus_r(addr) | CONFIG_DSBL_ANLG_OTPT_MSK | CONFIG_ENBLE_DGTL_OTPT_MSK);
break;
case ANALOG_AND_DIGITAL:
FILE_LOG(logINFO, ("Setting Analog & Digital Readout\n"));
bus_w(bus_r(addr) & (~CONFIG_DSBL_ANLG_OTPT_MSK) | CONFIG_ENBLE_DGTL_OTPT_MSK);
bus_w(addr, (bus_r(addr) & (~CONFIG_DSBL_ANLG_OTPT_MSK)) | CONFIG_ENBLE_DGTL_OTPT_MSK);
break;
default:
FILE_LOG(logERROR, ("Cannot set unknown readout flag. 0x%x\n", val));
@ -963,11 +964,6 @@ int64_t getTimeLeft(enum timerIndex ind){
FILE_LOG(logINFO, ("Getting number of frames left: %lld\n",(long long int)retval));
break;
case FRAME_PERIOD:
retval = get64BitReg(GET_PERIOD_LSB_REG, PERIOD_LEFT_MSB_REG) / (1E-3 * clkDivider[ADC_CLK]);
FILE_LOG(logINFO, ("Getting period left: %lldns\n", (long long int)retval));
break;
case DELAY_AFTER_TRIGGER:
retval = get64BitReg(DELAY_LEFT_LSB_REG, DELAY_LEFT_MSB_REG) / (1E-3 * clkDivider[ADC_CLK]);
FILE_LOG(logINFO, ("Getting delay left: %lldns\n", (long long int)retval));
@ -1010,9 +1006,9 @@ int validateTimer(enum timerIndex ind, int64_t val, int64_t retval) {
case FRAME_PERIOD:
case DELAY_AFTER_TRIGGER:
// convert to freq
val *= (1E-3 * CLK_SYNC);
val *= (1E-3 * ADC_CLK);
// convert back to timer
val = (val) / (1E-3 * CLK_SYNC);
val = (val) / (1E-3 * ADC_CLK);
if (val != retval)
return FAIL;
default:
@ -1022,6 +1018,11 @@ int validateTimer(enum timerIndex ind, int64_t val, int64_t retval) {
}
/* parameters - settings */
enum detectorSettings getSettings() {
return UNDEFINED;
}
/* parameters - dac, adc, hv */
@ -1060,8 +1061,14 @@ int getMaxDacSteps() {
return LTC2620_MAX_STEPS;
}
int dacToVoltage(int dac) {
int val;
LTC2620_DacToVoltage(dac, &val);
return val;
}
int checkVLimitCompliant(int mV) {
if (vLimit > 0 && mv > vLimit)
if (vLimit > 0 && mV > vLimit)
return FAIL;
return OK;
}
@ -1278,7 +1285,7 @@ void setPower(enum DACINDEX ind, int val) {
bus_w(addr, bus_r(addr) & ~(mask));
// power down dac
setDac(ind, LTC2620_PWR_DOWN_VAL, 0);
setDAC(ind, LTC2620_PWR_DOWN_VAL, 0);
// set vchip
setVchip(vchip);
@ -1510,7 +1517,7 @@ int configureMAC(uint32_t destip, uint64_t destmac, uint64_t sourcemac, uint32_t
FILE_LOG(logDEBUG1, ("Read from TX_IP_CHECKSUM_REG: 0x%08x\n", bus_r(TX_IP_CHECKSUM_REG)));
cleanFifos();//FIXME: resetPerpheral() for ctb?
resetPerpheral();
resetPeripheral();
usleep(WAIT_TIME_CONFIGURE_MAC); /* todo maybe without */
sendUDP(1);
@ -1555,8 +1562,8 @@ int sendUDP(int enable) {
}
// ind can only be ADC_CLK or DBIT_CLK
void configurePhase(CLKINDEX ind, int val) {
if (st > 65535 || st < -65535) {
void configurePhase(enum CLKINDEX ind, int val) {
if (val > 65535 || val < -65535) {
FILE_LOG(logERROR, ("\tPhase provided outside limits\n"));
return;
}
@ -1585,11 +1592,11 @@ void configurePhase(CLKINDEX ind, int val) {
clkPhase[ind] = val;
}
int getPhase(CLKINDEX ind) {
int getPhase(enum CLKINDEX ind) {
return clkPhase[ind];
}
void configureFrequency(CLKINDEX ind, int val) {
void configureFrequency(enum CLKINDEX ind, int val) {
if (val < 0)
return;
@ -1598,21 +1605,19 @@ void configureFrequency(CLKINDEX ind, int val) {
// check adc clk too high
if (ind == ADC_CLK && val > MAXIMUM_ADC_CLK) {
FILE_LOG(logERROR, ("Frequency %d MHz too high for ADC\n", val));
return getPhase(ind);
return;
}
// Calculate and set output frequency
ALTERA_PLL_SetOuputFrequency (ind, PLL_VCO_FREQ_MHZ);
clkDivider[ind] = PLL_VCO_FREQ_MHZ / (low_count + high_count);
clkDivider[ind] = ALTERA_PLL_SetOuputFrequency (ind, PLL_VCO_FREQ_MHZ, val);
FILE_LOG(logINFO, ("\tC%d: Frequency set to %d MHz\n", ind, clkDivider[ind]));
}
int getFrequency(CLKINDEX ind) {
int getFrequency(enum CLKINDEX ind) {
return clkDivider[ind];
}
void configureSyncFrequency(CLKINDEX ind) {
void configureSyncFrequency(enum CLKINDEX ind) {
int clka = 0, clkb = 0;
switch(ind) {
case ADC_CLOCK:
@ -1666,13 +1671,13 @@ void setAdcOffsetRegister(int adc, int val) {
uint32_t addr = ADC_OFFSET_REG;
// reset value
bus_w(bus_r(addr) & ~ mask);
bus_w(addr, bus_r(addr) & ~ mask);
// set value
bus_w(bus_r(addr) | ((val << offset) & mask));
bus_w(addr, bus_r(addr) | ((val << offset) & mask));
FILE_LOG(logDEBUG1, ("\t %s Offset: 0x%8x\n", (adc ? "ADC" : "Dbit"), bus_r(addr)));
}
void getAdcOffsetRegister(int adc) {
int getAdcOffsetRegister(int adc) {
if (adc)
return ((bus_r(ADC_OFFSET_REG) & ADC_OFFSET_ADC_PPLN_MSK) >> ADC_OFFSET_ADC_PPLN_OFST);
return ((bus_r(ADC_OFFSET_REG) & ADC_OFFSET_DBT_PPLN_MSK) >> ADC_OFFSET_DBT_PPLN_OFST);
@ -1707,20 +1712,20 @@ uint64_t readPatternWord(int addr) {
}
FILE_LOG(logDEBUG1, ("Reading Pattern - Word (addr:%d)\n", addr));
uint32_t addr = PATTERN_CNTRL_REG;
uint32_t reg = PATTERN_CNTRL_REG;
// overwrite with only addr
bus_w(addr, ((addr << PATTERN_CNTRL_ADDR_OFST) & PATTERN_CNTRL_ADDR_MSK));
bus_w(reg, ((addr << PATTERN_CNTRL_ADDR_OFST) & PATTERN_CNTRL_ADDR_MSK));
// set read strobe
bus_w(addr, bus_r(addr) | PATTERN_CNTRL_RD_MSK);
bus_w(reg, bus_r(reg) | PATTERN_CNTRL_RD_MSK);
// read value
uint64_t retval = get64BitReg(PATTERN_OUT_LSB_REG, PATTERN_OUT_MSB_REG);
FILE_LOG(logDEBUG1, ("\tWord(addr:%d): 0x%llx\n", addr, (long long int) retval));
// unset read strobe
bus_w(addr, bus_r(addr) & (~PATTERN_CNTRL_RD_MSK));
bus_w(reg, bus_r(reg) & (~PATTERN_CNTRL_RD_MSK));
return retval;
}
@ -1738,19 +1743,19 @@ uint64_t writePatternWord(int addr, uint64_t word) {
}
FILE_LOG(logINFO, ("Setting Pattern - Word (addr:%d, word:0x%llx)\n", addr, (long long int) word));
uint32_t addr = PATTERN_CNTRL_REG;
uint32_t reg = PATTERN_CNTRL_REG;
// write word
set64BitReg(word, PATTERN_IN_LSB_REG, PATTERN_IN_MSB_REG);
// overwrite with only addr
bus_w(addr, ((addr << PATTERN_CNTRL_ADDR_OFST) & PATTERN_CNTRL_ADDR_MSK));
bus_w(reg, ((addr << PATTERN_CNTRL_ADDR_OFST) & PATTERN_CNTRL_ADDR_MSK));
// set write strobe
bus_w(addr, bus_r(addr) | PATTERN_CNTRL_WR_MSK);
bus_w(reg, bus_r(reg) | PATTERN_CNTRL_WR_MSK);
// unset write strobe
bus_w(addr, bus_r(addr) & (~PATTERN_CNTRL_WR_MSK));
bus_w(reg, bus_r(reg) & (~PATTERN_CNTRL_WR_MSK));
return readPatternWord(addr);
}
@ -1947,7 +1952,7 @@ int startStateMachine(){
unsetFifoReadStrobes(); // FIXME: unnecessary to write bus_w(dumm, 0) as it is 0 in the beginnig and the strobes are always unset if set
// point the data pointer to the starting position of data
now_ptr = (char*)ram_values;
now_ptr = (char*)ramValues;
//start state machine
bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_STRT_ACQSTN_MSK | CONTROL_STRT_EXPSR_MSK);
@ -2056,7 +2061,7 @@ enum runStatus getRunStatus(){
void readframe(int *ret, char *mess){
void readFrame(int *ret, char *mess) {
#ifdef VIRTUAL
while(virtual_status) {
//FILE_LOG(logERROR, ("Waiting for finished flag\n");
@ -2082,7 +2087,7 @@ void readframe(int *ret, char *mess){
}
void unsetFifoReadStrobes() {
bus_w(DUMMY_REG, bus_r(addr) & (~DUMMY_ANLG_FIFO_RD_STRBE_MSK) & (~DUMMY_DGTL_FIFO_RD_STRBE_MSK));
bus_w(DUMMY_REG, bus_r(DUMMY_REG) & (~DUMMY_ANLG_FIFO_RD_STRBE_MSK) & (~DUMMY_DGTL_FIFO_RD_STRBE_MSK));
}
void readSample() {
@ -2149,7 +2154,7 @@ int checkDataPresent() {
// still no data
if (!dataPresent) {
FILE_LOG(logERROR, ("Acquisition Finished (State: 0x%08x), "
"but no frame found (Look_at_me: 0x%08x).\n", retval));
"but no frame found (Look_at_me: 0x%08x).\n", dataPresent));
return FAIL;
}
// got data, exit
@ -2200,7 +2205,7 @@ uint32_t runBusy() {
/* common */
int calculateDataBytes(){
return DATA_BYTES;
return dataBytes;
}
int getTotalNumberOfChannels(){return ((int)getNumberOfChannelsPerChip() * (int)getNumberOfChips());}

8
slsDetectorServers/jungfrauDetectorServer/gitInfo.txt
View File

@ -1,9 +1,9 @@
Path: slsDetectorPackage/slsDetectorServers/jungfrauDetectorServer
URL: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git
Repository Root: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git
Repsitory UUID: de2ebad2ed07a85f70b40490b4e07d46b3ac1ff6
Revision: 22
Repsitory UUID: 4b9e41e23b0671478ce0c9beae7a8342e9b2d204
Revision: 23
Branch: refactor
Last Changed Author: Dhanya_Thattil
Last Changed Rev: 4228
Last Changed Date: 2019-01-11 11:59:57.000000002 +0100 ./RegisterDefs.h
Last Changed Rev: 4252
Last Changed Date: 2019-01-15 10:22:16.000000002 +0100 ./RegisterDefs.h

6
slsDetectorServers/jungfrauDetectorServer/gitInfoJungfrau.h
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@ -1,6 +1,6 @@
#define GITURL "git@github.com:slsdetectorgroup/slsDetectorPackage.git"
#define GITREPUUID "de2ebad2ed07a85f70b40490b4e07d46b3ac1ff6"
#define GITREPUUID "4b9e41e23b0671478ce0c9beae7a8342e9b2d204"
#define GITAUTH "Dhanya_Thattil"
#define GITREV 0x4228
#define GITDATE 0x20190111
#define GITREV 0x4252
#define GITDATE 0x20190115
#define GITBRANCH "refactor"

1
slsDetectorServers/jungfrauDetectorServer/slsDetectorFunctionList.c
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@ -1231,7 +1231,6 @@ void configurePll() {
#ifdef VIRTUAL
return;
#endif
u_int32_t val;
int32_t phase=0, inv=0;
// ensuring PLL is never configured with same phase
if (clkPhase[1] == 0) {

2
slsDetectorServers/moenchDetectorServer/RegisterDefs.h
View File

@ -317,7 +317,7 @@
//#define CONTROL_STP_RDT_OFST (5)
//#define CONTROL_STP_RDT_MSK (0x00000001 << CONTROL_STP_RDT_OFST)
#define CONTROL_STRT_EXPSR_OFST (6)
#define CONTROL_STRT_EXPSR_MSK (0x00000001 << CONTROL_STRT_RDT_OFST)
#define CONTROL_STRT_EXPSR_MSK (0x00000001 << CONTROL_STRT_EXPSR_OFST)
//#define CONTROL_STP_EXPSR_OFST (7)
//#define CONTROL_STP_EXPSR_MSK (0x00000001 << CONTROL_STP_RDT_OFST)
//#define CONTROL_STRT_TRN_OFST (8)

9
slsDetectorServers/moenchDetectorServer/gitInfo.txt Normal file
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@ -0,0 +1,9 @@
Path: slsDetectorPackage/slsDetectorServers/moenchDetectorServer
URL: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git
Repository Root: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git
Repsitory UUID: 4b9e41e23b0671478ce0c9beae7a8342e9b2d204
Revision: 7
Branch: refactor
Last Changed Author: Dhanya_Thattil
Last Changed Rev: 4252
Last Changed Date: 2019-01-15 10:22:16.000000002 +0100 ./RegisterDefs.h

6
slsDetectorServers/moenchDetectorServer/gitInfoMoench.h
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@ -1,6 +1,6 @@
#define GITURL "git@github.com:slsdetectorgroup/slsDetectorPackage.git"
#define GITREPUUID "8bc9fa54fc295aa2590f5aa53ffdd7bab4b6096d"
#define GITREPUUID "4b9e41e23b0671478ce0c9beae7a8342e9b2d204"
#define GITAUTH "Dhanya_Thattil"
#define GITREV 0x4248
#define GITDATE 0x20190114
#define GITREV 0x4252
#define GITDATE 0x20190115
#define GITBRANCH "refactor"

124
slsDetectorServers/moenchDetectorServer/slsDetectorFunctionList.c
View File

@ -497,7 +497,7 @@ void setupDetector() {
{
int idac = 0;
for (idac = 0; idac < NDAC; ++idac) {
setDac(idac, LTC2620_PWR_DOWN_VAL, 0);
setDAC(idac, LTC2620_PWR_DOWN_VAL, 0);
}
}
@ -532,7 +532,7 @@ int allocateRAM() {
updateDataBytes();
// update only if change in databytes
if (dataBytes == dataBytes) {
if (dataBytes == oldDataBytes) {
FILE_LOG(logDEBUG1, ("RAM of size %d already allocated. Nothing to be done.\n", dataBytes));
return OK;
}
@ -561,8 +561,9 @@ int allocateRAM() {
void updateDataBytes() {
int oldDataBytes = dataBytes;
dataBytes = NCHIP * getChannels() * NUM_BYTES_PER_PIXEL * nSamples;
if (dataBytes != dataBytes)
if (oldDataBytes != dataBytes) {
FILE_LOG(logINFO, ("Updating Databytes: %d\n", dataBytes));
}
}
int getChannels() {
@ -578,8 +579,8 @@ int getChannels() {
}
}
if (digitalEnable)
nchan += NCHAN_DIGITAL;
return nchan;
nchans += NCHAN_DIGITAL;
return nchans;
}
@ -639,9 +640,9 @@ ROI* setROI(int n, ROI arg[], int *retvalsize, int *ret) {
FILE_LOG(logINFO, ("\t%d: (%d, %d)\n", arg[iroi].xmin, arg[iroi].xmax));
// swap if xmin > xmax
if (arg[iroi].xmin > arg[iroi].xmax) {
int temp = xmin;
int temp = arg[iroi].xmin;
arg[iroi].xmin = arg[iroi].xmax;
arg[iroi].xmax = arg[iroi].temp;
arg[iroi].xmax = temp;
FILE_LOG(logINFORED, ("\tCorrected %d: (%d, %d)\n", arg[iroi].xmin, arg[iroi].xmax));
}
int ich = 0;
@ -810,15 +811,15 @@ enum readOutFlags setReadOutFlags(enum readOutFlags val) {
switch(val) {
case NORMAL_READOUT:
FILE_LOG(logINFO, ("Setting Normal Readout\n"));
bus_w(bus_r(addr) & (~CONFIG_DSBL_ANLG_OTPT_MSK) & (~CONFIG_ENBLE_DGTL_OTPT_MSK));
bus_w(addr, bus_r(addr) & (~CONFIG_DSBL_ANLG_OTPT_MSK) & (~CONFIG_ENBLE_DGTL_OTPT_MSK));
break;
case DIGITAL_ONLY:
FILE_LOG(logINFO, ("Setting Digital Only Readout\n"));
bus_w(bus_r(addr) | CONFIG_DSBL_ANLG_OTPT_MSK | CONFIG_ENBLE_DGTL_OTPT_MSK);
bus_w(addr, bus_r(addr) | CONFIG_DSBL_ANLG_OTPT_MSK | CONFIG_ENBLE_DGTL_OTPT_MSK);
break;
case ANALOG_AND_DIGITAL:
FILE_LOG(logINFO, ("Setting Analog & Digital Readout\n"));
bus_w(bus_r(addr) & (~CONFIG_DSBL_ANLG_OTPT_MSK) | CONFIG_ENBLE_DGTL_OTPT_MSK);
bus_w(addr, (bus_r(addr) & (~CONFIG_DSBL_ANLG_OTPT_MSK)) | CONFIG_ENBLE_DGTL_OTPT_MSK);
break;
default:
FILE_LOG(logERROR, ("Cannot set unknown readout flag. 0x%x\n", val));
@ -944,11 +945,6 @@ int64_t getTimeLeft(enum timerIndex ind){
FILE_LOG(logINFO, ("Getting number of frames left: %lld\n",(long long int)retval));
break;
case FRAME_PERIOD:
retval = get64BitReg(GET_PERIOD_LSB_REG, PERIOD_LEFT_MSB_REG) / (1E-3 * clkDivider[ADC_CLK]);
FILE_LOG(logINFO, ("Getting period left: %lldns\n", (long long int)retval));
break;
case DELAY_AFTER_TRIGGER:
retval = get64BitReg(DELAY_LEFT_LSB_REG, DELAY_LEFT_MSB_REG) / (1E-3 * clkDivider[ADC_CLK]);
FILE_LOG(logINFO, ("Getting delay left: %lldns\n", (long long int)retval));
@ -991,9 +987,9 @@ int validateTimer(enum timerIndex ind, int64_t val, int64_t retval) {
case FRAME_PERIOD:
case DELAY_AFTER_TRIGGER:
// convert to freq
val *= (1E-3 * CLK_SYNC);
val *= (1E-3 * ADC_CLK);
// convert back to timer
val = (val) / (1E-3 * CLK_SYNC);
val = (val) / (1E-3 * ADC_CLK);
if (val != retval)
return FAIL;
default:
@ -1003,6 +999,11 @@ int validateTimer(enum timerIndex ind, int64_t val, int64_t retval) {
}
/* parameters - settings */
enum detectorSettings getSettings() {
return UNDEFINED;
}
/* parameters - dac, adc, hv */
void setDAC(enum DACINDEX ind, int val, int mV) {
@ -1040,8 +1041,14 @@ int getMaxDacSteps() {
return LTC2620_MAX_STEPS;
}
int dacToVoltage(int dac) {
int val;
LTC2620_DacToVoltage(dac, &val);
return val;
}
int checkVLimitCompliant(int mV) {
if (vLimit > 0 && mv > vLimit)
if (vLimit > 0 && mV > vLimit)
return FAIL;
return OK;
}
@ -1068,19 +1075,6 @@ void setVLimit(int l) {
}
int getADC(enum ADCINDEX ind){
#ifdef VIRTUAL
return 0;
#endif
int idac = (int)ind;
//FIXME: temperature??
default:
FILE_LOG(logERROR, ("Adc Index %d not defined \n", (int)ind));
return -1;
}
}
int setHighVoltage(int val){
#ifdef VIRTUAL
if (val >= 0)
@ -1235,7 +1229,7 @@ int configureMAC(uint32_t destip, uint64_t destmac, uint64_t sourcemac, uint32_t
FILE_LOG(logDEBUG1, ("Read from TX_IP_CHECKSUM_REG: 0x%08x\n", bus_r(TX_IP_CHECKSUM_REG)));
cleanFifos();//FIXME: resetPerpheral() for ctb?
resetPerpheral();
resetPeripheral();
usleep(WAIT_TIME_CONFIGURE_MAC); /* todo maybe without */
sendUDP(1);
@ -1281,8 +1275,8 @@ int sendUDP(int enable) {
// ind can only be ADC_CLK or DBIT_CLK
void configurePhase(CLKINDEX ind, int val) {
if (st > 65535 || st < -65535) {
void configurePhase(enum CLKINDEX ind, int val) {
if (val > 65535 || val < -65535) {
FILE_LOG(logERROR, ("\tPhase provided outside limits\n"));
return;
}
@ -1311,11 +1305,11 @@ void configurePhase(CLKINDEX ind, int val) {
clkPhase[ind] = val;
}
int getPhase(CLKINDEX ind) {
int getPhase(enum CLKINDEX ind) {
return clkPhase[ind];
}
void configureFrequency(CLKINDEX ind, int val) {
void configureFrequency(enum CLKINDEX ind, int val) {
if (val < 0)
return;
@ -1324,21 +1318,19 @@ void configureFrequency(CLKINDEX ind, int val) {
// check adc clk too high
if (ind == ADC_CLK && val > MAXIMUM_ADC_CLK) {
FILE_LOG(logERROR, ("Frequency %d MHz too high for ADC\n", val));
return getPhase(ind);
return;
}
// Calculate and set output frequency
ALTERA_PLL_SetOuputFrequency (ind, PLL_VCO_FREQ_MHZ, val);
clkDivider[ind] = PLL_VCO_FREQ_MHZ / (low_count + high_count);
clkDivider[ind] = ALTERA_PLL_SetOuputFrequency (ind, PLL_VCO_FREQ_MHZ, val);
FILE_LOG(logINFO, ("\tC%d: Frequency set to %d MHz\n", ind, clkDivider[ind]));
}
int getFrequency(CLKINDEX ind) {
int getFrequency(enum CLKINDEX ind) {
return clkDivider[ind];
}
void configureSyncFrequency(CLKINDEX ind) {
void configureSyncFrequency(enum CLKINDEX ind) {
int clka = 0, clkb = 0;
switch(ind) {
case ADC_CLOCK:
@ -1392,13 +1384,13 @@ void setAdcOffsetRegister(int adc, int val) {
uint32_t addr = ADC_OFFSET_REG;
// reset value
bus_w(bus_r(addr) & ~ mask);
bus_w(addr, bus_r(addr) & ~ mask);
// set value
bus_w(bus_r(addr) | ((val << offset) & mask));
bus_w(addr, bus_r(addr) | ((val << offset) & mask));
FILE_LOG(logDEBUG1, ("\t %s Offset: 0x%8x\n", (adc ? "ADC" : "Dbit"), bus_r(addr)));
}
void getAdcOffsetRegister(int adc) {
int getAdcOffsetRegister(int adc) {
if (adc)
return ((bus_r(ADC_OFFSET_REG) & ADC_OFFSET_ADC_PPLN_MSK) >> ADC_OFFSET_ADC_PPLN_OFST);
return ((bus_r(ADC_OFFSET_REG) & ADC_OFFSET_DBT_PPLN_MSK) >> ADC_OFFSET_DBT_PPLN_OFST);
@ -1433,20 +1425,20 @@ uint64_t readPatternWord(int addr) {
}
FILE_LOG(logDEBUG1, ("Reading Pattern - Word (addr:%d)\n", addr));
uint32_t addr = PATTERN_CNTRL_REG;
uint32_t reg = PATTERN_CNTRL_REG;
// overwrite with only addr
bus_w(addr, ((addr << PATTERN_CNTRL_ADDR_OFST) & PATTERN_CNTRL_ADDR_MSK));
bus_w(reg, ((addr << PATTERN_CNTRL_ADDR_OFST) & PATTERN_CNTRL_ADDR_MSK));
// set read strobe
bus_w(addr, bus_r(addr) | PATTERN_CNTRL_RD_MSK);
bus_w(reg, bus_r(reg) | PATTERN_CNTRL_RD_MSK);
// read value
uint64_t retval = get64BitReg(PATTERN_OUT_LSB_REG, PATTERN_OUT_MSB_REG);
FILE_LOG(logDEBUG1, ("\tWord(addr:%d): 0x%llx\n", addr, (long long int) retval));
// unset read strobe
bus_w(addr, bus_r(addr) & (~PATTERN_CNTRL_RD_MSK));
bus_w(reg, bus_r(reg) & (~PATTERN_CNTRL_RD_MSK));
return retval;
}
@ -1464,19 +1456,19 @@ uint64_t writePatternWord(int addr, uint64_t word) {
}
FILE_LOG(logINFO, ("Setting Pattern - Word (addr:%d, word:0x%llx)\n", addr, (long long int) word));
uint32_t addr = PATTERN_CNTRL_REG;
uint32_t reg = PATTERN_CNTRL_REG;
// write word
set64BitReg(word, PATTERN_IN_LSB_REG, PATTERN_IN_MSB_REG);
// overwrite with only addr
bus_w(addr, ((addr << PATTERN_CNTRL_ADDR_OFST) & PATTERN_CNTRL_ADDR_MSK));
bus_w(reg, ((addr << PATTERN_CNTRL_ADDR_OFST) & PATTERN_CNTRL_ADDR_MSK));
// set write strobe
bus_w(addr, bus_r(addr) | PATTERN_CNTRL_WR_MSK);
bus_w(reg, bus_r(reg) | PATTERN_CNTRL_WR_MSK);
// unset write strobe
bus_w(addr, bus_r(addr) & (~PATTERN_CNTRL_WR_MSK));
bus_w(reg, bus_r(reg) & (~PATTERN_CNTRL_WR_MSK));
return readPatternWord(addr);
}
@ -1566,15 +1558,19 @@ uint64_t setPatternWaitTime(int level, uint64_t t) {
void setPatternLoop(int level, int *startAddr, int *stopAddr, int *nLoop) {
// level 0-2, addr upto patternlength + 1 (checked at tcp)
if ((level != -1) && (*startAddr > (MAX_PATTERN_LENGTH + 1) || *stopAddr > (MAX_PATTERN_LENGTH + 1))) {
FILE_LOG(logERROR, ("Cannot set Pattern (Pattern Loop, level:%d, addr:%d). Addr must be less than %d\n",
level, addr, MAX_PATTERN_LENGTH + 1));
if ((level != -1) &&
(*startAddr >= 0 || *stopAddr > (MAX_PATTERN_LENGTH + 1))) {
FILE_LOG(logERROR, ("Cannot set Pattern (Pattern Loop, level:%d, startaddr:%d, stopaddr:%d). "
"Addr must be less than %d\n",
level, *startAddr, *stopAddr, MAX_PATTERN_LENGTH + 1));
}
//level -1, addr upto patternlength (checked at tcp)
else if ((level == -1) && (*startAddr > MAX_PATTERN_LENGTH || *stopAddr > MAX_PATTERN_LENGTH)) {
FILE_LOG(logERROR, ("Cannot set Pattern (Pattern Loop, complete pattern, addr:%d). Addr must be less than %d\n",
addr, MAX_PATTERN_LENGTH));
else if ((level == -1) &&
(*startAddr >= 0 || *stopAddr > MAX_PATTERN_LENGTH)) {
FILE_LOG(logERROR, ("Cannot set Pattern (Pattern Loop, complete pattern, stopaddr:%d). "
"Addr must be less than %d\n",
*startAddr, *stopAddr, MAX_PATTERN_LENGTH));
}
uint32_t addr = 0;
@ -1673,7 +1669,7 @@ int startStateMachine(){
unsetFifoReadStrobes(); // FIXME: unnecessary to write bus_w(dumm, 0) as it is 0 in the beginnig and the strobes are always unset if set
// point the data pointer to the starting position of data
now_ptr = (char*)ram_values;
now_ptr = (char*)ramValues;
//start state machine
bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_STRT_ACQSTN_MSK | CONTROL_STRT_EXPSR_MSK);
@ -1782,7 +1778,7 @@ enum runStatus getRunStatus(){
void readframe(int *ret, char *mess){
void readFrame(int *ret, char *mess) {
#ifdef VIRTUAL
while(virtual_status) {
//FILE_LOG(logERROR, ("Waiting for finished flag\n");
@ -1808,7 +1804,7 @@ void readframe(int *ret, char *mess){
}
void unsetFifoReadStrobes() {
bus_w(DUMMY_REG, bus_r(addr) & (~DUMMY_ANLG_FIFO_RD_STRBE_MSK) & (~DUMMY_DGTL_FIFO_RD_STRBE_MSK));
bus_w(DUMMY_REG, bus_r(DUMMY_REG) & (~DUMMY_ANLG_FIFO_RD_STRBE_MSK) & (~DUMMY_DGTL_FIFO_RD_STRBE_MSK));
}
void readSample() {
@ -1875,7 +1871,7 @@ int checkDataPresent() {
// still no data
if (!dataPresent) {
FILE_LOG(logERROR, ("Acquisition Finished (State: 0x%08x), "
"but no frame found (Look_at_me: 0x%08x).\n", retval));
"but no frame found (Look_at_me: 0x%08x).\n", dataPresent));
return FAIL;
}
// got data, exit
@ -1926,7 +1922,7 @@ uint32_t runBusy() {
/* common */
int calculateDataBytes(){
return DATA_BYTES;
return dataBytes;
}
int getTotalNumberOfChannels(){return ((int)getNumberOfChannelsPerChip() * (int)getNumberOfChips());}

5
slsDetectorServers/slsDetectorServer/ALTERA_PLL.h
View File

@ -179,8 +179,9 @@ void ALTERA_PLL_SetModePolling() {
* @param clkIndex clock index
* @param pllVCOFreqMhz PLL VCO Frequency in Mhz
* @param value frequency to set to
* @param frequency set
*/
void ALTERA_PLL_SetOuputFrequency (int clkIndex, int pllVCOFreqMhz, int value) {
int ALTERA_PLL_SetOuputFrequency (int clkIndex, int pllVCOFreqMhz, int value) {
FILE_LOG(logINFO, ("\tC%d: Setting output frequency\n"));
// calculate output frequency
@ -213,6 +214,8 @@ void ALTERA_PLL_SetOuputFrequency (int clkIndex, int pllVCOFreqMhz, int value) {
bus_w(ALTERA_PLL_Cntrl_Reg, bus_r(ALTERA_PLL_Cntrl_Reg) | ALTERA_PLL_Cntrl_PLLRstMask);
usleep(ALTERA_PLL_WAIT_TIME_US);
bus_w(ALTERA_PLL_Cntrl_Reg, bus_r(ALTERA_PLL_Cntrl_Reg) & ~ALTERA_PLL_Cntrl_PLLRstMask);
return (pllVCOFreqMhz / (low_count + high_count));
}

52
slsDetectorServers/slsDetectorServer/slsDetectorFunctionList.h
View File

@ -58,26 +58,27 @@ void getModuleConfiguration();
void allocateDetectorStructureMemory();
#endif
void setupDetector();
#ifdef CHIPTESTBOARDD
#if defined(CHIPTESTBOARDD) || defined(MOENCHD)
int allocateRAM();
void updateDataBytes();
int getChannels();
#endif
#if defined(GOTTHARDD) || defined(JUNGFRAUD)
int setDefaultDacs();
#endif
// advanced read/write reg
#ifdef JUNGFRAUD
extern u_int32_t writeRegister(u_int32_t offset, u_int32_t data); // blackfin.h
extern u_int32_t readRegister(u_int32_t offset); // blackfin.h
#elif EIGERD
#ifdef EIGERD
uint32_t writeRegister(uint32_t offset, uint32_t data);
uint32_t readRegister(uint32_t offset);
#else
#elif GOTTHARDD
uint32_t writeRegister16And32(uint32_t offset, uint32_t data); //FIXME its not there in ctb or moench?
uint32_t readRegister16And32(uint32_t offset);
#else
extern u_int32_t writeRegister(u_int32_t offset, u_int32_t data); // blackfin.h
extern u_int32_t readRegister(u_int32_t offset); // blackfin.h
#endif
@ -118,6 +119,7 @@ ROI* setROI(int n, ROI arg[], int *retvalsize, int *ret);
void setSpeed(enum speedVariable ind, int val);
int getSpeed(enum speedVariable ind);
#endif
#if defined(EIGERD) || defined(CHIPTESTBOARDD) || defined(MOENCHD)
enum readOutFlags setReadOutFlags(enum readOutFlags val);
#endif
@ -128,17 +130,17 @@ int selectStoragecellStart(int pos);
#endif
int64_t setTimer(enum timerIndex ind, int64_t val);
int64_t getTimeLeft(enum timerIndex ind);
#if defined(JUNGFRAUD) || defined(GOTTHARDD) || defined(CHIPTESTBOARDD)
#if defined(JUNGFRAUD) || defined(GOTTHARDD) || defined(CHIPTESTBOARDD) || defined(MOENCHD)
int validateTimer(enum timerIndex ind, int64_t val, int64_t retval);
#endif
// parameters - module, settings
#if !defined(CHIPTESTBOARDD) && !defined(MOENCHD)
#if (!defined(CHIPTESTBOARDD)) && (!defined(MOENCHD))
int setModule(sls_detector_module myMod, char* mess);
int getModule(sls_detector_module *myMod);
enum detectorSettings setSettings(enum detectorSettings sett);
enum detectorSettings getSettings();
#endif
enum detectorSettings getSettings();
// parameters - threshold
#ifdef EIGERD
@ -153,19 +155,22 @@ extern void AD9252_Set(int addr, int val); // AD9252.h (old board)
#if defined(GOTTHARDD) || defined(JUNGFRAUD) || defined(CHIPTESTBOARDD) || defined(MOENCHD)
extern void AD9257_Set(int addr, int val); // AD9257.h
#endif
#ifdef CHIPTESTBOARDD || defined(MOENCHD)
#if defined(CHIPTESTBOARDD) || defined(MOENCHD)
extern int AD9257_GetMaxValidVref(); // AD9257.h
extern void AD9257_SetVrefVoltage(int val) // AD9257.h
extern void AD9257_SetVrefVoltage(int val); // AD9257.h
#endif
void setDAC(enum DACINDEX ind, int val, int mV);
int getDAC(enum DACINDEX ind, int mV);
int getMaxDacSteps();
#if defined(CHIPTESTBOARDD) || defined(MOENCHD)
#if defined(CHIPTESTBOARDD) || defined(MOENCHD)
int dacToVoltage(int dac);
int checkVLimitCompliant(int mV);
int checkVLimitDacCompliant(int dac);
int getVLimit();
void setVLimit(int l);
#endif
#ifdef CHIPTESTBOARDD
int isVchipValid(int val);
int getVchip();
@ -184,7 +189,9 @@ void nextDAC();
void program_one_dac(int addr, int value);
u_int32_t putout(char *s);
#endif*/
#ifndef MOENCHD
int getADC(enum ADCINDEX ind);
#endif
#ifdef CHIPTESTBOARDD
extern int INA226_ReadVoltage(uint32_t transferCommandReg, uint32_t rxDataFifoLevelReg, uint32_t deviceId); // INA226.h
extern int INA226_ReadCurrent(uint32_t transferCommandReg, uint32_t rxDataFifoLevelReg, uint32_t deviceId); // INA226.h
@ -227,15 +234,13 @@ int setDetectorPosition(int pos[]);
#if defined(CHIPTESTBOARDD) || defined(MOENCHD)
int powerChip (int on);
int sendUDP(int enable);
void resetPLL();
void setPllReconfigReg(u_int32_t reg, u_int32_t val);
void configurePhase(CLKINDEX ind, int val);
int getPhase(CLKINDEX ind);
void configureFrequency(CLKINDEX ind, int val);
int getFrequency(CLKINDEX ind);
void configureSyncFrequency(CLKINDEX ind);
void configurePhase(enum CLKINDEX ind, int val);
int getPhase(enum CLKINDEX ind);
void configureFrequency(enum CLKINDEX ind, int val);
int getFrequency(enum CLKINDEX ind);
void configureSyncFrequency(enum CLKINDEX ind);
void setAdcOffsetRegister(int adc, int val);
void getAdcOffsetRegister(int adc);
int getAdcOffsetRegister(int adc);
extern void eraseFlash(); // programfpga.h
extern int startWritingFPGAprogram(FILE** filefp); // programfpga.h
extern void stopWritingFPGAprogram(FILE* filefp); // programfpga.h
@ -315,20 +320,23 @@ int stopStateMachine();
#ifdef EIGERD
int softwareTrigger();
#endif
#ifdef EIGERD
int startReadOut();
#endif
enum runStatus getRunStatus();
void readFrame(int *ret, char *mess);
#if defined(CHIPTESTBOARDD) || defined(MOENCHD)#ifdef CHIPTESTBOARDD
#if defined(CHIPTESTBOARDD) || defined(MOENCHD)
void unsetFifoReadStrobes();
void readSample();
int checkDataPresent();
int readFrameFromFifo();
#endif
#if defined(GOTTHARDD) || defined(JUNGFRAUD)
#if defined(GOTTHARDD) || defined(JUNGFRAUD) || defined(CHIPTESTBOARDD) || defined(MOENCHD)
u_int32_t runBusy();
#endif
#ifdef GOTTHARDD
u_int32_t runState(enum TLogLevel lev);
#endif

46
slsDetectorServers/slsDetectorServer/slsDetectorServer_funcs.c
View File

@ -728,7 +728,7 @@ int set_dac(int file_des) {
case ADC_VPP:
if (val < 0 || val > AD9257_GetMaxValidVref()) {
ret = FAIL;
strcpy(mess,"Could not set dac. Adc Vpp value should be between 0 and %d\n", maxValidVref());
sprintf(mess,"Could not set dac. Adc Vpp value should be between 0 and %d\n", AD9257_GetMaxValidVref());
FILE_LOG(logERROR,(mess));
} else {
AD9257_SetVrefVoltage(val);
@ -826,7 +826,7 @@ int set_dac(int file_des) {
#endif
#if defined(CHIPTESTBOARDD) || defined(MOENCHD)
case VLIMIT:
case V_LIMIT:
if (!mV) {
ret = FAIL;
strcpy(mess,"Could not set power. VLimit should be in mV and not dac units.\n");
@ -854,7 +854,7 @@ int set_dac(int file_des) {
} else {
#if defined(CHIPTESTBOARDD) || defined(MOENCHD)
if ((mV && checkVLimitCompliant(val) == FAIL) ||
(!mv && checkVLimitDacCompliant(val) == FAIL)) {
(!mV && checkVLimitDacCompliant(val) == FAIL)) {
ret = FAIL;
sprintf(mess,"Could not set dac %d to value %d. "
"Exceeds voltage limit %d.\n",
@ -916,7 +916,7 @@ int get_adc(int file_des) {
if (receiveData(file_des, &ind, sizeof(ind), INT32) < 0)
return printSocketReadError();
#ifndef MOENCHD
#ifdef MOENCHD
functionNotImplemented();
#else
enum ADCINDEX serverAdcIndex = 0;
@ -1230,7 +1230,9 @@ int get_module(int file_des) {
// only get
FILE_LOG(logDEBUG1, ("Getting module\n"));
#if !defined(CHIPTESTBOARDD) && !defined(MOENCHD)
getModule(&module);
#endif
FILE_LOG(logDEBUG1, ("Getting module. Settings:%d\n", module.reg));
}
@ -1459,7 +1461,7 @@ int read_all(int file_des) {
FILE_LOG(logDEBUG1, ("Reading all frames\n"));
// only set
if (Server_VerifyLock() == OK) {
#ifdef CHIPTESTBOARDD
#if defined(CHIPTESTBOARDD) || defined(MOENCHD)
// read from fifo enabled
if (!sendUDP(-1)) {
nframes = 0;
@ -1468,7 +1470,7 @@ int read_all(int file_des) {
while(readFrameFromFifo() == OK) {
// (to the receiver)
Server_SendResult(file_des, INT32, NO_UPDATE, ramValues, dataBytes);// (or get as arg first)send number of bytes (dataBytes) first //FIXME
FILE_LOG(logDEBUG1, "Frame %d sent\n", nframes);
FILE_LOG(logDEBUG1, ("Frame %d sent\n", nframes));
++nframes;
}
@ -1670,7 +1672,6 @@ int get_time_left(int file_des) {
case ACTUAL_TIME:
case MEASUREMENT_TIME:
case FRAME_NUMBER:
case FRAME_PERIOD:
case DELAY_AFTER_TRIGGER:
case CYCLES_NUMBER:
#elif MOENCHD
@ -1679,7 +1680,6 @@ int get_time_left(int file_des) {
case ACTUAL_TIME:
case MEASUREMENT_TIME:
case FRAME_NUMBER:
case FRAME_PERIOD:
case DELAY_AFTER_TRIGGER:
case CYCLES_NUMBER:
#endif
@ -1850,7 +1850,7 @@ int set_roi(int file_des) {
#else
// set & get
if ((narg == GET_READOUT_FLAGS) || (Server_VerifyLock() == OK)) {
if (myDetectorType == GOTTHARDD && narg > 1) {
if (myDetectorType == GOTTHARD && narg > 1) {
ret = FAIL;
strcpy(mess,"Can not set more than one ROI per module.\n");
FILE_LOG(logERROR,(mess));
@ -2090,7 +2090,7 @@ int send_update(int file_des) {
n = sendData(file_des,&i32,sizeof(i32),INT32);
if (n < 0) return printSocketReadError();
i32 = (int)setSettings(GET_SETTINGS);
i32 = (int)getSettings();
n = sendData(file_des,&i32,sizeof(i32),INT32);
if (n < 0) return printSocketReadError();
@ -2559,14 +2559,14 @@ int set_ctb_pattern(int file_des) {
default:
sprintf(tempName, "Pattern (Word, addr:0x%x)", addr);
FILE_LOG(logDEBUG1, ("Setting %s to 0x%llx\n", tempName, (long long int) word));
retval64 = writePatternWord(word);
retval64 = writePatternWord(addr, word);
break;
}
FILE_LOG(logDEBUG1, ("%s: 0x%llx\n", tempName, (long long int)retval64));
validate64(word, retval64, tempName, HEX);
}
}
return Server_SendResult(file_des, INT64, UPDATE, retval64, sizeof(retval64);
return Server_SendResult(file_des, INT64, UPDATE, &retval64, sizeof(retval64));
// pattern loop
@ -2576,18 +2576,20 @@ int set_ctb_pattern(int file_des) {
}
// level 0-2, addr upto patternlength + 1
else if ((level != -1) && (startAddr > (MAX_PATTERN_LENGTH + 1) || stopAddr > (MAX_PATTERN_LENGTH + 1))) {
else if ((loopLevel != -1) && (startAddr > (MAX_PATTERN_LENGTH + 1) || stopAddr > (MAX_PATTERN_LENGTH + 1))) {
ret = FAIL;
sprintf(mess, "Cannot set Pattern (Pattern Loop, level:%d, addr:%d). Addr must be less than %d\n",
level, addr, MAX_PATTERN_LENGTH + 1);
sprintf(mess, "Cannot set Pattern (Pattern Loop, level:%d, startaddr:%d, stopaddr:%d). "
"Addr must be less than %d\n",
loopLevel, startAddr, stopAddr, MAX_PATTERN_LENGTH + 1);
FILE_LOG(logERROR, (mess));
}
//level -1, addr upto patternlength
else if ((level == -1) && (startAddr > MAX_PATTERN_LENGTH || stopAddr > MAX_PATTERN_LENGTH)) {
else if ((loopLevel == -1) && (startAddr > MAX_PATTERN_LENGTH || stopAddr > MAX_PATTERN_LENGTH)) {
ret = FAIL;
sprintf(mess, "Cannot set Pattern (Pattern Loop, complete pattern, addr:%d). Addr must be less than %d\n",
addr, MAX_PATTERN_LENGTH);
sprintf(mess, "Cannot set Pattern (Pattern Loop, complete pattern, startaddr:%d, stopaddr:%d). "
"Addr must be less than %d\n",
startAddr, stopAddr, MAX_PATTERN_LENGTH);
FILE_LOG(logERROR, (mess));
}
@ -2597,7 +2599,7 @@ int set_ctb_pattern(int file_des) {
retvals[0] = startAddr;
retvals[1] = stopAddr;
retvals[2] = numLoops;
return Server_SendResult(file_des, INT32, UPDATE, retvals, sizeof(retvals);
return Server_SendResult(file_des, INT32, UPDATE, retvals, sizeof(retvals));
case 2:
@ -2618,7 +2620,7 @@ int set_ctb_pattern(int file_des) {
validate(addr, retval32, tempName, HEX);
}
}
return Server_SendResult(file_des, INT32, UPDATE, retval32, sizeof(retval32);
return Server_SendResult(file_des, INT32, UPDATE, &retval32, sizeof(retval32));
case 3:
@ -2634,7 +2636,7 @@ int set_ctb_pattern(int file_des) {
validate64(timeval, retval64, tempName, HEX);
}
}
return Server_SendResult(file_des, INT64, UPDATE, retval64, sizeof(retval64);
return Server_SendResult(file_des, INT64, UPDATE, &retval64, sizeof(retval64));
case 4:
@ -2901,7 +2903,7 @@ int set_network_parameter(int file_des) {
int value = args[1];
FILE_LOG(logDEBUG1, ("Set network parameter index %d to %d\n", mode, value));
#ifdef GOTTHARDD
#if defined(GOTTHARDD) || defined (CHIPTESTBOARDD) || defined(MOENCHD)
functionNotImplemented();
#else
enum NETWORKINDEX serverIndex = 0;

3
slsDetectorSoftware/multiSlsDetector/multiSlsDetector.h
View File

@ -1898,9 +1898,6 @@ class multiSlsDetector : public virtual slsDetectorDefs,
// pthread_t dataProcessingThread;
std::thread dataProcessingThread;
/** gui data */
double *fdata {nullptr};
/** detector data packed for the gui */
detectorData *thisData {nullptr};