detectors/slsDetectorPackage
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Merge branch 'developer' of github.com:slsdetectorgroup/slsDetectorPackage into developer

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This commit is contained in:
Erik Frojdh 2020-07-29 14:39:44 +02:00
commit d19530b3d4
6 changed files with 55 additions and 46 deletions
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slsDetectorServers/gotthard2DetectorServer/bin/gotthard2DetectorServer_developer
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slsDetectorServers/gotthard2DetectorServer/slsDetectorFunctionList.c
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@ -1757,8 +1757,9 @@ int setInjectChannel(int offset, int increment) {
char buffer[17];
memset(buffer, 0, sizeof(buffer));
int startCh = 4; // 4 due to padding
for (int ich = startCh + offset; ich < startCh + NCHAN;
ich = ich + increment) {
// reversing the channels sent (offset 0 is 127, 50 is 77 etc..)
for (int ich = startCh + NCHAN - 1 - offset; ich >= startCh;
ich -= increment) {
int byteIndex = ich / 8;
int bitIndex = ich % 8;
buffer[byteIndex] |= (1 << (8 - 1 - bitIndex));
@ -1829,6 +1830,12 @@ int configureASICVetoReference(int chipIndex, int *values) {
const int lenTotalBits = padding + lenBits + ASIC_ADDR_MAX_BITS; // 1800
const int len = lenTotalBits / 8; // 225
// reversing the values sent to the chip
int revValues[NCHAN] = {};
for (int i = 0; i < NCHAN; ++i) {
revValues[i] = values[NCHAN - 1 - i];
}
// assign each bit into 4 + 1792 into byte array
uint8_t commandBytes[lenTotalBits];
memset(commandBytes, 0, sizeof(commandBytes));
@ -1837,7 +1844,7 @@ int configureASICVetoReference(int chipIndex, int *values) {
// loop through all bits in a value
for (int iBit = 0; iBit < lenDataBitsPerchannel; ++iBit) {
commandBytes[offset++] =
((values[ich] >> (lenDataBitsPerchannel - 1 - iBit)) & 0x1);
((revValues[ich] >> (lenDataBitsPerchannel - 1 - iBit)) & 0x1);
}
}
@ -1861,7 +1868,7 @@ int configureASICVetoReference(int chipIndex, int *values) {
return FAIL;
}
// all chips
// all chips (saving unreversed values)
if (chipIndex == -1) {
for (int ichan = 0; ichan < NCHAN; ++ichan) {
for (int ichip = 0; ichip < NCHIP; ++ichip) {
@ -1956,10 +1963,10 @@ int setADCConfiguration(int chipIndex, int adcIndex, int value) {
chipmin = chipIndex;
chipmax = chipIndex + 1;
}
// specific adc
// specific adc (reversing adc when sending to chip)
if (adcIndex != -1) {
adcmin = adcIndex;
adcmax = adcIndex + 1;
adcmin = NADC - 1 - adcIndex;
adcmax = NADC - adcIndex;
}
// update values
for (int i = chipmin; i < chipmax; ++i) {
@ -2037,10 +2044,10 @@ int getADCConfiguration(int chipIndex, int adcIndex) {
chipmin = chipIndex;
chipmax = chipIndex + 1;
}
// specific adc
// specific adc (reversing adc when sending to chip)
if (adcIndex != -1) {
adcmin = adcIndex;
adcmax = adcIndex + 1;
adcmin = NADC - 1 - adcIndex;
adcmax = NADC - adcIndex;
}
int val = adcConfiguration[chipmin][adcmin];
@ -2169,19 +2176,18 @@ int configureASICGlobalSettings() {
int value = ((filter << ASIC_FILTER_OFST) & ASIC_FILTER_MSK) |
((cdsGain << ASIC_CDS_GAIN_OFST) & ASIC_CDS_GAIN_MSK);
switch (burstMode) {
case BURST_OFF:
value |= (ASIC_CONT_MODE_MSK | ASIC_EXT_TIMING_MSK);
break;
case BURST_INTERNAL:
break;
case BURST_EXTERNAL:
value |= ASIC_EXT_TIMING_MSK;
break;
case BURST_OFF:
value |= (ASIC_CONT_MODE_MSK | ASIC_EXT_TIMING_MSK);
break;
case BURST_INTERNAL:
break;
case BURST_EXTERNAL:
value |= ASIC_EXT_TIMING_MSK;
break;
}
LOG(logINFO,
("\tSending Global Chip settings:0x%x (filter:%d, "
"cdsgain:%d)\n",
value, filter, cdsGain));
LOG(logINFO, ("\tSending Global Chip settings:0x%x (filter:%d, "
"cdsgain:%d)\n",
value, filter, cdsGain));
const int padding = 6; // due to address (4) to make it byte aligned
const int lenTotalBits = padding + ASIC_GLOBAL_SETT_MAX_BITS +

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slsDetectorServers/jungfrauDetectorServer/bin/jungfrauDetectorServer_developer
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slsDetectorServers/jungfrauDetectorServer/slsDetectorFunctionList.c
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@ -279,6 +279,7 @@ u_int16_t getHardwareSerialNumber() {
HARDWARE_SERIAL_NUM_OFST);
}
// is board 1.0?, with value 2 (resistor network)
int isHardwareVersion2() {
return (((bus_r(MOD_SERIAL_NUM_REG) & HARDWARE_VERSION_NUM_MSK) ==
HARDWARE_VERSION_2_VAL)

46
slsDetectorServers/jungfrauDetectorServer/slsDetectorServer_defs.h
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@ -3,8 +3,8 @@
#include "sls_detector_defs.h"
#define MIN_REQRD_VRSN_T_RD_API 0x171220
#define REQRD_FRMWRE_VRSN_BOARD2 0x190716 // old
#define REQRD_FRMWRE_VRSN 0x200305 // new
#define REQRD_FRMWRE_VRSN_BOARD2 0x200724 // 1.0 pcb
#define REQRD_FRMWRE_VRSN 0x200721 // 2.0 pcb
#define CTRL_SRVR_INIT_TIME_US (300 * 1000)
@ -66,7 +66,6 @@ enum CLKINDEX { RUN_CLK, ADC_CLK, DBIT_CLK, NUM_CLOCKS };
#define NCHAN (256 * 256)
#define NCHIP (8)
#define NDAC (8)
#define NDAC_OLDBOARD (16)
#define DYNAMIC_RANGE (16)
#define NUM_BYTES_PER_PIXEL (DYNAMIC_RANGE / 8)
#define DATA_BYTES (NCHIP * NCHAN * NUM_BYTES_PER_PIXEL)
@ -103,42 +102,45 @@ enum CLKINDEX { RUN_CLK, ADC_CLK, DBIT_CLK, NUM_CLOCKS };
#define MAX_STORAGE_CELL_DLY_NS_VAL (ASIC_CTRL_EXPSRE_TMR_MAX_VAL)
#define ACQ_TIME_MIN_CLOCK (2)
#define MAX_PHASE_SHIFTS (160)
#define MAX_PHASE_SHIFTS (240)
#define BIT16_MASK (0xFFFF)
#define ADC_OFST_FULL_SPEED_VAL (0xf)
#define ADC_OFST_HALF_SPEED_VAL (0xb)
#define ADC_OFST_QUARTER_SPEED_VAL (0x7)
#define ADC_OFST_HALF_SPEED_BOARD2_VAL (0x13)
#define ADC_OFST_QUARTER_SPEED_BOARD2_VAL (0x0b)
// pipeline
#define ADC_OFST_FULL_SPEED_VAL (0x10) // 2.0 pcb
#define ADC_OFST_HALF_SPEED_VAL (0x08) // 2.0 pcb
#define ADC_OFST_QUARTER_SPEED_VAL (0x04) // 2.0 pcb
#define ADC_OFST_HALF_SPEED_BOARD2_VAL (0x13) // 1.0 pcb (2 resistor network)
#define ADC_OFST_QUARTER_SPEED_BOARD2_VAL (0x0b) // 1.0 pcb (2 resistor network)
#define ADC_PORT_INVERT_VAL (0x5A5A5A5A)
#define ADC_PORT_INVERT_BOARD2_VAL (0x453b2a9c)
// 2.0 pcb
#define SAMPLE_ADC_FULL_SPEED \
(SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_0_VAL + \
SAMPLE_DGTL_SAMPLE_2_VAL + SAMPLE_DECMT_FACTOR_FULL_VAL) // 0x200
SAMPLE_DGTL_SAMPLE_1_VAL + SAMPLE_DECMT_FACTOR_FULL_VAL) // 0x100
#define SAMPLE_ADC_HALF_SPEED \
(SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_1_VAL + \
SAMPLE_DGTL_SAMPLE_3_VAL + SAMPLE_DECMT_FACTOR_HALF_VAL) // 0x1310
#define SAMPLE_ADC_QUARTER_SPEED \
(SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_3_VAL + \
SAMPLE_DGTL_SAMPLE_6_VAL + SAMPLE_DECMT_FACTOR_QUARTER_VAL) // 0x2630
// 1.0 pcb (2 resistor network)
#define SAMPLE_ADC_HALF_SPEED_BOARD2 \
(SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_0_VAL + \
SAMPLE_DGTL_SAMPLE_6_VAL + SAMPLE_DECMT_FACTOR_HALF_VAL) // 0x1600
SAMPLE_DGTL_SAMPLE_3_VAL + SAMPLE_DECMT_FACTOR_HALF_VAL) // 0x1300
#define SAMPLE_ADC_QUARTER_SPEED_BOARD2 \
(SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_1_VAL + \
SAMPLE_DGTL_SAMPLE_11_VAL + SAMPLE_DECMT_FACTOR_QUARTER_VAL) // 0x2b10
SAMPLE_DGTL_SAMPLE_6_VAL + SAMPLE_DECMT_FACTOR_QUARTER_VAL) // 0x2610
#define ADC_PHASE_FULL_SPEED (28)
#define ADC_PHASE_HALF_SPEED (35)
#define ADC_PHASE_QUARTER_SPEED (35)
#define ADC_PHASE_HALF_SPEED_BOARD2 (0x1E) // 30
#define ADC_PHASE_QUARTER_SPEED_BOARD2 (0x1E) // 30
#define ADC_PHASE_FULL_SPEED (150) // 2.0 pcb
#define ADC_PHASE_HALF_SPEED (200) // 2.0 pcb
#define ADC_PHASE_QUARTER_SPEED (200) // 2.0 pcb
#define ADC_PHASE_HALF_SPEED_BOARD2 (75) // 1.0 pcb (2 resistor network)
#define ADC_PHASE_QUARTER_SPEED_BOARD2 (75) // 1.0 pcb (2 resistor network)
#define DBIT_PHASE_FULL_SPEED (37)
#define DBIT_PHASE_HALF_SPEED (37)
#define DBIT_PHASE_QUARTER_SPEED (37)
#define DBIT_PHASE_HALF_SPEED_BOARD2 (37)
#define DBIT_PHASE_QUARTER_SPEED_BOARD2 (37)
#define DBIT_PHASE_FULL_SPEED (85) // 2.0 pcb
#define DBIT_PHASE_HALF_SPEED (150) // 2.0 pcb
#define DBIT_PHASE_QUARTER_SPEED (150) // 2.0 pcb
#define DBIT_PHASE_HALF_SPEED_BOARD2 (150) // 1.0 pcb (2 resistor network)
#define DBIT_PHASE_QUARTER_SPEED_BOARD2 (150) // 1.0 pcb (2 resistor network)

4
slsSupportLib/include/versionAPI.h
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@ -5,8 +5,8 @@
#define APIGUI 0x200409
#define APICTB 0x200723
#define APIGOTTHARD 0x200723
#define APIJUNGFRAU 0x200723
#define APIMYTHEN3 0x200723
#define APIMOENCH 0x200722
#define APIEIGER 0x200723
#define APIGOTTHARD2 0x200723
#define APIJUNGFRAU 0x200728
#define APIGOTTHARD2 0x200728