jungfrau server: changes for new firmware, aligning adc deserializer. ctb serveR: removed unnecessary pll reset and polling mode for pll

This commit is contained in:
2019-03-22 15:09:29 +01:00
parent 5bf37a4f0d
commit cd5aea895b
11 changed files with 45 additions and 66 deletions

View File

@ -205,13 +205,8 @@ void AD9257_Configure(){
AD9257_Set(AD9257_OUT_MODE_REG, AD9257_OUT_BINARY_OFST_VAL);
//output clock phase
//if defined(GOTTHARDD) || defined(JUNGFRAUD)
#ifdef GOTTHARDD
#if defined(GOTTHARDD) || defined(JUNGFRAUD)
FILE_LOG(logINFO, ("\tOutput clock phase is at default: 180\n"));
#elif JUNGFRAUD
// This is not required (by default it is 180) (like gotthard)
FILE_LOG(logINFO, ("\tOutput clock phase: 180\n"));
AD9257_Set(AD9257_OUT_PHASE_REG, AD9257_OUT_CLK_180_VAL);
#else
FILE_LOG(logINFO, ("\tOutput clock phase: 60\n"));
AD9257_Set(AD9257_OUT_PHASE_REG, AD9257_OUT_CLK_60_VAL);

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@ -225,9 +225,6 @@ int ALTERA_PLL_SetOuputFrequency (int clkIndex, int pllVCOFreqMhz, int value) {
// write frequency (post-scale output counter C)
ALTERA_PLL_SetPllReconfigReg(ALTERA_PLL_C_COUNTER_REG, val);
// reset only PLL
ALTERA_PLL_ResetPLL();
return (pllVCOFreqMhz / (low_count + high_count));
}

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@ -280,7 +280,7 @@ extern void eraseFlash(); // programfpga.h
extern int startWritingFPGAprogram(FILE** filefp); // programfpga.h
extern void stopWritingFPGAprogram(FILE* filefp); // programfpga.h
extern int writeFPGAProgram(char* fpgasrc, size_t fsize, FILE* filefp); // programfpga.h
void setUnknowns();
void alignDeserializer();
// eiger specific - iodelay, pulse, rate, temp, activate, delay nw parameter
#elif EIGERD