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conflict git fix

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maliakal_d
2019-03-26 15:01:58 +01:00
parent 7cd5bc8b2d 8c2ee57591
commit c7ad548e4c
9 changed files with 29 additions and 21 deletions
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8
slsDetectorServers/moenchDetectorServer/gitInfo.txt
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@ -1,9 +1,9 @@
Path: slsDetectorPackage/slsDetectorServers/moenchDetectorServer
URL: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git
Repository Root: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git
Repsitory UUID: cd5aea895b07b7af25e3fb74a341a861f9aa291c
Revision: 21
Repsitory UUID: 7cd5bc8b2db6e89fbec4c06c65e683cf788338c0
Revision: 22
Branch: jungfrau
Last Changed Author: Dhanya_Thattil
Last Changed Rev: 4473
Last Changed Date: 2019-03-22 17:13:44.000000002 +0100 ../slsDetectorServer/slsDetectorServer_funcs.c
Last Changed Rev: 4474
Last Changed Date: 2019-03-26 15:01:04.000000002 +0100 ./slsDetectorServer_defs.h

6
slsDetectorServers/moenchDetectorServer/gitInfoMoench.h
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@ -1,6 +1,6 @@
#define GITURL "git@github.com:slsdetectorgroup/slsDetectorPackage.git"
#define GITREPUUID "cd5aea895b07b7af25e3fb74a341a861f9aa291c"
#define GITREPUUID "7cd5bc8b2db6e89fbec4c06c65e683cf788338c0"
#define GITAUTH "Dhanya_Thattil"
#define GITREV 0x4473
#define GITDATE 0x20190322
#define GITREV 0x4474
#define GITDATE 0x20190326
#define GITBRANCH "jungfrau"

4
slsDetectorServers/moenchDetectorServer/slsDetectorFunctionList.c
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@ -1292,7 +1292,9 @@ void configurePhase(enum CLKINDEX ind, int val) {
int phase = 0;
int maxShifts = ((ind == ADC_CLK) ? MAX_PHASE_SHIFTS_ADC_CLK : MAX_PHASE_SHIFTS_DBIT_CLK);
int maxShifts = (PLL_VCO_FREQ_MHZ / clkDivider[ind]) * MAX_PHASE_SHIFTS_STEPS;
FILE_LOG(logDEBUG1, ("Clock: %d MHz, VCO:%d MHz, Max Phase shifts:%d\n",
clkDivider[ind], PLL_VCO_FREQ_MHZ, maxShifts));
// delay clk
if (relativePhase > 0) {

3
slsDetectorServers/moenchDetectorServer/slsDetectorServer_defs.h
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@ -61,8 +61,7 @@ enum DACINDEX {D0, D1, D2, D3, D4, D5, D6, D7};
/* Defines in the Firmware */
#define MAX_PATTERN_LENGTH (0xFFFF)
#define DIGITAL_IO_DELAY_MAXIMUM_PS ((OUTPUT_DELAY_0_OTPT_STTNG_MSK >> OUTPUT_DELAY_0_OTPT_STTNG_OFST) * OUTPUT_DELAY_0_OTPT_STTNG_STEPS)
#define MAX_PHASE_SHIFTS_ADC_CLK (320)
#define MAX_PHASE_SHIFTS_DBIT_CLK (32)
#define MAX_PHASE_SHIFTS_STEPS (8)
#define WAIT_TME_US_FR_ACQDONE_REG (100) // wait time in us after acquisition done to ensure there is no data in fifo
#define WAIT_TIME_US_PLL (10 * 1000)