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ctb/moench server: clock fix, max shifts per clock is calculated everytime

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This commit is contained in:
maliakal_d 2019-03-25 14:41:15 +01:00
parent c15e72510c
commit 8c2ee57591
8 changed files with 29 additions and 27 deletions
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10
slsDetectorServers/ctbDetectorServer/gitInfo.txt
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@ -1,9 +1,9 @@
Path: slsDetectorPackage/slsDetectorServers/ctbDetectorServer
URL: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git
Repository Root: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git
Repsitory UUID: 050854de36f01379e974005e204b6563ffbc7004
Revision: 43
Repsitory UUID: c15e72510ca9e11eeb234e94dae47c6e3c163c3b
Revision: 44
Branch: refactor
Last Changed Author: Dhanya_Thattil
Last Changed Rev: 4458
Last Changed Date: 2019-03-21 14:00:57.000000002 +0100 ../slsDetectorServer/ALTERA_PLL.h
Last Changed Author: Gemma_Tinti
Last Changed Rev: 4473
Last Changed Date: 2019-03-25 14:39:58.000000002 +0100 ./slsDetectorFunctionList.c

8
slsDetectorServers/ctbDetectorServer/gitInfoCtb.h
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@ -1,6 +1,6 @@
#define GITURL "git@github.com:slsdetectorgroup/slsDetectorPackage.git"
#define GITREPUUID "050854de36f01379e974005e204b6563ffbc7004"
#define GITAUTH "Dhanya_Thattil"
#define GITREV 0x4458
#define GITDATE 0x20190321
#define GITREPUUID "c15e72510ca9e11eeb234e94dae47c6e3c163c3b"
#define GITAUTH "Gemma_Tinti"
#define GITREV 0x4473
#define GITDATE 0x20190325
#define GITBRANCH "refactor"

4
slsDetectorServers/ctbDetectorServer/slsDetectorFunctionList.c
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@ -1656,7 +1656,9 @@ void configurePhase(enum CLKINDEX ind, int val) {
int phase = 0;
int maxShifts = ((ind == ADC_CLK) ? MAX_PHASE_SHIFTS_ADC_CLK : MAX_PHASE_SHIFTS_DBIT_CLK);
int maxShifts = (PLL_VCO_FREQ_MHZ / clkDivider[ind]) * MAX_PHASE_SHIFTS_STEPS;
FILE_LOG(logDEBUG1, ("Clock: %d MHz, VCO:%d MHz, Max Phase shifts:%d\n",
clkDivider[ind], PLL_VCO_FREQ_MHZ, maxShifts));
// delay clk
if (relativePhase > 0) {

3
slsDetectorServers/ctbDetectorServer/slsDetectorServer_defs.h
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@ -80,8 +80,7 @@ enum DACINDEX {D0, D1, D2, D3, D4, D5, D6, D7, D8, D9,
/* Defines in the Firmware */
#define MAX_PATTERN_LENGTH (0xFFFF)
#define DIGITAL_IO_DELAY_MAXIMUM_PS ((OUTPUT_DELAY_0_OTPT_STTNG_MSK >> OUTPUT_DELAY_0_OTPT_STTNG_OFST) * OUTPUT_DELAY_0_OTPT_STTNG_STEPS)
#define MAX_PHASE_SHIFTS_ADC_CLK (320)
#define MAX_PHASE_SHIFTS_DBIT_CLK (32)
#define MAX_PHASE_SHIFTS_STEPS (8)
#define WAIT_TME_US_FR_ACQDONE_REG (100) // wait time in us after acquisition done to ensure there is no data in fifo
#define WAIT_TIME_US_PLL (10 * 1000)

14
slsDetectorServers/moenchDetectorServer/gitInfo.txt
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@ -1,9 +1,9 @@
Path: slsDetectorPackage/slsDetectorServers/moenchDetectorServer
URL: origin https://www.github.com/slsdetectorgroup/slsDetectorPackage
Repository Root: origin https://www.github.com/slsdetectorgroup/slsDetectorPackage
Repsitory UUID: 6765fd0dc89176b4eceaf5e2304ef808a316ba9b
Revision: 16
URL: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git
Repository Root: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git
Repsitory UUID: c15e72510ca9e11eeb234e94dae47c6e3c163c3b
Revision: 20
Branch: refactor
Last Changed Author: Dhanya_Thattil
Last Changed Rev: 4394
Last Changed Date: 2019-03-13 08:04:56.000000002 +0100 ./RegisterDefs.h
Last Changed Author: Gemma_Tinti
Last Changed Rev: 4473
Last Changed Date: 2019-03-25 14:39:22.000000002 +0100 ./slsDetectorFunctionList.c

10
slsDetectorServers/moenchDetectorServer/gitInfoMoench.h
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@ -1,6 +1,6 @@
#define GITURL "https://www.github.com/slsdetectorgroup/slsDetectorPackage"
#define GITREPUUID "6765fd0dc89176b4eceaf5e2304ef808a316ba9b"
#define GITAUTH "Dhanya_Thattil"
#define GITREV 0x4394
#define GITDATE 0x20190313
#define GITURL "git@github.com:slsdetectorgroup/slsDetectorPackage.git"
#define GITREPUUID "c15e72510ca9e11eeb234e94dae47c6e3c163c3b"
#define GITAUTH "Gemma_Tinti"
#define GITREV 0x4473
#define GITDATE 0x20190325
#define GITBRANCH "refactor"

4
slsDetectorServers/moenchDetectorServer/slsDetectorFunctionList.c
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@ -1292,7 +1292,9 @@ void configurePhase(enum CLKINDEX ind, int val) {
int phase = 0;
int maxShifts = ((ind == ADC_CLK) ? MAX_PHASE_SHIFTS_ADC_CLK : MAX_PHASE_SHIFTS_DBIT_CLK);
int maxShifts = (PLL_VCO_FREQ_MHZ / clkDivider[ind]) * MAX_PHASE_SHIFTS_STEPS;
FILE_LOG(logDEBUG1, ("Clock: %d MHz, VCO:%d MHz, Max Phase shifts:%d\n",
clkDivider[ind], PLL_VCO_FREQ_MHZ, maxShifts));
// delay clk
if (relativePhase > 0) {

3
slsDetectorServers/moenchDetectorServer/slsDetectorServer_defs.h
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@ -61,8 +61,7 @@ enum DACINDEX {D0, D1, D2, D3, D4, D5, D6, D7};
/* Defines in the Firmware */
#define MAX_PATTERN_LENGTH (0xFFFF)
#define DIGITAL_IO_DELAY_MAXIMUM_PS ((OUTPUT_DELAY_0_OTPT_STTNG_MSK >> OUTPUT_DELAY_0_OTPT_STTNG_OFST) * OUTPUT_DELAY_0_OTPT_STTNG_STEPS)
#define MAX_PHASE_SHIFTS_ADC_CLK (320)
#define MAX_PHASE_SHIFTS_DBIT_CLK (32)
#define MAX_PHASE_SHIFTS_STEPS (8)
#define WAIT_TME_US_FR_ACQDONE_REG (100) // wait time in us after acquisition done to ensure there is no data in fifo
#define WAIT_TIME_US_PLL (10 * 1000)