detectors/slsDetectorPackage
25
0
Fork 0
mirror of https://github.com/slsdetectorgroup/slsDetectorPackage.git synced 2025-06-13 13:27:14 +02:00
Code Issues Actions Packages Releases Activity

m3: reset fixed

Browse Source
This commit is contained in:
maliakal_d
2019-11-22 16:40:43 +01:00
parent ba008db29a
commit c4675da0c3
8 changed files with 25 additions and 35 deletions
Download Patch File Download Diff File Expand all files Collapse all files

23
slsDetectorServers/gotthard2DetectorServer/RegisterDefs.h
View File

@ -9,6 +9,8 @@
#define BASE_READOUT_PLL (0x0000) // 0x1804_0000 - 0x1804_07FF
/* Reconfiguration core for system pll */
#define BASE_SYSTEM_PLL (0x0800) // 0x1804_0800 - 0x1804_0FFF
/* Clock Generation */
#define BASE_CLK_GENERATION (0x1000) // 0x1804_1000 - 0x1804_XXXX //TODO
/* Base addresses 0x1806 0000 ---------------------------------------------*/
/* General purpose control and status registers */
@ -19,22 +21,13 @@
#define BASE_UDP_RAM (0x01000) // 0x1806_1000 - 0x1806_1FFF
/* Clock Generation registers ------------------------------------------------------*/
#define PLL_RESET_REG (0x00 * REG_OFFSET + BASE_CLK_GENERATION)
/* Readout PLL registers --------------------------------------------------*/
#define READOUT_PLL_RESET_REG (0x1 * REG_OFFSET + BASE_READOUT_PLL) //TODO
#define READOUT_PLL_RESET_OFST (0)
#define READOUT_PLL_RESET_MSK (0x00000001 << READOUT_PLL_RESET_OFST)
/* System PLL registers --------------------------------------------------*/
#define SYSTEM_PLL_RESET_REG (0x1 * REG_OFFSET + BASE_SYSTEM_PLL) //TODO
#define SYSTEM_PLL_RESET_OFST (0)
#define SYSTEM_PLL_RESET_MSK (0x00000001 << SYSTEM_PLL_RESET_OFST)
#define PLL_RESET_READOUT_OFST (0)
#define PLL_RESET_READOUT_MSK (0x00000001 << PLL_RESET_READOUT_OFST)
#define PLL_RESET_SYSTEM_OFST (1)
#define PLL_RESET_SYSTEM_MSK (0x00000001 << PLL_RESET_SYSTEM_OFST)
/* Control registers --------------------------------------------------*/