diff --git a/slsDetectorServers/gotthard2DetectorServer/RegisterDefs.h b/slsDetectorServers/gotthard2DetectorServer/RegisterDefs.h
index 3d20bd3d2..0514d4238 100644
--- a/slsDetectorServers/gotthard2DetectorServer/RegisterDefs.h
+++ b/slsDetectorServers/gotthard2DetectorServer/RegisterDefs.h
@@ -9,6 +9,8 @@
 #define BASE_READOUT_PLL                (0x0000) // 0x1804_0000 - 0x1804_07FF
 /* Reconfiguration core for system pll */
 #define BASE_SYSTEM_PLL                 (0x0800) // 0x1804_0800 - 0x1804_0FFF
+/* Clock Generation */
+#define BASE_CLK_GENERATION             (0x1000) // 0x1804_1000 - 0x1804_XXXX //TODO
 
 /* Base addresses 0x1806 0000 ---------------------------------------------*/
 /* General purpose control and status registers */
@@ -19,22 +21,13 @@
 #define BASE_UDP_RAM                    (0x01000) // 0x1806_1000 - 0x1806_1FFF
 
 
+/* Clock Generation registers ------------------------------------------------------*/
+#define PLL_RESET_REG                   (0x00 * REG_OFFSET + BASE_CLK_GENERATION)
 
-
-/* Readout PLL registers --------------------------------------------------*/
-
-#define READOUT_PLL_RESET_REG           (0x1 * REG_OFFSET + BASE_READOUT_PLL) //TODO
-
-#define READOUT_PLL_RESET_OFST          (0)
-#define READOUT_PLL_RESET_MSK           (0x00000001 << READOUT_PLL_RESET_OFST)
-
-
-/* System PLL registers --------------------------------------------------*/
-
-#define SYSTEM_PLL_RESET_REG            (0x1 * REG_OFFSET + BASE_SYSTEM_PLL) //TODO
-
-#define SYSTEM_PLL_RESET_OFST           (0)
-#define SYSTEM_PLL_RESET_MSK            (0x00000001 << SYSTEM_PLL_RESET_OFST)
+#define PLL_RESET_READOUT_OFST          (0)
+#define PLL_RESET_READOUT_MSK           (0x00000001 << PLL_RESET_READOUT_OFST)
+#define PLL_RESET_SYSTEM_OFST           (1)
+#define PLL_RESET_SYSTEM_MSK            (0x00000001 << PLL_RESET_SYSTEM_OFST)
 
 
 /* Control registers --------------------------------------------------*/
diff --git a/slsDetectorServers/gotthard2DetectorServer/bin/gotthard2DetectorServer_developer b/slsDetectorServers/gotthard2DetectorServer/bin/gotthard2DetectorServer_developer
index addad7e8b..b93f1de1b 100755
Binary files a/slsDetectorServers/gotthard2DetectorServer/bin/gotthard2DetectorServer_developer and b/slsDetectorServers/gotthard2DetectorServer/bin/gotthard2DetectorServer_developer differ
diff --git a/slsDetectorServers/gotthard2DetectorServer/slsDetectorFunctionList.c b/slsDetectorServers/gotthard2DetectorServer/slsDetectorFunctionList.c
index cc80016bf..6818b40b6 100644
--- a/slsDetectorServers/gotthard2DetectorServer/slsDetectorFunctionList.c
+++ b/slsDetectorServers/gotthard2DetectorServer/slsDetectorFunctionList.c
@@ -371,7 +371,7 @@ void setupDetector() {
 
 #ifndef VIRTUAL
 	// pll defines
-	ALTERA_PLL_C10_SetDefines(REG_OFFSET, BASE_READOUT_PLL, BASE_SYSTEM_PLL, READOUT_PLL_RESET_REG, SYSTEM_PLL_RESET_REG, READOUT_PLL_RESET_MSK, SYSTEM_PLL_RESET_MSK, READOUT_PLL_VCO_FREQ_HZ, SYSTEM_PLL_VCO_FREQ_HZ);
+	ALTERA_PLL_C10_SetDefines(REG_OFFSET, BASE_READOUT_PLL, BASE_SYSTEM_PLL, PLL_RESET_REG, PLL_RESET_REG, PLL_RESET_READOUT_MSK, PLL_RESET_SYSTEM_MSK, READOUT_PLL_VCO_FREQ_HZ, SYSTEM_PLL_VCO_FREQ_HZ);
 	ALTERA_PLL_C10_ResetPLL(READOUT_PLL);
 	ALTERA_PLL_C10_ResetPLL(SYSTEM_PLL);
 	// hv
diff --git a/slsDetectorServers/mythen3DetectorServer/RegisterDefs.h b/slsDetectorServers/mythen3DetectorServer/RegisterDefs.h
index f7a6f7ab9..872f931c3 100644
--- a/slsDetectorServers/mythen3DetectorServer/RegisterDefs.h
+++ b/slsDetectorServers/mythen3DetectorServer/RegisterDefs.h
@@ -8,6 +8,8 @@
 #define BASE_READOUT_PLL                (0x0000) // 0x1804_0000 - 0x1804_07FF
 /* Reconfiguration core for system pll */
 #define BASE_SYSTEM_PLL                 (0x0800) // 0x1804_0800 - 0x1804_0FFF
+/* Clock Generation */
+#define BASE_CLK_GENERATION             (0x1000) // 0x1804_1000 - 0x1804_XXXX //TODO
 
 /* Base addresses 0x1806 0000 ---------------------------------------------*/
 /* General purpose control and status registers */
@@ -30,21 +32,13 @@
 
 
 
+/* Clock Generation registers ------------------------------------------------------*/
+#define PLL_RESET_REG                   (0x00 * REG_OFFSET + BASE_CLK_GENERATION)
 
-/* Readout PLL registers --------------------------------------------------*/
-
-#define READOUT_PLL_RESET_REG           (0x1 * REG_OFFSET + BASE_READOUT_PLL) //TODO
-
-#define READOUT_PLL_RESET_OFST          (0)
-#define READOUT_PLL_RESET_MSK           (0x00000001 << READOUT_PLL_RESET_OFST)
-
-
-/* System PLL registers --------------------------------------------------*/
-
-#define SYSTEM_PLL_RESET_REG            (0x1 * REG_OFFSET + BASE_SYSTEM_PLL) //TODO
-
-#define SYSTEM_PLL_RESET_OFST           (0)
-#define SYSTEM_PLL_RESET_MSK            (0x00000001 << SYSTEM_PLL_RESET_OFST)
+#define PLL_RESET_READOUT_OFST          (0)
+#define PLL_RESET_READOUT_MSK           (0x00000001 << PLL_RESET_READOUT_OFST)
+#define PLL_RESET_SYSTEM_OFST           (1)
+#define PLL_RESET_SYSTEM_MSK            (0x00000001 << PLL_RESET_SYSTEM_OFST)
 
 
 
diff --git a/slsDetectorServers/mythen3DetectorServer/bin/mythen3DetectorServer_developer b/slsDetectorServers/mythen3DetectorServer/bin/mythen3DetectorServer_developer
index b48273824..c7b8af238 100755
Binary files a/slsDetectorServers/mythen3DetectorServer/bin/mythen3DetectorServer_developer and b/slsDetectorServers/mythen3DetectorServer/bin/mythen3DetectorServer_developer differ
diff --git a/slsDetectorServers/mythen3DetectorServer/slsDetectorFunctionList.c b/slsDetectorServers/mythen3DetectorServer/slsDetectorFunctionList.c
index ac94aaed7..ce419125b 100644
--- a/slsDetectorServers/mythen3DetectorServer/slsDetectorFunctionList.c
+++ b/slsDetectorServers/mythen3DetectorServer/slsDetectorFunctionList.c
@@ -351,7 +351,7 @@ void setupDetector() {
 
 #ifndef VIRTUAL
 	// pll defines
-	ALTERA_PLL_C10_SetDefines(REG_OFFSET, BASE_READOUT_PLL, BASE_SYSTEM_PLL, READOUT_PLL_RESET_REG, SYSTEM_PLL_RESET_REG, READOUT_PLL_RESET_MSK, SYSTEM_PLL_RESET_MSK, READOUT_PLL_VCO_FREQ_HZ, SYSTEM_PLL_VCO_FREQ_HZ);
+	ALTERA_PLL_C10_SetDefines(REG_OFFSET, BASE_READOUT_PLL, BASE_SYSTEM_PLL, PLL_RESET_REG, PLL_RESET_REG, PLL_RESET_READOUT_MSK, PLL_RESET_SYSTEM_MSK, READOUT_PLL_VCO_FREQ_HZ, SYSTEM_PLL_VCO_FREQ_HZ);
 	ALTERA_PLL_C10_ResetPLL(READOUT_PLL);
 	ALTERA_PLL_C10_ResetPLL(SYSTEM_PLL);
 	// hv
diff --git a/slsDetectorServers/slsDetectorServer/src/ALTERA_PLL_CYCLONE10.c b/slsDetectorServers/slsDetectorServer/src/ALTERA_PLL_CYCLONE10.c
index 6e05c8032..9596db253 100755
--- a/slsDetectorServers/slsDetectorServer/src/ALTERA_PLL_CYCLONE10.c
+++ b/slsDetectorServers/slsDetectorServer/src/ALTERA_PLL_CYCLONE10.c
@@ -88,9 +88,12 @@ void ALTERA_PLL_C10_ResetPLL (int pllIndex) {
     uint32_t resetreg = ALTERA_PLL_C10_Reset_Reg[pllIndex];
     uint32_t resetmsk = ALTERA_PLL_C10_Reset_Msk[pllIndex];
 
-    //FILE_LOG(logINFO, ("Resetting PLL %d\n", pllIndex));
-    FILE_LOG(logWARNING, ("Reset PLL not implemented!\n"));
-   // bus_w_csp1(resetreg, bus_r_csp1(resetreg) | resetmsk);
+#ifdef MYTHEN3D
+    FILE_LOG(logINFO, ("Resetting PLL %d\n", pllIndex));
+    bus_w_csp1(resetreg, bus_r_csp1(resetreg) | resetmsk);
+#else
+    FILE_LOG(logWARNING, ("Resetting PLL %d not implemented!\n", pllIndex));
+#endif
     usleep(ALTERA_PLL_C10_WAIT_TIME_US); 
 }
 
diff --git a/slsSupportLib/include/versionAPI.h b/slsSupportLib/include/versionAPI.h
index 80135081a..a73ea7629 100644
--- a/slsSupportLib/include/versionAPI.h
+++ b/slsSupportLib/include/versionAPI.h
@@ -7,6 +7,6 @@
 #define APIGOTTHARD 0x191111
 #define APIJUNGFRAU 0x191111
 #define APIEIGER 0x191111
-#define APIGOTTHARD2 0x191121
 #define APICTB 0x191121
 #define APIMYTHEN3 0x191122
+#define APIGOTTHARD2 0x191122