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some minor modifications

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This commit is contained in:
maliakal_d 2019-01-08 06:57:04 +01:00
parent 4b007b003a
commit bf4ba9d08b
2 changed files with 3 additions and 11 deletions
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2
slsDetectorServers/gotthardDetectorServer/RegisterDefs.h
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@ -111,7 +111,7 @@
//0x32214 //0x32214
#define ADC_SYNC_TKN_VAL (ADC_SYNC_ENET_STRT_DLY_VAL | ADC_SYNC_TKN1_HGH_DLY_VAL | ADC_SYNC_TKN2_HGH_DLY_VAL | ADC_SYNC_TKN1_LOW_DLY_VAL | ADC_SYNC_TKN2_LOW_DLY_VAL) #define ADC_SYNC_TKN_VAL (ADC_SYNC_ENET_STRT_DLY_VAL | ADC_SYNC_TKN1_HGH_DLY_VAL | ADC_SYNC_TKN2_HGH_DLY_VAL | ADC_SYNC_TKN1_LOW_DLY_VAL | ADC_SYNC_TKN2_LOW_DLY_VAL)
#define ADC_SYNC_CLEAN_FIFOS_OFST (20) #define ADC_SYNC_CLEAN_FIFOS_OFST (20)
#define ADC_SYNC_CLEAN_FIFOS_MSK (0x00000001 << ADC_SYNC_CLEAN_FIFOS_OFST)// FIXME: tried with 1, works? else put 0x011 as mask #define ADC_SYNC_CLEAN_FIFOS_MSK (0x00000001 << ADC_SYNC_CLEAN_FIFOS_OFST)
#define ADC_SYNC_ENET_DELAY_OFST (24) #define ADC_SYNC_ENET_DELAY_OFST (24)
#define ADC_SYNC_ENET_DELAY_MSK (0x000000FF << ADC_SYNC_ENET_DELAY_OFST) #define ADC_SYNC_ENET_DELAY_MSK (0x000000FF << ADC_SYNC_ENET_DELAY_OFST)
#define ADC_SYNC_ENET_DELAY_NO_ROI_VAL ((0x88 << ADC_SYNC_ENET_DELAY_OFST) & ADC_SYNC_ENET_DELAY_MSK) #define ADC_SYNC_ENET_DELAY_NO_ROI_VAL ((0x88 << ADC_SYNC_ENET_DELAY_OFST) & ADC_SYNC_ENET_DELAY_MSK)

12
slsDetectorServers/gotthardDetectorServer/slsDetectorFunctionList.c
View File

@ -401,7 +401,7 @@ void setupDetector() {
setROIADC(-1); // set adcsyncreg, daqreg, chipofinterestreg, cleanfifos, setROIADC(-1); // set adcsyncreg, daqreg, chipofinterestreg, cleanfifos,
setGbitReadout(); setGbitReadout();
LTC2620_Configure(); /*FIXME: if it doesnt work, switch to the old dac*/ LTC2620_Configure();
// master, slave (25um) // master, slave (25um)
setMasterSlaveConfiguration(); setMasterSlaveConfiguration();
@ -1403,10 +1403,6 @@ int configureMAC(uint32_t destip, uint64_t destmac, uint64_t sourcemac, uint32_t
bus_w(addr, bus_r(addr) &(~WRT_BCK_MSK)); bus_w(addr, bus_r(addr) &(~WRT_BCK_MSK));
FILE_LOG(logDEBUG1, ("\tWrite back released. MultiPurpose reg: 0x%x\n", bus_r(addr))); FILE_LOG(logDEBUG1, ("\tWrite back released. MultiPurpose reg: 0x%x\n", bus_r(addr)));
// nreset phy /*FIXME: is this needed ?? */
/* bus_w(addr, bus_r(addr) | ENT_RSTN_MSK);
FILE_LOG(logDEBUG1, ("\tNreset phy. MultiPurpose reg: 0x%x\n", bus_r(addr)));*/
FILE_LOG(logDEBUG1, ("\tConfiguring MAC CONF\n")); FILE_LOG(logDEBUG1, ("\tConfiguring MAC CONF\n"));
mac_conf *mac_conf_regs = (mac_conf*)(CSP0BASE + ENET_CONF_REG * 2); // direct write mac_conf *mac_conf_regs = (mac_conf*)(CSP0BASE + ENET_CONF_REG * 2); // direct write
mac_conf_regs->mac.mac_dest_mac1 = ((destmac >> (8 * 5)) & 0xFF); mac_conf_regs->mac.mac_dest_mac1 = ((destmac >> (8 * 5)) & 0xFF);
@ -1466,8 +1462,6 @@ int configureMAC(uint32_t destip, uint64_t destmac, uint64_t sourcemac, uint32_t
tse_conf_regs->mdio_addr1 = 0x0; tse_conf_regs->mdio_addr1 = 0x0;
mac_conf_regs->cdone = 0xFFFFFFFF; mac_conf_regs->cdone = 0xFFFFFFFF;
// write shadow regs /* FIXME: Only INT_RSTN_MSK | WRT_BCK_MSK */
/*bus_w(addr, bus_r(addr) | (INT_RSTN_MSK | ENT_RSTN_MSK| WRT_BCK_MSK));*/
bus_w(addr, bus_r(addr) | (INT_RSTN_MSK | WRT_BCK_MSK)); bus_w(addr, bus_r(addr) | (INT_RSTN_MSK | WRT_BCK_MSK));
FILE_LOG(logDEBUG1, ("\tWrite shadow regs with int reset. MultiPurpose reg: 0x%x\n", bus_r(addr))); FILE_LOG(logDEBUG1, ("\tWrite shadow regs with int reset. MultiPurpose reg: 0x%x\n", bus_r(addr)));
@ -1477,8 +1471,6 @@ int configureMAC(uint32_t destip, uint64_t destmac, uint64_t sourcemac, uint32_t
bus_w(addr, bus_r(addr) &(~WRT_BCK_MSK)); bus_w(addr, bus_r(addr) &(~WRT_BCK_MSK));
FILE_LOG(logDEBUG1, ("\tWrite back released. MultiPurpose reg: 0x%x\n", bus_r(addr))); FILE_LOG(logDEBUG1, ("\tWrite back released. MultiPurpose reg: 0x%x\n", bus_r(addr)));
// sw1 /* FIXME: Only SW1_MSK */
/*bus_w(addr, bus_r(addr) | (INT_RSTN_MSK | ENT_RSTN_MSK | SW1_MSK));*/
bus_w(addr, bus_r(addr) | SW1_MSK); bus_w(addr, bus_r(addr) | SW1_MSK);
FILE_LOG(logDEBUG1, ("\tSw1. MultiPurpose reg: 0x%x\n", bus_r(addr))); FILE_LOG(logDEBUG1, ("\tSw1. MultiPurpose reg: 0x%x\n", bus_r(addr)));
@ -1643,7 +1635,7 @@ int stopStateMachine(){
#endif #endif
//stop state machine //stop state machine
bus_w16(CONTROL_REG, CONTROL_STP_ACQ_MSK); bus_w16(CONTROL_REG, CONTROL_STP_ACQ_MSK);
//usleep(100);/**FIXME:Needed? not there earlier*/ usleep(100);
bus_w16(CONTROL_REG, 0x0); bus_w16(CONTROL_REG, 0x0);
// check // check