switch XCTB regDefs to cheby output

This commit is contained in:
2026-01-05 13:53:30 +01:00
parent dece2e16b4
commit bcd22af9ba
2 changed files with 696 additions and 497 deletions

File diff suppressed because it is too large Load Diff

View File

@@ -11,7 +11,6 @@
#include "LTC2620_Driver.h" #include "LTC2620_Driver.h"
#include "XILINX_PLL.h" #include "XILINX_PLL.h"
#include "XILINX_FMC.h" #include "XILINX_FMC.h"
#include "loadPattern.h" #include "loadPattern.h"
#ifdef VIRTUAL #ifdef VIRTUAL
#include "communication_funcs_UDP.h" #include "communication_funcs_UDP.h"
@@ -258,17 +257,17 @@ int testFixedFPGAPattern() {
LOG(logINFO, ("Testing FPGA Fixed Pattern:\n")); LOG(logINFO, ("Testing FPGA Fixed Pattern:\n"));
#ifndef VIRTUAL #ifndef VIRTUAL
uint32_t val = bus_r(FIXEDPATTERNREG); uint32_t val = bus_r(FIXEDPATTERNREG);
if (val == FIXEDPATTERNVAL) { if (val == FIXEDPATTERNREG_PRESET) {
LOG(logINFO, ("\tFixed pattern: successful match (0x%08x)\n", val)); LOG(logINFO, ("\tFixed pattern: successful match (0x%08x)\n", val));
} else { } else {
LOG(logERROR, LOG(logERROR,
("Fixed pattern does not match! Read 0x%08x, expected 0x%08x\n", ("Fixed pattern does not match! Read 0x%08x, expected 0x%08x\n",
val, FIXEDPATTERNVAL)); val, FIXEDPATTERNREG_PRESET));
return FAIL; return FAIL;
} }
#endif #endif
LOG(logINFO, LOG(logINFO,
("\tSuccessfully read FPGA Fixed Pattern (0x%x)\n", FIXEDPATTERNVAL)); ("\tSuccessfully read FPGA Fixed Pattern (0x%x)\n", FIXEDPATTERNREG_PRESET));
return OK; return OK;
} }