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fixed fpgaversion etc register problems

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git-svn-id: file:///afs/psi.ch/project/sls_det_software/svn/slsDetectorSoftware@109 951219d9-93cf-4727-9268-0efd64621fa3
This commit is contained in:
l_maliakal_d 2012-01-18 18:00:37 +00:00
parent 302a70d59b
commit b7bb5a961b
5 changed files with 25 additions and 29 deletions
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39
slsDetectorSoftware/gotthardDetectorServer/firmware_funcs.c
View File

@ -260,27 +260,24 @@ int setPhaseShiftOnce(){
addr=MULTI_PURPOSE_REG;
reg=bus_r(addr);
#ifdef VERBOSE
printf("Multipurpose reg:%d\n",reg);
printf("Multipurpose reg:%x\n",reg);
#endif
//Checking if it is power on(negative number)
if(((reg&0xFFFF0000)>>16)>0){
bus_w(addr,0x0); //clear the reg
#ifdef VERBOSE
printf("Implementing Phase Shift-Reg:%d\n",bus_r(addr));
printf("Implementing Phase Shift-Reg:%x\n",bus_r(addr));
#endif
//phase shift
for (i=1;i<PHASE_SHIFT;i++) {
bus_w(addr,(INT_RSTN_BIT|ENET_RESETN_BIT|SW1_BIT|PHASE_STEP_BIT));//0x2821
bus_w(addr,(INT_RSTN_BIT|ENET_RESETN_BIT|SW1_BIT&~PHASE_STEP_BIT));//0x2820
}
//confirming phase change by setting CHANGE_AT_POWER_ON_BIT(for later uses)
bus_w(addr,(CHANGE_AT_POWER_ON_BIT|//DIGITAL_TEST_BIT|
INT_RSTN_BIT|ENET_RESETN_BIT|SW1_BIT&~PHASE_STEP_BIT));
}
reg=bus_r(addr);
#ifdef VERBOSE
printf("Multipupose reg now:%d\n",reg);
printf("Multipupose reg now:%x\n",reg);
#endif
return result;
}
@ -594,6 +591,7 @@ u_int32_t testFpga(void) {
int result=OK;
//while (1) {
//fixed pattern
val=bus_r(FIX_PATT_REG);
if (val==FIXED_PATT_VAL) {
printf("fixed pattern ok!! %08x\n",val);
@ -1138,7 +1136,7 @@ int configureMAC(int ipad,long long int macad,long long int servermacad,int ival
tse_conf *tse_conf_regs;
long int sum = 0;
long int checksum;
int count,val,powerOn=0;
int count,val;
unsigned short *addr;
mac_conf_regs=(mac_conf*)(CSP0BASE+offset*2);
@ -1147,8 +1145,6 @@ int configureMAC(int ipad,long long int macad,long long int servermacad,int ival
#ifdef VERBOSE
printf("Configuring MAC\n");
#endif
powerOn=((bus_r(addrr)&CHANGE_AT_POWER_ON_BIT)>>CHANGE_AT_POWER_ON_OFFSET);
if(ival)
bus_w(addrr,(RESET_BIT|DIGITAL_TEST_BIT)); //0x080,reset mac (reset)
@ -1282,8 +1278,11 @@ int configureMAC(int ipad,long long int macad,long long int servermacad,int ival
mac_conf_regs->cdone = 0xFFFFFFFF;
bus_w(addrr,(INT_RSTN_BIT|ENET_RESETN_BIT|WRITE_BACK_BIT|(DIGITAL_TEST_BIT&ival))); //0x2840,write shadow regs..
if(ival)
bus_w(addrr,(INT_RSTN_BIT|ENET_RESETN_BIT|WRITE_BACK_BIT|DIGITAL_TEST_BIT)); //0x2840,write shadow regs..
else
bus_w(addrr,(INT_RSTN_BIT|ENET_RESETN_BIT|WRITE_BACK_BIT)); //0x2840,write shadow regs..
val=bus_r(addrr);
#ifdef VERBOSE
printf("Value read from Multi-purpose Reg:%x\n",val);
@ -1291,18 +1290,12 @@ int configureMAC(int ipad,long long int macad,long long int servermacad,int ival
// if(val!=0x2840) return -1;
usleep(100000);
if(powerOn){
if(ival)
bus_w(addrr,(INT_RSTN_BIT|ENET_RESETN_BIT|SW1_BIT|DIGITAL_TEST_BIT|CHANGE_AT_POWER_ON_BIT)); //0x2820,write shadow regs..
else
bus_w(addrr,(INT_RSTN_BIT|ENET_RESETN_BIT|SW1_BIT|CHANGE_AT_POWER_ON_BIT)); //0x2820,write shadow regs..
}
else {
if(ival)
bus_w(addrr,(INT_RSTN_BIT|ENET_RESETN_BIT|SW1_BIT|DIGITAL_TEST_BIT)); //0x2820,write shadow regs..
else
bus_w(addrr,(INT_RSTN_BIT|ENET_RESETN_BIT|SW1_BIT)); //0x2820,write shadow regs..
}
if(ival)
bus_w(addrr,(INT_RSTN_BIT|ENET_RESETN_BIT|SW1_BIT|DIGITAL_TEST_BIT)); //0x2820,write shadow regs..
else
bus_w(addrr,(INT_RSTN_BIT|ENET_RESETN_BIT|SW1_BIT)); //0x2820,write shadow regs..
val=bus_r(addrr);
#ifdef VERBOSE
printf("Value read from Multi-purpose Reg:%x\n",val);

1
slsDetectorSoftware/gotthardDetectorServer/mcb_funcs.c
View File

@ -89,7 +89,6 @@ int initDetector() {
sDac=noneSelected;
sAdc=noneSelected;
/*
setCSregister(ALLMOD); //commented out by dhanya
setSSregister(ALLMOD);

9
slsDetectorSoftware/gotthardDetectorServer/registers_g.h
View File

@ -13,8 +13,6 @@
#define MULTI_PURPOSE_REG 0x94<<11
#define DUMMY_REG 0x13<<11
#define FIX_PATT_REG 0x45<<11
#define FPGA_VERSION_REG 0x47<<11
#define CONTROL_REG 0x5d<<11
#define STATUS_REG 0x5e<<11
@ -98,7 +96,8 @@
#define SHIFTMOD 2
#define SHIFTFIFO 9
#define FIX_PATT_REG 0x96<<11
#define FPGA_VERSION_REG 0x95<<11
/* values defined for FPGA */
#define MCSNUM 0x0
@ -223,8 +222,8 @@
#define INT_RSTN_OFFSET 13
#define DIGITAL_TEST_BIT 0x00004000
#define DIGITAL_TEST_OFFSET 14
#define CHANGE_AT_POWER_ON_BIT 0x00008000
#define CHANGE_AT_POWER_ON_OFFSET 15
//#define CHANGE_AT_POWER_ON_BIT 0x00008000
//#define CHANGE_AT_POWER_ON_OFFSET 15
/* settings/conf gain register */

1
slsDetectorSoftware/gotthardDetectorServer/server_funcs.c
View File

@ -70,6 +70,7 @@ int init_detector( int b) {
if (b) {
initDetector();
printf("\ninitdetector done! \n");
testFpga();
setDummyRegister();
setPhaseShiftOnce();
setDAQRegister();

4
slsDetectorSoftware/slsDetector/slsDetector.cpp
View File

@ -6194,8 +6194,12 @@ string slsDetector::executeLine(int narg, char *args[], int action) {
}
/* DEBUGGING FUNCTIONS */
else if (var=="reg_rw") {
if(narg<2)
return string("\nError:Use gotthard_put i:reg_rw (address) (value in hex)OR gotthard_get i:reg_rw (address)");
sscanf(args[1],"%x",&ival);
if (action==PUT_ACTION) {
if(narg<3)
return string("\nError:Use gotthard_put i:reg_rw (address) (value in hex)OR gotthard_get i:reg_rw (address)");
sscanf(args[2],"%x",&ival2);
sprintf(answer,"%x",writeRegister(ival,ival2));
}