chipversion changed to chipversioninfpga, chipindex, vals and type introduced with string for 3 different types for chip v1.2 and 1.3.

This commit is contained in:
2026-07-27 15:38:58 +02:00
parent 54e4c46f02
commit 9e210f92fe
7 changed files with 360 additions and 66 deletions
@@ -366,8 +366,8 @@
#define DAQ_FIX_GAIN_STG_2_VAL ((0x3 << DAQ_FIX_GAIN_OFST) & DAQ_FIX_GAIN_MSK)
#define DAQ_CMP_RST_OFST (4)
#define DAQ_CMP_RST_MSK (0x00000001 << DAQ_CMP_RST_OFST)
#define DAQ_CHIP11_VRSN_OFST (7)
#define DAQ_CHIP11_VRSN_MSK (0x00000001 << DAQ_CHIP11_VRSN_OFST)
#define DAQ_CHIP_VRSN_OFST (5)
#define DAQ_CHIP_VRSN_MSK (0x00000007 << DAQ_CHIP_VRSN_OFST)
#define DAQ_STRG_CELL_SLCT_OFST (8)
#define DAQ_STRG_CELL_SLCT_MSK (0x0000000F << DAQ_STRG_CELL_SLCT_OFST)
#define DAQ_FRCE_SWTCH_GAIN_OFST (12)
@@ -1,4 +1,11 @@
#chip version version (multiplied by 10)
chipversion 11
#chip version version
#10 -> v1.0
#11 -> v1.1
#120 -> v1.2 Normal
#121 -> v1.2 Low Noise
#121 ->v1.2 HDR
#130 ->v1.3 Burst Mode
chipversion 120
@@ -46,6 +46,8 @@ int virtual_moduleid = 0;
#endif
enum detectorSettings thisSettings = UNINITIALIZED;
static enum CHIPINDEX chipIndex = v1_0;
static char chipType[SHORT_STR_LENGTH] = {0};
int highvoltage = 0;
int dacValues[NDAC] = {};
int defaultDacValues[] = DEFAULT_DAC_VALS;
@@ -319,23 +321,56 @@ int isHardwareVersion_1_0() {
return ((getHardwareVersionNumber() == hwNumberList[0]) ? 1 : 0);
}
int getChipVersion() {
// chip v1.1
if (bus_r(DAQ_REG) & DAQ_CHIP11_VRSN_MSK) {
return 11;
int getChipVersionInFPGA() {
const int vals[] = CHIP_VALS;
int val = ((bus_r(DAQ_REG) & DAQ_CHIP_VRSN_MSK) >> DAQ_CHIP_VRSN_OFST);
switch (val) {
case 0:
return vals[(int)v1_0];
case 1:
return vals[(int)v1_1];
case 2:
return vals[(int)v1_2_NORMAL];
default:
LOG(logERROR, ("Read undefined value as chip version from FPGA: %d\n", val));
return -1;
}
// chip v1.0
return 10;
}
void setChipVersion(int version) {
LOG(logINFO,
("Setting chip version to %0.1f in FPGA\n", (double)version / 10.0));
if (version == 11) {
bus_w(DAQ_REG, bus_r(DAQ_REG) | DAQ_CHIP11_VRSN_MSK);
} else {
bus_w(DAQ_REG, bus_r(DAQ_REG) & ~DAQ_CHIP11_VRSN_MSK);
void setChipIndex(enum CHIPINDEX ind) {
chipIndex = ind;
char* chip_names[] = {CHIP_NAMES};
memset(chipType, 0, sizeof(chipType));
strncpy(chipType, chip_names[(int)ind], sizeof(chipType) - 1);
setChipVersionInFPGA();
}
void setChipVersionInFPGA() {
int val = 0;
switch (chipIndex) {
case v1_0:
LOG(logINFO, ("Setting Chip Version 1.0 in FPGA\n"));
val = 0;
break;
case v1_1:
LOG(logINFO, ("Setting Chip Version 1.1 in FPGA\n"));
val = 1;
break;
case v1_2_NORMAL:
case v1_2_LOW_NOISE:
case v1_2_HDR:
LOG(logINFO, ("Setting Chip Version 1.1 in FPGA\n"));
val = 2;
break;
default:
LOG(logERROR, ("Unknown chip version %d\n", (int)chipIndex));
break;
}
bus_w(DAQ_REG, bus_r(DAQ_REG) & ~DAQ_CHIP_VRSN_MSK);
bus_w(DAQ_REG, bus_r(DAQ_REG) | ((val << DAQ_CHIP_VRSN_OFST) & DAQ_CHIP_VRSN_MSK));
}
u_int32_t getDetectorNumber() {
@@ -543,13 +578,19 @@ void setupDetector() {
setExpTime(DEFAULT_EXPTIME);
setPeriod(DEFAULT_PERIOD);
setDelayAfterTrigger(DEFAULT_DELAY);
if (getChipVersion() == 11) {
selectStoragecellStart(DEFAULT_STRG_CLL_STRT_CHIP11);
} else {
setNumAdditionalStorageCells(DEFAULT_NUM_STRG_CLLS);
selectStoragecellStart(DEFAULT_STRG_CLL_STRT);
// not applicable for chipv1.1
setStorageCellDelay(DEFAULT_STRG_CLL_DLY);
switch (chipIndex) {
case v1_0:
setNumAdditionalStorageCells(DEFAULT_NUM_STRG_CLLS);
selectStoragecellStart(DEFAULT_STRG_CLL_STRT);
// not applicable for chipv1.1
setStorageCellDelay(DEFAULT_STRG_CLL_DLY);
break;
case v1_1:
selectStoragecellStart(DEFAULT_STRG_CLL_STRT_CHIP11);
break;
default:
// TODO
break;
}
setTiming(DEFAULT_TIMING_MODE);
setNextFrameNumber(DEFAULT_STARTING_FRAME_NUMBER);
@@ -558,7 +599,7 @@ void setupDetector() {
setTemperatureControl(DEFAULT_TMP_CNTRL);
setThresholdTemperature(DEFAULT_TMP_THRSHLD);
setTemperatureEvent(0);
if (getChipVersion() == 11) {
if (chipIndex == v1_1) {
setFilterResistor(DEFAULT_FILTER_RESISTOR);
setNumberOfFilterCells(DEFAULT_FILTER_CELL);
}
@@ -791,10 +832,10 @@ int readConfigFile() {
// chipversion command
if (!strncmp(line, "chipversion", strlen("chipversion"))) {
int version = 0;
int val = 0;
// cannot scan values
if (sscanf(line, "%s %d", command, &version) != 2) {
if (sscanf(line, "%s %d", command, &val) != 2) {
sprintf(
initErrorMessage,
"Could not scan chipversion commands from on-board server "
@@ -803,23 +844,33 @@ int readConfigFile() {
break;
}
// validations
if (version != 10 && version != 11) {
const int vals[] = CHIP_VALS;
enum CHIPINDEX ichip = v1_0;
while (ichip != NUM_CHIP_INDICES) {
if (val == vals[(int)ichip]) {
break;
}
++ichip;
}
if (ichip == NUM_CHIP_INDICES) {
sprintf(initErrorMessage,
"Could not set chip version from on-board server "
"config file. Invalid chip version %d. Line:[%s].\n",
version, line);
break;
}
// chipversion 1.1 and HW 1.0 is incompatible
if (version == 11 && isHardwareVersion_1_0()) {
strcpy(initErrorMessage,
"Chip version 1.1 (from on-board config file) is "
"incompatible with hardware version v1.0. Please update "
"board or correct on-board config file.\n");
"config file. Invalid chip version %d. Options: %s. Line:[%s].\n",
val, CHIP_VALS_HELP, line);
break;
}
setChipVersion(version);
// chipversion > 1.0 and HW 1.0 is incompatible
if (ichip > v1_0 && isHardwareVersion_1_0()) {
char* chip_names[] = {CHIP_NAMES};
sprintf(initErrorMessage,
"Chip version %s (from on-board config file) is "
"incompatible with hardware version v1.0. Please update "
"board or correct on-board config file.\n", chip_names[(int)ichip]);
break;
}
setChipIndex(ichip);
}
// other commands
@@ -913,7 +964,7 @@ int selectStoragecellStart(int pos) {
uint32_t addr = DAQ_REG;
uint32_t mask = DAQ_STRG_CELL_SLCT_MSK;
int offset = DAQ_STRG_CELL_SLCT_OFST;
if (getChipVersion() == 11) {
if (chipIndex== v1_1) {
// set the bit
value = 1 << pos;
addr = CONFIG_V11_REG;
@@ -926,7 +977,7 @@ int selectStoragecellStart(int pos) {
bus_w(addr, bus_r(addr) | ((value << offset) & mask));
// should not do a get to verify (status register does not update
// immediately during acquisition)
if (getChipVersion() == 11) {
if (chipIndex == v1_1) {
return pos;
}
}
@@ -934,7 +985,7 @@ int selectStoragecellStart(int pos) {
// read value back
// chipv1.1, writing and reading registers are different
#ifndef VIRTUAL
if (getChipVersion() == 11) {
if (chipIndex == v1_1) {
addr = CONFIG_V11_STATUS_REG;
mask = CONFIG_V11_STATUS_STRG_CLL_MSK;
offset = CONFIG_V11_STATUS_STRG_CLL_OFST;
@@ -943,12 +994,12 @@ int selectStoragecellStart(int pos) {
uint32_t regval = bus_r(addr);
#ifndef VIRTUAL
// flip all contents of register //TODO FIRMWARE FIX
if (getChipVersion() == 11) {
if (chipIndex == v1_1) {
regval ^= BIT32_MASK;
}
#endif
uint32_t retval = ((regval & mask) >> offset);
if (getChipVersion() == 11) {
if (chipIndex == v1_1) {
// get which bit
int max = getMaxStoragecellStart();
for (int i = 0; i != max + 1; ++i) {
@@ -962,7 +1013,7 @@ int selectStoragecellStart(int pos) {
}
int getMaxStoragecellStart() {
if (getChipVersion() == 11) {
if (chipIndex == v1_1) {
return MAX_STORAGE_CELL_CHIP11_VAL;
} else {
return MAX_STORAGE_CELL_VAL;
@@ -1933,7 +1984,7 @@ int isChipConfigured() { return chipConfigured; }
void configureChip() {
// only for chipv1.1 and chip is powered on
if (getChipVersion() == 11 && powerChip(-1)) {
if (chipIndex == v1_1 && powerChip(-1)) {
LOG(logINFOBLUE, ("\tConfiguring chip\n"));
// waiting 500 ms before configuring selection
@@ -2001,7 +2052,7 @@ void configureASICTimer() {
ASIC_CTRL_PRCHRG_TMR_VAL);
uint32_t val = ASIC_CTRL_DS_TMR_VAL;
if (getChipVersion() == 11) {
if (chipIndex == v1_1) {
val = ASIC_CTRL_DS_TMR_CHIP1_1_VAL;
}
bus_w(ASIC_CTRL_REG, (bus_r(ASIC_CTRL_REG) & ~ASIC_CTRL_DS_TMR_MSK) | val);
@@ -2028,7 +2079,7 @@ int setReadoutSpeed(int val) {
return FAIL;
}
LOG(logINFO, ("Setting Full Speed (40 MHz):\n"));
if (getChipVersion() == 10) {
if (chipIndex == v1_0) {
sampleAdcSpeed = SAMPLE_ADC_FULL_SPEED_CHIP10;
adcPhase = ADC_PHASE_FULL_SPEED_CHIP10;
dbitPhase = DBIT_PHASE_FULL_SPEED_CHIP10;
@@ -2049,7 +2100,7 @@ int setReadoutSpeed(int val) {
sampleAdcSpeed = SAMPLE_ADC_HALF_SPEED_BOARD2;
adcPhase = ADC_PHASE_HALF_SPEED_BOARD2;
dbitPhase = DBIT_PHASE_HALF_SPEED_BOARD2;
} else if (getChipVersion() == 10) {
} else if (chipIndex == v1_0) {
adcOfst = ADC_OFST_HALF_SPEED_VAL_CHIP10;
sampleAdcSpeed = SAMPLE_ADC_HALF_SPEED_CHIP10;
adcPhase = ADC_PHASE_HALF_SPEED_CHIP10;
@@ -2070,7 +2121,7 @@ int setReadoutSpeed(int val) {
sampleAdcSpeed = SAMPLE_ADC_QUARTER_SPEED_BOARD2;
adcPhase = ADC_PHASE_QUARTER_SPEED_BOARD2;
dbitPhase = DBIT_PHASE_QUARTER_SPEED_BOARD2;
} else if (getChipVersion() == 10) {
} else if (chipIndex == v1_0) {
adcOfst = ADC_OFST_QUARTER_SPEED_VAL_CHIP10;
sampleAdcSpeed = SAMPLE_ADC_QUARTER_SPEED_CHIP10;
adcPhase = ADC_PHASE_QUARTER_SPEED_CHIP10;
@@ -2416,7 +2467,7 @@ void disableCurrentSource() {
LOG(logINFO, ("Disabling Current Source\n"));
// set default values for current source first
if (getChipVersion() == 11) {
if (chipIndex == v1_1) {
LOG(logINFO, ("\tSetting default values for selection\n"))
bus_w(CRRNT_SRC_COL_LSB_REG, BIT32_MASK);
bus_w(CRRNT_SRC_COL_MSB_REG, BIT32_MASK);
@@ -2431,7 +2482,7 @@ void disableCurrentSource() {
void enableCurrentSource(int fix, uint64_t select, int normal) {
disableCurrentSource();
if (getChipVersion() == 11) {
if (chipIndex == v1_1) {
LOG(logINFO, ("Enabling current source [fix:%d, select:0x%lx]\n", fix,
(long unsigned int)select));
} else {
@@ -2447,7 +2498,7 @@ void enableCurrentSource(int fix, uint64_t select, int normal) {
LOG(logINFO, ("\tDisabling fix\n"));
bus_w(DAQ_REG, bus_r(DAQ_REG) & ~DAQ_CRRNT_SRC_CLMN_FIX_MSK);
}
if (getChipVersion() == 10) {
if (chipIndex == v1_0) {
// select
LOG(logINFO, ("\tSetting selection to %ld\n", (long int)select));
bus_w(DAQ_REG, bus_r(DAQ_REG) & ~DAQ_CRRNT_SRC_CLMN_SLCT_MSK);
@@ -2508,7 +2559,7 @@ int getFixCurrentSource() {
}
int getNormalCurrentSource() {
if (getChipVersion() == 11) {
if (chipIndex == v1_1) {
int low = ((bus_r(CONFIG_V11_STATUS_REG) &
CONFIG_V11_STATUS_CRRNT_SRC_LOW_MSK) >>
CONFIG_V11_STATUS_CRRNT_SRC_LOW_OFST);
@@ -2518,7 +2569,7 @@ int getNormalCurrentSource() {
}
uint64_t getSelectCurrentSource() {
if (getChipVersion() == 10) {
if (chipIndex == v1_0) {
return ((bus_r(DAQ_REG) & DAQ_CRRNT_SRC_CLMN_SLCT_MSK) >>
DAQ_CRRNT_SRC_CLMN_SLCT_OFST);
} else {
@@ -0,0 +1,230 @@
// SPDX-License-Identifier: LGPL-3.0-or-other
// Copyright (C) 2021 Contributors to the SLS Detector Package
#include "sls/sls_detector_defs.h"
#include "slsDetectorServer_defs.h" // DAC_INDEX, ADC_INDEX, also include RegisterDefs.h
#include "AD9257.h" // commonServerFunctions.h, blackfin.h, ansi.h
#include "blackfin.h"
#include "programViaBlackfin.h"
#include <stdbool.h>
#include <stdio.h> // FILE
#include <stdlib.h>
#include <sys/types.h>
/****************************************************
This functions are used by the slsDetectroServer_funcs interface.
Here are the definitions, but the actual implementation should be done for each
single detector.
****************************************************/
enum interfaceType { OUTER, INNER };
typedef struct udpStruct_s {
uint16_t srcport;
uint16_t srcport2;
uint16_t dstport;
uint16_t dstport2;
uint64_t srcmac;
uint64_t srcmac2;
uint64_t dstmac;
uint64_t dstmac2;
uint32_t srcip;
uint32_t srcip2;
uint32_t dstip;
uint32_t dstip2;
} udpStruct;
#define MAC_ADDRESS_SIZE 18
// basic tests
int isInitCheckDone();
int getInitResult(char **mess);
void basictests();
int checkType();
int testFpga();
int testBus();
#if defined(VIRTUAL)
void setTestImageMode(int ival);
int getTestImageMode();
#endif
// Ids
void getServerVersion(char *version);
u_int64_t getFirmwareVersion();
u_int64_t getFirmwareAPIVersion();
void getHardwareVersion(char *version);
u_int16_t getHardwareVersionNumber();
u_int16_t getHardwareSerialNumber();
int isHardwareVersion_1_0();
int getChipVersionInFPGA();
void setChipIndex(enum CHIPINDEX ind);
void setChipVersionInFPGA();
u_int32_t getDetectorNumber();
int getModuleId(int *ret, char *mess);
int updateModuleId();
void setModuleId(int modid);
u_int64_t getDetectorMAC();
u_int32_t getDetectorIP();
// initialization
void initControlServer();
void initStopServer();
// set up detector
void setupDetector();
int resetToDefaultDacs(int hardReset, char *mess);
int getDefaultDac(enum DACINDEX index, enum detectorSettings sett, int *retval);
int setDefaultDac(enum DACINDEX index, enum detectorSettings sett, int value);
int readConfigFile();
// firmware functions (resets)
void cleanFifos();
void resetCore();
void resetPeripheral();
// parameters - dr, roi
int setDynamicRange(int dr);
int getDynamicRange(int *retval);
void setADCInvertRegister(uint32_t val);
uint32_t getADCInvertRegister();
// parameters - timer
int selectStoragecellStart(int pos);
int getMaxStoragecellStart();
int setNextFrameNumber(uint64_t value);
int getNextFrameNumber(uint64_t *value);
void setNumFrames(int64_t val);
int64_t getNumFrames();
void setNumTriggers(int64_t val);
int64_t getNumTriggers();
int setExpTime(int64_t val);
int64_t getExpTime();
int setPeriod(int64_t val);
int64_t getPeriod();
void setNumAdditionalStorageCells(int val);
int getNumAdditionalStorageCells();
int setStorageCellDelay(int64_t val);
int64_t getStorageCellDelay();
int64_t getNumFramesLeft();
int64_t getNumTriggersLeft();
int setDelayAfterTrigger(int64_t val);
int64_t getDelayAfterTrigger();
int64_t getDelayAfterTriggerLeft();
int64_t getPeriodLeft();
int64_t getFramesFromStart();
int64_t getActualTime();
int64_t getMeasurementTime();
// parameters - module, settings
int setModule(sls_detector_module myMod, char *mess);
int setSettings(enum detectorSettings sett, char *mess);
enum detectorSettings getSettings();
enum gainMode getGainMode();
void setGainMode(enum gainMode mode);
// parameters - dac, adc, hv
int validateDACIndex(enum DACINDEX ind, char *mess);
int validateDACVoltage(enum DACINDEX ind, int voltage, char *mess);
int convertVoltageToDACValue(enum DACINDEX ind, int voltage, int *retval_dacval,
char *mess);
int convertDACValueToVoltage(enum DACINDEX ind, int dacval, int *retval_voltage,
char *mess);
int getDAC(enum DACINDEX ind, bool mV, int *retval, char *mess);
/** @param val value can be in mV or dac units */
int setDAC(enum DACINDEX ind, int val, bool mV, char *mess);
int getADC(enum ADCINDEX ind);
int setHighVoltage(int val, char *mess);
int getHighVoltage(int *retval, char *mess);
// parameters - timing, extsig
int setMaster(enum MASTERINDEX m);
int isMaster(int *retval);
int getSynchronization();
void setSynchronization(int enable);
void setTiming(enum timingMode arg);
enum timingMode getTiming();
// configure mac
void setNumberofUDPInterfaces(int val);
int getNumberofUDPInterfaces();
int getNumberofDestinations(int *retval);
int setNumberofDestinations(int value);
int getFirstUDPDestination();
void setFirstUDPDestination(int value);
void selectPrimaryInterface(int val);
int getPrimaryInterface();
void setupHeader(int iRxEntry, enum interfaceType type, uint32_t destip,
uint64_t destmac, uint16_t destport, uint64_t sourcemac,
uint32_t sourceip, uint16_t sourceport);
void calcChecksum(udp_header *udp);
int configureMAC();
int setDetectorPosition(int pos[]);
int *getDetectorPosition();
// very detector specific
int setReadNRows(int value);
int getReadNRows();
void initReadoutConfiguration();
int powerChip(int on);
int isChipConfigured();
void configureChip();
int autoCompDisable(int on);
int setComparatorDisableTime(int64_t val);
int64_t getComparatorDisableTime();
void configureASICTimer();
int setReadoutSpeed(int val);
int getReadoutSpeed(int *retval);
int setPhase(enum CLKINDEX ind, int val, int degrees);
int getPhase(enum CLKINDEX ind, int degrees);
int getMaxPhase(enum CLKINDEX ind);
int validatePhaseinDegrees(enum CLKINDEX ind, int val, int retval);
int setThresholdTemperature(int val);
int setTemperatureControl(int val);
int setTemperatureEvent(int val);
void alignDeserializer();
int getFlipRows();
void setFlipRows(int arg);
int setFilterResistor(int value);
int getFilterResistor();
int getNumberOfFilterCells();
void setNumberOfFilterCells(int iCell);
void disableCurrentSource();
void enableCurrentSource(int fix, uint64_t select, int normal);
int getCurrentSource();
int getFixCurrentSource();
int getNormalCurrentSource();
uint64_t getSelectCurrentSource();
int getPedestalMode();
void getPedestalParameters(uint8_t *frames, uint16_t *loops);
void setPedestalMode(int enable, uint8_t frames, uint16_t loops);
int setTimingInfoDecoder(enum timingInfoDecoder val);
int getTimingInfoDecoder(enum timingInfoDecoder *retval);
int getElectronCollectionMode();
void setElectronCollectionMode(int enable);
int getTenGigaFlowControl();
int setTenGigaFlowControl(int value);
int getTransmissionDelayFrame();
int setTransmissionDelayFrame(int value);
// aquisition
int startStateMachine();
#ifdef VIRTUAL
void *start_timer(void *arg);
#endif
int stopStateMachine();
int softwareTrigger(int block);
enum runStatus getRunStatus();
void waitForAcquisitionEnd();
u_int32_t runBusy();
// common
int calculateDataBytes();
int getTotalNumberOfChannels();
int getNumberOfChips();
int getNumberOfDACs();
int getNumberOfChannelsPerChip();
@@ -211,6 +211,12 @@ enum DACINDEX {
420 /* J_VREF_COMP */ \
};
enum CHIPINDEX {v1_0, v1_1, v1_2_NORMAL, v1_2_LOW_NOISE, v1_2_HDR, v1_3_BURST_MODE, NUM_CHIP_INDICES};
#define CHIP_VALS { 10, 11, 120, 121, 122, 13};
#define CHIP_VALS_HELP "10, 11, 120, 121, 122, 13"
#define CHIP_NAMES "v1.0", "v1.1", "v1.2 Normal", "v1.2 Low Noise", "v1.2 HDR", "v1.3 Burst Mode"
enum MASTERINDEX { MASTER_HARDWARE, OW_MASTER, OW_SLAVE };
#define MASTER_NAMES "hardware", "master", "slave"
@@ -1950,7 +1950,7 @@ int acquire(int blocking, int file_des) {
#endif
#if defined(JUNGFRAUD)
// chipv1.1 has to be configured before acquisition
if (getChipVersion() == 11 && !isChipConfigured()) {
if (getChipVersionInFPGA() == 11 && !isChipConfigured()) {
ret = FAIL;
strcpy(mess,
"Could not start acquisition. Chip is not configured. "
@@ -2372,7 +2372,7 @@ int set_num_additional_storage_cells(int file_des) {
#else
// only set
if (Server_VerifyLock() == OK) {
if (getChipVersion() == 11) {
if (getChipVersionInFPGA() == 11) {
ret = FAIL;
sprintf(mess,
"Cannot set addl. number of storage cells for chip v1.1\n");
@@ -2816,7 +2816,7 @@ int get_storage_cell_delay(int file_des) {
functionNotImplemented();
#else
// get only
if (getChipVersion() == 11) {
if (getChipVersionInFPGA() == 11) {
ret = FAIL;
strcpy(mess, "Storage cell delay is not applicable for chipv 1.1\n");
LOG(logERROR, (mess));
@@ -2844,7 +2844,7 @@ int set_storage_cell_delay(int file_des) {
#else
// only set
if (Server_VerifyLock() == OK) {
if (getChipVersion() == 11) {
if (getChipVersionInFPGA() == 11) {
ret = FAIL;
strcpy(mess,
"Storage cell delay is not applicable for chipv 1.1\n");
@@ -6819,7 +6819,7 @@ int set_current_source(int file_des) {
LOG(logERROR, (mess));
}
#else
int chipVersion = getChipVersion();
int chipVersion = getChipVersionInFPGA();
if (ret == OK) {
if (chipVersion == 11) {
// require both
@@ -7974,7 +7974,7 @@ int get_filter_resistor(int file_des) {
#else
// get only
#if defined(JUNGFRAUD)
if (getChipVersion() == 10) {
if (getChipVersionInFPGA() == 10) {
ret = FAIL;
strcpy(mess, "Could not get filter cell. Not available for this chip "
"version 1.0.\n");
@@ -8013,7 +8013,7 @@ int set_filter_resistor(int file_des) {
LOG(logERROR, (mess));
}
#if defined(JUNGFRAUD)
else if (getChipVersion() == 10) {
else if (getChipVersionInFPGA() == 10) {
ret = FAIL;
strcpy(mess, "Could not set filter cell. Not available for this "
"chip version 1.0.\n");
@@ -8757,7 +8757,7 @@ int get_chip_version(int file_des) {
#if !defined(JUNGFRAUD)
functionNotImplemented();
#else
retval = getChipVersion();
retval = getChipVersionInFPGA();
#endif
LOG(logDEBUG1, ("chip version retval: %d\n", retval));
return Server_SendResult(file_des, INT32, &retval, sizeof(retval));
@@ -9038,7 +9038,7 @@ int get_num_filter_cells(int file_des) {
#else
// get only
// only for chipv1.1
if (getChipVersion() == 10) {
if (getChipVersionInFPGA() == 10) {
ret = FAIL;
strcpy(mess, "Could not get number of filter cells. Only available for "
"chip version 1.1\n");
@@ -9076,7 +9076,7 @@ int set_num_filter_cells(int file_des) {
LOG(logERROR, (mess));
}
// only for chipv1.1
else if (getChipVersion() == 10) {
else if (getChipVersionInFPGA() == 10) {
ret = FAIL;
strcpy(mess,
"Could not set number of filter cells. Only available for "
+1 -1
View File
@@ -1989,7 +1989,7 @@ rx_threads:
chipversion:
inherit_actions: GET_COMMAND
help: "\n\t[Jungfrau] Returns chip version. Can be 1.0 or 1.1"
help: "\n\t[Jungfrau] Returns chip version. Can be 1.0, 1.1 or 1.2"
actions:
GET:
function: getChipVersion