updated calibration settings for jungfrau, default special dac values for high gain 0, temporary fix for firmwarebug (config_V11_status has to be flipped to be read)

This commit is contained in:
2021-10-20 17:20:09 +02:00
parent ae736cd0e5
commit 9dc217aaa3
4 changed files with 32 additions and 12 deletions

View File

@ -73,7 +73,7 @@ enum DACINDEX {
#define SPECIAL_DEFAULT_DYNAMIC_GAIN_VALS \
{ 1450, 480, 420 }
#define SPECIAL_DEFAULT_DYNAMICHG0_GAIN_VALS \
{ 1450, 480, 420 }
{ 1550, 450, 620 }
enum NETWORKINDEX { TXN_FRAME, FLOWCTRL_10G };
enum CLKINDEX { RUN_CLK, ADC_CLK, DBIT_CLK, NUM_CLOCKS };
@ -154,7 +154,7 @@ enum CLKINDEX { RUN_CLK, ADC_CLK, DBIT_CLK, NUM_CLOCKS };
#define ADC_PHASE_HALF_SPEED_CHIP11 (160)
#define ADC_PHASE_QUARTER_SPEED_CHIP11 (160)
#define DBIT_PHASE_FULL_SPEED_CHIP11 (75)
#define DBIT_PHASE_FULL_SPEED_CHIP11 (80)
#define DBIT_PHASE_HALF_SPEED_CHIP11 (135)
#define DBIT_PHASE_QUARTER_SPEED_CHIP11 (135)
@ -177,9 +177,9 @@ enum CLKINDEX { RUN_CLK, ADC_CLK, DBIT_CLK, NUM_CLOCKS };
#define ADC_PHASE_HALF_SPEED_CHIP10 (160)
#define ADC_PHASE_QUARTER_SPEED_CHIP10 (160)
#define DBIT_PHASE_FULL_SPEED_CHIP10 (100)
#define DBIT_PHASE_HALF_SPEED_CHIP10 (150)
#define DBIT_PHASE_QUARTER_SPEED_CHIP10 (150)
#define DBIT_PHASE_FULL_SPEED_CHIP10 (125)
#define DBIT_PHASE_HALF_SPEED_CHIP10 (175)
#define DBIT_PHASE_QUARTER_SPEED_CHIP10 (175)
#define ADC_OFST_FULL_SPEED_VAL_CHIP10 (0x10)
#define ADC_OFST_HALF_SPEED_VAL_CHIP10 (0x08)