mirror of
https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2025-05-08 05:40:03 +02:00
gotthard server done editing
This commit is contained in:
parent
a99584a0da
commit
91dd176a0f
@ -15,8 +15,11 @@
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#include <time.h>
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#endif
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// Global variable from slsDetectorServer
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// Global variable from slsDetectorServer_funcs
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extern int debugflag;
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// Global variable from communication_funcs.c
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extern int isControlServer;
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int firmware_compatibility = OK;
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@ -93,7 +96,7 @@ int getFirmwareCheckResult(char** mess) {
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return firmware_compatibility;
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}
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void checkFirmwareCompatibility() {
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void basictests() {
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firmware_compatibility = OK;
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firmware_check_done = 0;
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memset(firmware_message, 0, MAX_STR_LENGTH);
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@ -1231,7 +1234,7 @@ int configureMAC(uint32_t destip, uint64_t destmac, uint64_t sourcemac, uint32_t
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Beb_SetUpUDPHeader(beb_num,send_to_ten_gig,header_number+i,dst_mac,dst_ip, dst_port)) {
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FILE_LOG(logDEBUG1, ("\tset up left ok\n"));
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} else {
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return -1;
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return FAIL;
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}
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/*}*/
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@ -1246,7 +1249,7 @@ int configureMAC(uint32_t destip, uint64_t destmac, uint64_t sourcemac, uint32_t
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Beb_SetUpUDPHeader(beb_num,send_to_ten_gig,header_number+i,dst_mac,dst_ip, dst_port)) {
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FILE_LOG(logDEBUG1, (" set up right ok\n"));
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} else {
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return -1;
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return FAIL;
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}
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/*}*/
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@ -1255,7 +1258,7 @@ int configureMAC(uint32_t destip, uint64_t destmac, uint64_t sourcemac, uint32_t
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for(i=0;i<32;i++) dst_requested[i] = 0; //clear dst requested
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nimages_per_request=eiger_nexposures * eiger_ncycles;
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#endif
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return 0;
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return OK;
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}
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@ -1,19 +1,18 @@
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CROSS = bfin-uclinux-
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CC = $(CROSS)gcc
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CROSS = bfin-uclinux-
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CC = $(CROSS)gcc
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CFLAGS += -Wall -DGOTTHARDD -DDEBUG # -DVERBOSE #-DVERYVERBOSE #-DVIRTUAL
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CFLAGS += -Wall -DGOTTHARDD -DSTOP_SERVER # -DVERBOSE
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LDLIBS += -lm -lstdc++
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PROGS= gotthardDetectorServer
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INSTDIR= /tftpboot
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INSTMODE= 0777
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PROGS = gotthardDetectorServer
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DESTDIR ?= bin
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INSTMODE = 0777
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SRCS = communication_funcs.c slsDetectorServer.c slsDetectorServer_funcs.c slsDetectorFunctionList.c
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OBJS = $(SRCS:%.c=%.o)
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BINS = testlib_sharedlibc
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SRCS = server.c firmware_funcs.c server_funcs.c communication_funcs.c
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OBJS = $(SRCS:%.c=%.o)
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all: clean versioning $(PROGS)
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all: clean versioning $(PROGS)
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boot: $(OBJS)
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@ -21,21 +20,14 @@ versioning:
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@echo `tput setaf 6; ./updateGitVersion.sh; tput sgr0;`
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$(PROGS): $(OBJS)
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echo $(OBJS)
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$(CC) $(CFLAGS) -o $@ $^ $(LDLIBS_$@) $(LDFLAGS_$@)
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rm gotthardDetectorServer.gdb
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install: $(PROGS)
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$(INSTALL) -d $(INSTDIR)
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$(INSTALL) -m $(INSTMODE) $(PROGS) $(INSTDIR)
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romfs:
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$(ROMFSINST) /bin/$(PROGS)
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# echo $(OBJS)
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mkdir -p $(DESTDIR)
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$(CC) -o $@ $^ $(CFLAGS) $(LDLIBS)
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mv $(PROGS) $(DESTDIR)
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rm *.gdb
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clean:
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rm -rf $(PROGS) *.o *.gdb
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rm -rf $(DESTDIR)/$(PROGS) *.o *.gdb
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@ -1,30 +1,27 @@
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CC = gcc
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CFLAGS += -Wall -DGOTTHARDD -DVIRTUAL -DSTOP_SERVER #-DVERBOSEI #-DVERBOSE
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LDLIBS += -lm -lstdc++ -pthread
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DESTDIR ?= ./
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PROGS = gotthardDetectorServer_virtual
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DESTDIR ?= bin
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INSTMODE = 0777
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CC = gcc
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CFLAGS += -Wall -DGOTTHARDD -DVIRTUAL
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PROGS= $(DESTDIR)/gotthardDetectorServer_virtual
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SRCS = server.c server_funcs.c communication_funcs.c firmware_funcs.c
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OBJS = $(SRCS:%.c=%.o)
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gotthardVirtualServer = $(PROGS)
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all: clean $(PROGS)
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SRC_CLNT = communication_funcs.c slsDetectorServer.c slsDetectorServer_funcs.c slsDetectorFunctionList.c
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OBJS = $(SRC_CLNT:.c=.o)
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all: clean versioning $(PROGS)
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boot: $(OBJS)
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versioning:
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@echo `tput setaf 6; ./updateGitVersion.sh; tput sgr0;`
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$(PROGS): $(OBJS)
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$(CC) $(CFLAGS) -o $@ $^ $(LDLIBS_$@) $(LDFLAGS_$@)
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# echo $(OBJS)
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mkdir -p $(DESTDIR)
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$(CC) -o $@ $^ $(CFLAGS) $(LDLIBS)
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mv $(PROGS) $(DESTDIR)
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clean:
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rm -rf $(PROGS) *.o *.gdb
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rm -rf $(DESTDIR)/$(PROGS) *.o
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328
slsDetectorServers/gotthardDetectorServer/RegisterDefs.h
Executable file
328
slsDetectorServers/gotthardDetectorServer/RegisterDefs.h
Executable file
@ -0,0 +1,328 @@
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#pragma once
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/* Definitions for FPGA*/
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#define MEM_MAP_SHIFT 11
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/** Gain register */
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#define GAIN_REG (0x10 << MEM_MAP_SHIFT)
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#define GAIN_CONFGAIN_OFST (0)
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#define GAIN_CONFGAIN_MSK (0x000000FF << GAIN_CONFGAIN_OFST)
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#define GAIN_CONFGAIN_HGH_GAIN_VAL ((0x0 << GAIN_CONFGAIN_OFST) & GAIN_CONFGAIN_MSK)
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#define GAIN_CONFGAIN_DYNMC_GAIN_VAL ((0x8 << GAIN_CONFGAIN_OFST) & GAIN_CONFGAIN_MSK)
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#define GAIN_CONFGAIN_LW_GAIN_VAL ((0x6 << GAIN_CONFGAIN_OFST) & GAIN_CONFGAIN_MSK)
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#define GAIN_CONFGAIN_MDM_GAIN_VAL ((0x2 << GAIN_CONFGAIN_OFST) & GAIN_CONFGAIN_MSK)
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#define GAIN_CONFGAIN_VRY_HGH_GAIN_VAL ((0x1 << GAIN_CONFGAIN_OFST) & GAIN_CONFGAIN_MSK)
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/** Multi Purpose register */
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#define MULTI_PURPOSE_REG (0x14 << MEM_MAP_SHIFT)
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#define PHS_STP_OFST (0)
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#define PHS_STP_MSK (0x00000001 << PHS_STP_OFST)
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#define RST_CNTR_OFST (2)
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#define RST_CNTR_MSK (0x00000001 << RST_CNTR_OFST)
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#define SW1_OFST (5)
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#define SW1_MSK (0x00000001 << SW1_OFST)
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#define WRT_BCK_OFST (6)
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#define WRT_BCK_MSK (0x00000001 << WRT_BCK_OFST)
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#define RST_OFST (7)
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#define RST_MSK (0x00000001 << RST_OFST)
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#define PLL_CLK_SL_OFST (8)
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#define PLL_CLK_SL_MSK (0x00000007 << PLL_CLK_SL_OFST)
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#define PLL_CLK_SL_MSTR_VAL ((0x1 << PLL_CLK_SL_OFST) & PLL_CLK_SL_MSK)
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#define PLL_CLK_SL_MSTR_ADC_VAL ((0x2 << PLL_CLK_SL_OFST) & PLL_CLK_SL_MSK)
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#define PLL_CLK_SL_SLV_VAL ((0x3 << PLL_CLK_SL_OFST) & PLL_CLK_SL_MSK)
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#define PLL_CLK_SL_SLV_ADC_VAL ((0x4 << PLL_CLK_SL_OFST) & PLL_CLK_SL_MSK)
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#define ENT_RSTN_OFST (11)
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#define ENT_RSTN_MSK (0x00000001 << ENT_RSTN_OFST)
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#define INT_RSTN_OFST (12)
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#define INT_RSTN_MSK (0x00000001 << INT_RSTN_OFST)
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#define DGTL_TST_OFST (14)
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#define DGTL_TST_MSK (0x00000001 << DGTL_TST_OFST)
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#define CHNG_AT_PWR_ON_OFST (15) // Not used in SW
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#define CHNG_AT_PWR_ON_MSK (0x00000001 << CHNG_AT_PWR_ON_OFST) // Not used in SW
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#define RST_TO_SW1_DLY_OFST (16)
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#define RST_TO_SW1_DLY_MSK (0x0000000F << RST_TO_SW1_DLY_OFST)
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#define STRT_ACQ_DLY_OFST (20)
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#define STRT_ACQ_DLY_MSK (0x0000000F << STRT_ACQ_DLY_OFST)
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/** DAQ register */
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#define DAQ_REG (0x15 << MEM_MAP_SHIFT)
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#define DAQ_TKN_TMNG_OFST (0)
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#define DAQ_TKN_TMNG_MSK (0x0000FFFF << DAQ_TKN_TMNG_OFST)
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#define DAQ_TKN_TMNG_BRD_RVSN_1_VAL ((0x1f16 << DAQ_TKN_TMNG_OFST) & DAQ_TKN_TMNG_MSK)
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#define DAQ_TKN_TMNG_BRD_RVSN_2_VAL ((0x1f0f << DAQ_TKN_TMNG_OFST) & DAQ_TKN_TMNG_MSK)
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#define DAQ_PCKT_LNGTH_OFST (16)
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#define DAQ_PCKT_LNGTH_MSK (0x0000FFFF << DAQ_PCKT_LNGTH_OFST)
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#define DAQ_PCKT_LNGTH_NO_ROI_VAL ((0x0013f << DAQ_PCKT_LNGTH_OFST) & DAQ_PCKT_LNGTH_MSK)
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#define DAQ_PCKT_LNGTH_ROI_VAL ((0x0007f << DAQ_PCKT_LNGTH_OFST) & DAQ_PCKT_LNGTH_MSK)
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/** DAC Control register */
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#define DAC_CNTRL_REG (0x17 << MEM_MAP_SHIFT)
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#define DAC_CNTRL_CS_OFST (0)
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#define DAC_CNTRL_CS_MSK (0x00000001 << DAC_CNTRL_CS_OFST)
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#define DAC_CNTRL_CLK_OFST (1)
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#define DAC_CNTRL_CLK_MSK (0x00000001 << DAC_CNTRL_CLK_OFST)
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#define DAQ_CNTRL_DGTL_OFST (2)
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#define DAQ_CNTRL_DGTL_MSK (0x00000001 << DAQ_CNTRL_DGTL_OFST)
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/** ADC SPI register */
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#define ADC_SPI_REG (0x18 << MEM_MAP_SHIFT)
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#define ADC_SERIAL_CLK_OUT_OFST (0)
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#define ADC_SERIAL_CLK_OUT_MSK (0x00000001 << ADC_SERIAL_CLK_OUT_OFST)
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#define ADC_SERIAL_DATA_OUT_OFST (1)
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#define ADC_SERIAL_DATA_OUT_MSK (0x00000001 << ADC_SERIAL_DATA_OUT_OFST)
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#define ADC_SERIAL_CS_OUT_OFST (2)
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#define ADC_SERIAL_CS_OUT_MSK (0x0000000F << ADC_SERIAL_CS_OUT_OFST)
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/** ADC Sync register */
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#define ADC_SYNC_REG (0x19 << MEM_MAP_SHIFT)
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#define ADC_SYNC_ENET_STRT_DLY_OFST (0)
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#define ADC_SYNC_ENET_STRT_DLY_MSK (0x0000000F << ADC_SYNC_ENET_STRT_DLY_OFST)
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#define ADC_SYNC_ENET_STRT_DLY_VAL ((0x4 << ADC_SYNC_ENET_STRT_DLY_OFST) & ADC_SYNC_ENET_STRT_DLY_MSK)
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#define ADC_SYNC_TKN1_HGH_DLY_OFST (4)
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#define ADC_SYNC_TKN1_HGH_DLY_MSK (0x0000000F << ADC_SYNC_TKN1_HGH_DLY_OFST)
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#define ADC_SYNC_TKN1_HGH_DLY_VAL ((0x1 << ADC_SYNC_TKN1_HGH_DLY_OFST) & ADC_SYNC_TKN1_HGH_DLY_MSK)
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#define ADC_SYNC_TKN2_HGH_DLY_OFST (8)
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#define ADC_SYNC_TKN2_HGH_DLY_MSK (0x0000000F << ADC_SYNC_TKN2_HGH_DLY_OFST)
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#define ADC_SYNC_TKN2_HGH_DLY_VAL ((0x2 << ADC_SYNC_TKN2_HGH_DLY_OFST) & ADC_SYNC_TKN2_HGH_DLY_MSK)
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#define ADC_SYNC_TKN1_LOW_DLY_OFST (12)
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#define ADC_SYNC_TKN1_LOW_DLY_MSK (0x0000000F << ADC_SYNC_TKN1_LOW_DLY_OFST)
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#define ADC_SYNC_TKN1_LOW_DLY_VAL ((0x2 << ADC_SYNC_TKN1_LOW_DLY_OFST) & ADC_SYNC_TKN1_LOW_DLY_MSK)
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#define ADC_SYNC_TKN2_LOW_DLY_OFST (16)
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#define ADC_SYNC_TKN2_LOW_DLY_MSK (0x0000000F << ADC_SYNC_TKN2_LOW_DLY_OFST)
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#define ADC_SYNC_TKN2_LOW_DLY_VAL ((0x3 << ADC_SYNC_TKN2_LOW_DLY_OFST) & ADC_SYNC_TKN2_LOW_DLY_MSK)
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//0x32214
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#define ADC_SYNC_TKN_VAL (ADC_SYNC_ENET_STRT_DLY_VAL | ADC_SYNC_TKN1_HGH_DLY_VAL | ADC_SYNC_TKN2_HGH_DLY_VAL | ADC_SYNC_TKN1_LOW_DLY_VAL | ADC_SYNC_TKN2_LOW_DLY_VAL)
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#define ADC_SYNC_CLEAN_FIFOS_OFST (20)
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#define ADC_SYNC_CLEAN_FIFOS_MSK (0x00000001 << ADC_SYNC_CLEAN_FIFOS_OFST)// FIXME: tried with 1, works? else put 0x011 as mask
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#define ADC_SYNC_ENET_DELAY_OFST (24)
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#define ADC_SYNC_ENET_DELAY_MSK (0x000000FF << ADC_SYNC_ENET_DELAY_OFST)
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#define ADC_SYNC_ENET_DELAY_NO_ROI_VAL ((0x88 << ADC_SYNC_ENET_DELAY_OFST) & ADC_SYNC_ENET_DELAY_MSK)
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#define ADC_SYNC_ENET_DELAY_ROI_VAL ((0x1b << ADC_SYNC_ENET_DELAY_OFST) & ADC_SYNC_ENET_DELAY_MSK)
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//FIXME: try with just 0x8 and 0x1.. it is anded with 0000 in firmware anyway
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/** Temperatre SPI In register */
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#define TEMP_SPI_IN_REG (0x1b << MEM_MAP_SHIFT)
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#define TEMP_SPI_IN_T1_CLK_OFST (0)
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#define TEMP_SPI_IN_T1_CLK_MSK (0x00000001 << TEMP_SPI_IN_T1_CLK_OFST)
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#define TEMP_SPI_IN_T1_CS_OFST (1)
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#define TEMP_SPI_IN_T1_CS_MSK (0x00000001 << TEMP_SPI_IN_T1_CS_OFST)
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#define TEMP_SPI_IN_T2_CLK_OFST (2)
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#define TEMP_SPI_IN_T2_CLK_MSK (0x00000001 << TEMP_SPI_IN_T2_CLK_OFST)
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#define TEMP_SPI_IN_T2_CS_OFST (3)
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#define TEMP_SPI_IN_T2_CS_MSK (0x00000001 << TEMP_SPI_IN_T2_CS_OFST)
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/** Temperatre SPI Out register */
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#define TEMP_SPI_OUT_REG (0x1c << MEM_MAP_SHIFT)
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#define TEMP_SPI_OUT_T1_DT_OFST (0)
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#define TEMP_SPI_OUT_T1_DT_MSK (0x00000001 << TEMP_SPI_OUT_T1_DT_OFST)
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#define TEMP_SPI_OUT_T2_DT_OFST (1)
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#define TEMP_SPI_OUT_T2_DT_MSK (0x00000001 << TEMP_SPI_OUT_T2_DT_OFST)
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/** TSE Configure register */
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#define TSE_CONF_REG (0x1d << MEM_MAP_SHIFT)
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/** SPI Configure register */
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#define ENET_CONF_REG (0x1e << MEM_MAP_SHIFT)
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/** High Voltage register */
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#define HV_REG (0x20 << MEM_MAP_SHIFT)
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#define HV_ENBL_OFST (0)
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#define HV_ENBL_MSK (0x00000001 << HV_ENBL_OFST)
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#define HV_SEL_OFST (1)
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#define HV_SEL_MSK (0x00000007 << HV_SEL_OFST)
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#define HV_SEL_90_VAL ((0x0 << HV_SEL_OFST) & HV_SEL_MSK)
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#define HV_SEL_110_VAL ((0x1 << HV_SEL_OFST) & HV_SEL_MSK)
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#define HV_SEL_120_VAL ((0x2 << HV_SEL_OFST) & HV_SEL_MSK)
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#define HV_SEL_150_VAL ((0x3 << HV_SEL_OFST) & HV_SEL_MSK)
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#define HV_SEL_180_VAL ((0x4 << HV_SEL_OFST) & HV_SEL_MSK)
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#define HV_SEL_200_VAL ((0x5 << HV_SEL_OFST) & HV_SEL_MSK)
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/** Dummy register */
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#define DUMMY_REG (0x21 << MEM_MAP_SHIFT)
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/** Firmware Version register */
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#define FPGA_VERSION_REG (0x22 << MEM_MAP_SHIFT)
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#define FPGA_VERSION_OFST (0)
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#define FPGA_VERSION_MSK (0x00FFFFFF << FPGA_VERSION_OFST) // to get in format yymmdd
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/* Fix Pattern register */
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#define FIX_PATT_REG (0x23 << MEM_MAP_SHIFT)
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#define FIXED_PATT_VAL (0xACDC1980)
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/** Config register */
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#define Config_REG (0x26 << MEM_MAP_SHIFT)
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#define CONFIG_SLAVE_OFST (0) // Not used in FW & SW
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#define CONFIG_SLAVE_MSK (0x00000001 << CONFIG_SLAVE_OFST)
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#define CONFIG_MASTER_OFST (1) // Not used in FW & SW
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#define CONFIG_MASTER_MSK (0x00000001 << CONFIG_MASTER_OFST)
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#define CONFIG_TM_GT_ENBL_OFST (2) // Not used in FW & SW
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#define CONFIG_TM_GT_ENBL_MSK (0x00000001 << CONFIG_TM_GT_ENBL_OFST)
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#define CONFIG_CPU_RDT_OFST (12)
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#define CONFIG_CPU_RDT_MSK (0x00000001 << CONFIG_CPU_RDT_OFST)
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#define CONFIG_CNTNS_RDT_OFST (23) // Not used in FW & SW
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#define CONFIG_CNTNS_RDT_MSK (0x00000001 << CONFIG_CNTNS_RDT_OFST)
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#define CONFIG_ACCMLT_CNTS_OFST (24) // Not used in FW & SW
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#define CONFIG_ACCMLT_CNTS_MSK (0x00000001 << CONFIG_ACCMLT_CNTS_OFST)
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/** 16 bit Control register */
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#define CONTROL_REG (0x24 << MEM_MAP_SHIFT)
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#define CONTROL_STRT_ACQ_OFST (0)
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||||
#define CONTROL_STRT_ACQ_MSK (0x00000001 << CONTROL_STRT_ACQ_OFST)
|
||||
#define CONTROL_STP_ACQ_OFST (1)
|
||||
#define CONTROL_STP_ACQ_MSK (0x00000001 << CONTROL_STP_ACQ_OFST)
|
||||
#define CONTROL_STRT_FF_TST_OFST (2) // Not used in FW & SW
|
||||
#define CONTROL_STRT_FF_TST_MSK (0x00000001 << CONTROL_STRT_FF_TST_OFST)
|
||||
#define CONTROL_STP_FF_TST_OFST (3) // Not used in FW & SW
|
||||
#define CONTROL_STP_FF_TST_MSK (0x00000001 << CONTROL_STP_FF_TST_OFST)
|
||||
#define CONTROL_STRT_RDT_OFST (4)
|
||||
#define CONTROL_STRT_RDT_MSK (0x00000001 << CONTROL_STRT_RDT_OFST)
|
||||
#define CONTROL_STP_RDT_OFST (5)
|
||||
#define CONTROL_STP_RDT_MSK (0x00000001 << CONTROL_STP_RDT_OFST)
|
||||
#define CONTROL_STRT_EXPSR_OFST (6)
|
||||
#define CONTROL_STRT_EXPSR_MSK (0x00000001 << CONTROL_STRT_EXPSR_OFST)
|
||||
#define CONTROL_STP_EXPSR_OFST (7)
|
||||
#define CONTROL_STP_EXPSR_MSK (0x00000001 << CONTROL_STP_EXPSR_OFST)
|
||||
#define CONTROL_STRT_TRN_OFST (8)
|
||||
#define CONTROL_STRT_TRN_MSK (0x00000001 << CONTROL_STRT_TRN_OFST)
|
||||
#define CONTROL_STP_TRN_OFST (9)
|
||||
#define CONTROL_STP_TRN_MSK (0x00000001 << CONTROL_STP_TRN_OFST)
|
||||
#define CONTROL_SYNC_RST_OFST (10)
|
||||
#define CONTROL_SYNC_RST_MSK (0x00000001 << CONTROL_SYNC_RST_OFST)
|
||||
|
||||
/** Status register */
|
||||
#define STATUS_REG (0x25 << MEM_MAP_SHIFT)
|
||||
|
||||
#define STATUS_RN_BSY_OFST (0)
|
||||
#define STATUS_RN_BSY_MSK (0x00000001 << STATUS_RN_BSY_OFST)
|
||||
#define STATUS_RDT_BSY_OFST (1)
|
||||
#define STATUS_RDT_BSY_MSK (0x00000001 << STATUS_RDT_BSY_OFST)
|
||||
#define STATUS_WTNG_FR_TRGGR_OFST (3)
|
||||
#define STATUS_WTNG_FR_TRGGR_MSK (0x00000001 << STATUS_WTNG_FR_TRGGR_OFST)
|
||||
#define STATUS_DLY_BFR_OFST (4)
|
||||
#define STATUS_DLY_BFR_MSK (0x00000001 << STATUS_DLY_BFR_OFST)
|
||||
#define STATUS_DLY_AFTR_OFST (5)
|
||||
#define STATUS_DLY_AFTR_MSK (0x00000001 << STATUS_DLY_AFTR_OFST)
|
||||
#define STATUS_EXPSNG_OFST (6)
|
||||
#define STATUS_EXPSNG_MSK (0x00000001 << STATUS_EXPSNG_OFST)
|
||||
#define STATUS_CNT_ENBL_OFST (7)
|
||||
#define STATUS_CNT_ENBL_MSK (0x00000001 << STATUS_CNT_ENBL_OFST)
|
||||
#define STATUS_RD_STT_OFST (8)
|
||||
#define STATUS_RD_STT_MSK (0x00000007 << STATUS_RD_STT_OFST)
|
||||
#define STATUS_RN_STT_OFST (12)
|
||||
#define STATUS_RN_STT_MSK (0x00000007 << STATUS_RN_STT_OFST)
|
||||
#define STATUS_SM_FF_FLL_OFST (15)
|
||||
#define STATUS_SM_FF_FLL_MSK (0x00000001 << STATUS_SM_FF_FLL_OFST)
|
||||
#define STATUS_ALL_FF_EMPTY_OFST (11)
|
||||
#define STATUS_ALL_FF_EMPTY_MSK (0x00000001 << STATUS_ALL_FF_EMPTY_OFST)
|
||||
#define STATUS_RN_MSHN_BSY_OFST (17)
|
||||
#define STATUS_RN_MSHN_BSY_MSK (0x00000001 << STATUS_RN_MSHN_BSY_OFST)
|
||||
#define STATUS_RD_MSHN_BSY_OFST (18)
|
||||
#define STATUS_RD_MSHN_BSY_MSK (0x00000001 << STATUS_RD_MSHN_BSY_OFST)
|
||||
#define STATUS_RN_FNSHD_OFST (20)
|
||||
#define STATUS_RN_FNSHD_MSK (0x00000001 << STATUS_RN_FNSHD_OFST)
|
||||
#define STATUS_IDLE_MSK (0x0000FFFF << 0)
|
||||
|
||||
/** External Signal register */
|
||||
#define EXT_SIGNAL_REG (0x27 << MEM_MAP_SHIFT)
|
||||
|
||||
#define EXT_SIGNAL_OFST (0)
|
||||
#define EXT_SIGNAL_MSK (0x00000007 << EXT_SIGNAL_OFST)
|
||||
#define EXT_SIGNAL_OFF_VAL ((0x0 << EXT_SIGNAL_OFST) & EXT_SIGNAL_MSK)
|
||||
#define EXT_SIGNAL_TRGGR_IN_RSNG_VAL ((0x3 << EXT_SIGNAL_OFST) & EXT_SIGNAL_MSK)
|
||||
#define EXT_SIGNAL_TRGGR_IN_FLLNG_VAL ((0x4 << EXT_SIGNAL_OFST) & EXT_SIGNAL_MSK)
|
||||
/*
|
||||
#define FPGA_SVN_REG 0x29<<11
|
||||
#define LOOK_AT_ME_REG 0x28<<11
|
||||
*/
|
||||
/** Chip of Interest register */
|
||||
#define CHIP_OF_INTRST_REG (0x2a << MEM_MAP_SHIFT)
|
||||
|
||||
#define CHIP_OF_INTRST_ADC_SEL_OFST (0)
|
||||
#define CHIP_OF_INTRST_ADC_SEL_MSK (0x0000001F << CHIP_OF_INTRST_ADC_SEL_OFST)
|
||||
#define CHIP_OF_INTRST_NUM_CHNNLS_OFST (16)
|
||||
#define CHIP_OF_INTRST_NUM_CHNNLS_MSK (0x0000FFFF << CHIP_OF_INTRST_NUM_CHNNLS_OFST)
|
||||
|
||||
/** Board Version register */
|
||||
#define BOARD_REVISION_REG (0x2c << MEM_MAP_SHIFT)
|
||||
|
||||
#define BOARD_REVISION_OFST (0)
|
||||
#define BOARD_REVISION_MSK (0x0000FFFF << BOARD_REVISION_OFST)
|
||||
#define DETECTOR_TYPE_OFST (16)
|
||||
#define DETECTOR_TYPE_MSK (0x0000000F << DETECTOR_TYPE_OFST)
|
||||
//#define DETECTOR_TYPE_GOTTHARD_VAL (??)
|
||||
#define DETECTOR_TYPE_MOENCH_VAL (2)
|
||||
|
||||
/* 16 bit Fifo Data register */
|
||||
//#define FIFO_DATA_REG (0x50 << MEM_MAP_SHIFT) // Not used in FW and SW (16bit)
|
||||
|
||||
/*
|
||||
#define MOD_DACS1_REG 0x65<<11
|
||||
#define MOD_DACS2_REG 0x66<<11
|
||||
#define MOD_DACS3_REG 0x67<<11
|
||||
*/
|
||||
/* Set Delay 64 bit register */
|
||||
#define SET_DELAY_LSB_REG (0x68 << MEM_MAP_SHIFT)
|
||||
#define SET_DELAY_MSB_REG (0x69 << MEM_MAP_SHIFT)
|
||||
|
||||
/* Get Delay 64 bit register */
|
||||
#define GET_DELAY_LSB_REG (0x6a << MEM_MAP_SHIFT)
|
||||
#define GET_DELAY_MSB_REG (0x6b << MEM_MAP_SHIFT)
|
||||
|
||||
/* Set Cycles 64 bit register */
|
||||
#define SET_TRAINS_LSB_REG (0x6c << MEM_MAP_SHIFT)
|
||||
#define SET_TRAINS_MSB_REG (0x6d << MEM_MAP_SHIFT)
|
||||
|
||||
/* Get Cycles 64 bit register */
|
||||
#define GET_TRAINS_LSB_REG (0x6e << MEM_MAP_SHIFT)
|
||||
#define GET_TRAINS_MSB_REG (0x6f << MEM_MAP_SHIFT)
|
||||
|
||||
/* Set Frames 64 bit register */
|
||||
#define SET_FRAMES_LSB_REG (0x70 << MEM_MAP_SHIFT)
|
||||
#define SET_FRAMES_MSB_REG (0x71 << MEM_MAP_SHIFT)
|
||||
|
||||
/* Get Frames 64 bit register */
|
||||
#define GET_FRAMES_LSB_REG (0x72 << MEM_MAP_SHIFT)
|
||||
#define GET_FRAMES_MSB_REG (0x73 << MEM_MAP_SHIFT)
|
||||
|
||||
/* Set Period 64 bit register */
|
||||
#define SET_PERIOD_LSB_REG (0x74 << MEM_MAP_SHIFT)
|
||||
#define SET_PERIOD_MSB_REG (0x75 << MEM_MAP_SHIFT)
|
||||
|
||||
/* Get Period 64 bit register */
|
||||
#define GET_PERIOD_LSB_REG (0x76 << MEM_MAP_SHIFT)
|
||||
#define GET_PERIOD_MSB_REG (0x77 << MEM_MAP_SHIFT)
|
||||
|
||||
/* Set Exptime 64 bit register */
|
||||
#define SET_EXPTIME_LSB_REG (0x78 << MEM_MAP_SHIFT)
|
||||
#define SET_EXPTIME_MSB_REG (0x79 << MEM_MAP_SHIFT)
|
||||
|
||||
/* Get Exptime 64 bit register */
|
||||
#define GET_EXPTIME_LSB_REG (0x7a << MEM_MAP_SHIFT)
|
||||
#define GET_EXPTIME_MSB_REG (0x7b << MEM_MAP_SHIFT)
|
||||
|
||||
/* Set Gates 64 bit register */
|
||||
//#define SET_GATES_LSB_REG (0x7c << MEM_MAP_SHIFT) // Not used in SW and FW
|
||||
//#define SET_GATES_MSB_REG (0x7d << MEM_MAP_SHIFT) // Not used in SW and FW
|
||||
|
||||
/* Dark Image starting address */
|
||||
#define DARK_IMAGE_REG (0x81 << MEM_MAP_SHIFT)
|
||||
|
||||
/* Gain Image starting address */
|
||||
#define GAIN_IMAGE_REG (0x82 << MEM_MAP_SHIFT)
|
||||
|
||||
/* Counter Block Memory starting address */
|
||||
#define COUNTER_MEMORY_REG (0x85 << MEM_MAP_SHIFT)
|
||||
|
||||
1
slsDetectorServers/gotthardDetectorServer/blackfin.h
Symbolic link
1
slsDetectorServers/gotthardDetectorServer/blackfin.h
Symbolic link
@ -0,0 +1 @@
|
||||
../slsDetectorServer/blackfin.h
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,120 +0,0 @@
|
||||
#ifndef FIRMWARE_FUNCS_H
|
||||
#define FIRMWARE_FUNCS_H
|
||||
|
||||
|
||||
#include "sls_detector_defs.h"
|
||||
|
||||
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
#include <sys/mman.h>
|
||||
#include <fcntl.h>
|
||||
#include <stdarg.h>
|
||||
#include <unistd.h>
|
||||
#include <sys/types.h>
|
||||
#include <sys/stat.h>
|
||||
|
||||
|
||||
int mapCSP0(void);
|
||||
u_int16_t bus_r16(u_int32_t offset);
|
||||
u_int16_t bus_w16(u_int32_t offset, u_int16_t data);//aldos function
|
||||
u_int32_t bus_w(u_int32_t offset, u_int32_t data);
|
||||
u_int32_t bus_r(u_int32_t offset);
|
||||
|
||||
int initDetector();
|
||||
int setDefaultDacs();
|
||||
void setMasterSlaveConfiguration();
|
||||
int configureADC();
|
||||
int setPhaseShiftOnce();
|
||||
int setPhaseShift(int numphaseshift);
|
||||
int cleanFifo();
|
||||
int setDAQRegister();
|
||||
u_int32_t putout(char *s);
|
||||
int setConfigurationRegister(int d);
|
||||
int sendviaUDP(int d);
|
||||
int setDACRegister(int idac, int val);
|
||||
|
||||
|
||||
u_int32_t setExtSignal(enum externalSignalFlag mode);
|
||||
int getExtSignal();
|
||||
u_int32_t setFPGASignal(enum externalSignalFlag mode);
|
||||
int getFPGASignal();
|
||||
|
||||
int setTiming(int t);
|
||||
|
||||
u_int64_t getDetectorNumber();
|
||||
u_int32_t getFirmwareVersion();
|
||||
u_int32_t getFirmwareSVNVersion();
|
||||
|
||||
u_int32_t testFpga(void);
|
||||
int testBus(void);
|
||||
|
||||
int initHighVoltage(int val);
|
||||
int getTemperature(int tempSensor);
|
||||
int setSettings(int i);
|
||||
int initConfGain(int isettings,int val);
|
||||
ROI* setROI(int n, ROI arg[], int *retvalsize, int *ret);
|
||||
int setADC(int adc);
|
||||
int configureMAC(int ipad, long long int macad, long long int detectormacadd, int detipad, int ival, int udpport);
|
||||
int getAdcConfigured();
|
||||
|
||||
|
||||
int64_t set64BitReg(int64_t value, int aLSB, int aMSB);
|
||||
int64_t get64BitReg(int aLSB, int aMSB);
|
||||
|
||||
int64_t setFrames(int64_t value);
|
||||
int64_t getFrames();
|
||||
|
||||
int64_t setExposureTime(int64_t value);
|
||||
int64_t getExposureTime();
|
||||
|
||||
int64_t setGates(int64_t value);
|
||||
int64_t getGates();
|
||||
|
||||
int64_t setPeriod(int64_t value);
|
||||
int64_t getPeriod();
|
||||
|
||||
int64_t setDelay(int64_t value);
|
||||
int64_t getDelay();
|
||||
|
||||
int64_t setTrains(int64_t value);
|
||||
int64_t getTrains();
|
||||
|
||||
int64_t getActualTime();
|
||||
int64_t getMeasurementTime();
|
||||
|
||||
u_int32_t fifoReadStatus();
|
||||
u_int32_t fifo_full(void);
|
||||
u_int32_t runBusy(void);
|
||||
u_int32_t runState(void);
|
||||
int startStateMachine();
|
||||
int stopStateMachine();
|
||||
int startReadOut();
|
||||
void waitForAcquisitionFinish();
|
||||
int getStatus();
|
||||
|
||||
int loadImage(int index, short int ImageVals[]);
|
||||
int readCounterBlock(int startACQ, short int CounterVals[]);
|
||||
int resetCounterBlock(int startACQ);
|
||||
|
||||
int copyModule(sls_detector_module *destMod, sls_detector_module *srcMod);
|
||||
|
||||
int setDAC(int ind,int val,int mV, int retval[]);
|
||||
int getDAC(int ind);
|
||||
|
||||
int setModule(sls_detector_module);
|
||||
void getModule(sls_detector_module*);
|
||||
|
||||
void initDACs(int* v);
|
||||
void initDAC(int dac_addr, int value);
|
||||
void clearDACSregister();
|
||||
void nextDAC();
|
||||
void program_one_dac(int addr, int value);
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
Binary file not shown.
Binary file not shown.
1
slsDetectorServers/gotthardDetectorServer/logger.h
Symbolic link
1
slsDetectorServers/gotthardDetectorServer/logger.h
Symbolic link
@ -0,0 +1 @@
|
||||
../slsDetectorServer/logger.h
|
||||
@ -1,103 +0,0 @@
|
||||
/* A simple server in the internet domain using TCP
|
||||
The port number is passed as an argument */
|
||||
|
||||
#include "sls_detector_defs.h"
|
||||
|
||||
#include "communication_funcs.h"
|
||||
#include "server_funcs.h"
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
|
||||
|
||||
extern int sockfd;
|
||||
extern int phase_shift;
|
||||
|
||||
|
||||
|
||||
void error(char *msg)
|
||||
{
|
||||
perror(msg);
|
||||
}
|
||||
|
||||
int main(int argc, char *argv[])
|
||||
{
|
||||
int portno, b;
|
||||
char cmd[100];
|
||||
int retval=OK;
|
||||
int sd, fd;
|
||||
int iarg;
|
||||
for(iarg=1; iarg<argc; iarg++){
|
||||
if(!strcasecmp(argv[iarg],"-phaseshift")){
|
||||
if ( sscanf(argv[iarg+1],"%d",&phase_shift)==0) {
|
||||
printf("could not decode phase shift\n");
|
||||
return 1;
|
||||
}
|
||||
argc=1;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
if (argc==1) {
|
||||
portno = DEFAULT_PORTNO;
|
||||
sprintf(cmd,"%s %d &",argv[0],DEFAULT_PORTNO+1);
|
||||
printf("\n\nControl Server\nOpening control server on port %d\n",portno );
|
||||
system(cmd);
|
||||
b=1;
|
||||
} else {
|
||||
portno = DEFAULT_PORTNO+1;
|
||||
if ( sscanf(argv[1],"%d",&portno) ==0) {
|
||||
printf("could not open stop server: unknown port\n");
|
||||
return 1;
|
||||
}
|
||||
b=0;
|
||||
printf("\n\nStop Server\nOpening stop server on port %d\n",portno);
|
||||
}
|
||||
init_detector(b);
|
||||
|
||||
|
||||
sd=bindSocket(portno);
|
||||
|
||||
sockfd=sd;
|
||||
|
||||
|
||||
if (getServerError(sd)) {
|
||||
printf("server error!\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* assign function table */
|
||||
function_table();
|
||||
#ifdef VERBOSE
|
||||
printf("function table assigned \n");
|
||||
#endif
|
||||
|
||||
|
||||
/* waits for connection */
|
||||
while(retval!=GOODBYE) {
|
||||
#ifdef VERBOSE
|
||||
printf("\n");
|
||||
#endif
|
||||
#ifdef VERY_VERBOSE
|
||||
printf("Waiting for client call\n");
|
||||
#endif
|
||||
fd=acceptConnection(sockfd);
|
||||
#ifdef VERY_VERBOSE
|
||||
printf("Conenction accepted\n");
|
||||
#endif
|
||||
retval=decode_function(fd);
|
||||
#ifdef VERY_VERBOSE
|
||||
printf("function executed\n");
|
||||
#endif
|
||||
closeConnection(fd);
|
||||
#ifdef VERY_VERBOSE
|
||||
printf("connection closed\n");
|
||||
#endif
|
||||
}
|
||||
|
||||
exitServer(sockfd);
|
||||
printf("Goodbye!\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -1,69 +0,0 @@
|
||||
#ifndef SERVER_DEFS_H
|
||||
#define SERVER_DEFS_H
|
||||
|
||||
#include "sls_detector_defs.h"
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
|
||||
// Hardware definitions
|
||||
#define NCHAN 128
|
||||
#define NCHIP 10
|
||||
#define NDAC 8
|
||||
#define NADC 5
|
||||
#define NCHANS NCHAN*NCHIP
|
||||
#define NDACS NDAC
|
||||
#define NCHIPS_PER_ADC 2
|
||||
|
||||
#define DYNAMIC_RANGE 16
|
||||
#define DATA_BYTES (NCHIP*NCHAN*2)
|
||||
|
||||
// for 25 um
|
||||
#define CONFIG_FILE "config.txt"
|
||||
|
||||
|
||||
|
||||
#define ADCSYNC_VAL 0x32214
|
||||
#define TOKEN_RESTART_DELAY 0x88000000
|
||||
#define TOKEN_RESTART_DELAY_ROI 0x1b000000
|
||||
#define TOKEN_TIMING_REV1 0x1f16
|
||||
#define TOKEN_TIMING_REV2 0x1f0f
|
||||
|
||||
#define DEFAULT_PHASE_SHIFT 120
|
||||
#define DEFAULT_IP_PACKETSIZE 0x0522
|
||||
#define DEFAULT_UDP_PACKETSIZE 0x050E
|
||||
#define ADC1_IP_PACKETSIZE (256*2+14+20)
|
||||
#define ADC1_UDP_PACKETSIZE (256*2+4+8+2)
|
||||
|
||||
#define CLK_FREQ 32.007729
|
||||
|
||||
#define DAC_DR 1024
|
||||
#define CONF_GAIN { \
|
||||
0, /*standard gain*/ \
|
||||
0, /*fast gain*/ \
|
||||
0, /*high gain*/ \
|
||||
8, /*dynamic gain*/ \
|
||||
6, /*low gain*/ \
|
||||
2, /*medium gain*/ \
|
||||
1 /*very high gain*/ \
|
||||
};
|
||||
//dynamic gain confgain yet to be figured out-probably 8 or 16
|
||||
|
||||
// DAC definitions
|
||||
enum dacsVal{VREF_DS, VCASCN_PB, VCASCP_PB, VOUT_CM, VCASC_OUT, VIN_CM, VREF_COMP, IB_TESTC,HIGH_VOLTAGE, CONFGAIN};
|
||||
#define DEFAULT_DAC_VALS { \
|
||||
660, /* VREF_DS */ \
|
||||
650, /* VCASCN_PB */ \
|
||||
1480, /* VCASCP_PB */ \
|
||||
1520, /* VOUT_CM */ \
|
||||
1320, /* VCASC_OUT */ \
|
||||
1350, /* VIN_CM */ \
|
||||
350, /* VREF_COMP */ \
|
||||
2001 /* IB_TESTC */ \
|
||||
};
|
||||
|
||||
//Register Definitions for temp,hv,dac gain
|
||||
enum adcVals{TEMP_FPGA, TEMP_ADC};
|
||||
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,70 +0,0 @@
|
||||
#ifndef SERVER_FUNCS_H
|
||||
#define SERVER_FUNCS_H
|
||||
|
||||
|
||||
#include "sls_detector_defs.h"
|
||||
|
||||
|
||||
#include <stdio.h>
|
||||
/*
|
||||
#include <sys/types.h>
|
||||
#include <sys/socket.h>
|
||||
#include <netinet/in.h>
|
||||
*/
|
||||
#include "communication_funcs.h"
|
||||
|
||||
|
||||
|
||||
|
||||
#define GOODBYE -200
|
||||
|
||||
int sockfd;
|
||||
|
||||
int function_table();
|
||||
int decode_function(int);
|
||||
int init_detector(int);
|
||||
int M_nofunc(int);
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
// General purpose functions
|
||||
int exec_command(int);
|
||||
int get_detector_type(int);
|
||||
int set_external_signal_flag(int);
|
||||
int set_external_communication_mode(int);
|
||||
int get_id(int);
|
||||
int digital_test(int);
|
||||
int set_dac(int);
|
||||
int get_adc(int);
|
||||
int write_register(int);
|
||||
int read_register(int);
|
||||
int set_module(int);
|
||||
int get_module(int);
|
||||
int set_settings(int);
|
||||
int start_acquisition(int);
|
||||
int stop_acquisition(int);
|
||||
int start_readout(int);
|
||||
int get_run_status(int);
|
||||
int start_and_read_all(int);
|
||||
int read_all(int);
|
||||
int set_timer(int);
|
||||
int get_time_left(int);
|
||||
int set_dynamic_range(int);
|
||||
int set_readout_flags(int);
|
||||
int set_roi(int);
|
||||
int set_speed(int);
|
||||
int exit_server(int);
|
||||
int lock_server(int);
|
||||
int get_last_client_ip(int);
|
||||
int set_port(int);
|
||||
int send_update(int);
|
||||
int update_client(int);
|
||||
int configure_mac(int);
|
||||
int load_image(int);
|
||||
int read_counter_block(int);
|
||||
int reset_counter_block(int);
|
||||
int write_adc_register(int);
|
||||
int check_version(int);
|
||||
#endif
|
||||
1810
slsDetectorServers/gotthardDetectorServer/slsDetectorFunctionList.c
Normal file
1810
slsDetectorServers/gotthardDetectorServer/slsDetectorFunctionList.c
Normal file
File diff suppressed because it is too large
Load Diff
@ -0,0 +1 @@
|
||||
../slsDetectorServer/slsDetectorFunctionList.h
|
||||
1
slsDetectorServers/gotthardDetectorServer/slsDetectorServer.c
Symbolic link
1
slsDetectorServers/gotthardDetectorServer/slsDetectorServer.c
Symbolic link
@ -0,0 +1 @@
|
||||
../slsDetectorServer/slsDetectorServer.c
|
||||
@ -0,0 +1,121 @@
|
||||
#pragma once
|
||||
#include "sls_detector_defs.h" //default dynamicgain in settings
|
||||
|
||||
#define GOODBYE (-200)
|
||||
|
||||
/* Enums */
|
||||
enum ADCINDEX {TEMP_FPGA, TEMP_ADC};
|
||||
enum DACINDEX {VREF_DS, VCASCN_PB, VCASCP_PB, VOUT_CM, VCASC_OUT, VIN_CM, VREF_COMP, IB_TESTC};
|
||||
#define DEFAULT_DAC_VALS { \
|
||||
660, /* VREF_DS */ \
|
||||
650, /* VCASCN_PB */ \
|
||||
1480, /* VCASCP_PB */ \
|
||||
1520, /* VOUT_CM */ \
|
||||
1320, /* VCASC_OUT */ \
|
||||
1350, /* VIN_CM */ \
|
||||
350, /* VREF_COMP */ \
|
||||
2001 /* IB_TESTC */ \
|
||||
};
|
||||
|
||||
/* for 25 um */
|
||||
#define CONFIG_FILE "config.txt"
|
||||
|
||||
/* Hardware Definitions */
|
||||
#define NCHAN (128)
|
||||
#define NCHIP (10)
|
||||
#define NDAC (8)
|
||||
#define NCHIPS_PER_ADC (2)
|
||||
#define DYNAMIC_RANGE (16)
|
||||
#define NUM_BITS_PER_PIXEL (DYNAMIC_RANGE / 8)
|
||||
#define DATA_BYTES (NCHIP * NCHAN * NUM_BITS_PER_PIXEL)
|
||||
#define CLK_FREQ (32.007729) /* MHz */
|
||||
|
||||
/** Firmware Definitions */
|
||||
#define IP_PACKET_SIZE_NO_ROI (NCHIP * (NCHAN / 2) * 2 + 14 + 20) // 2 packets, so divide by 2
|
||||
#define IP_PACKET_SIZE_ROI (NCHIPS_PER_ADC * NCHAN * 2 + 14 + 20)
|
||||
|
||||
#define UDP_PACKETSIZE_NO_ROI (NCHIP * (NCHAN / 2) * 2 + 4 + 8 + 2) // 2 packets, so divide by 2
|
||||
#define UDP_PACKETSIZE_ROI (NCHIPS_PER_ADC * NCHAN * 2 + 4 + 8 + 2)
|
||||
|
||||
/** Default Parameters */
|
||||
#define DEFAULT_NUM_FRAMES (1)
|
||||
#define DEFAULT_NUM_CYCLES (1)
|
||||
#define DEFAULT_EXPTIME (1 * 1000 * 1000) // 1 ms
|
||||
#define DEFAULT_PERIOD (1 * 1000 * 1000 * 1000) // 1 s
|
||||
#define DEFAULT_DELAY (0)
|
||||
#define DEFAULT_SETTINGS (DYNAMICGAIN)
|
||||
#define DEFAULT_TIMING_MODE (AUTO_TIMING)
|
||||
#define DEFAULT_TRIGGER_MODE (TRIGGER_IN_RISING_EDGE)
|
||||
#define DEFAULT_HIGH_VOLTAGE (0)
|
||||
#define DEFAULT_PHASE_SHIFT (120)
|
||||
#define DEFAULT_TX_UDP_PORT (0xE185)
|
||||
|
||||
/** ENEt conf structs */
|
||||
typedef struct mac_header_struct{
|
||||
u_int8_t mac_dest_mac2;
|
||||
u_int8_t mac_dest_mac1;
|
||||
u_int8_t mac_dummy1;
|
||||
u_int8_t mac_dummy2;
|
||||
u_int8_t mac_dest_mac6;
|
||||
u_int8_t mac_dest_mac5;
|
||||
u_int8_t mac_dest_mac4;
|
||||
u_int8_t mac_dest_mac3;
|
||||
u_int8_t mac_src_mac4;
|
||||
u_int8_t mac_src_mac3;
|
||||
u_int8_t mac_src_mac2;
|
||||
u_int8_t mac_src_mac1;
|
||||
u_int16_t mac_ether_type;
|
||||
u_int8_t mac_src_mac6;
|
||||
u_int8_t mac_src_mac5;
|
||||
} mac_header;
|
||||
|
||||
typedef struct ip_header_struct {
|
||||
u_int16_t ip_len;
|
||||
u_int8_t ip_tos;
|
||||
u_int8_t ip_ihl:4 ,ip_ver:4;
|
||||
u_int16_t ip_offset:13,ip_flag:3;
|
||||
u_int16_t ip_ident;
|
||||
u_int16_t ip_chksum;
|
||||
u_int8_t ip_protocol;
|
||||
u_int8_t ip_ttl;
|
||||
u_int32_t ip_sourceip;
|
||||
u_int32_t ip_destip;
|
||||
} ip_header;
|
||||
|
||||
typedef struct udp_header_struct{
|
||||
u_int16_t udp_destport;
|
||||
u_int16_t udp_srcport;
|
||||
u_int16_t udp_chksum;
|
||||
u_int16_t udp_len;
|
||||
} udp_header;
|
||||
|
||||
typedef struct mac_conf_struct{
|
||||
mac_header mac;
|
||||
ip_header ip;
|
||||
udp_header udp;
|
||||
u_int32_t npack;
|
||||
u_int32_t lpack;
|
||||
u_int32_t npad;
|
||||
u_int32_t cdone;
|
||||
} mac_conf;
|
||||
|
||||
typedef struct tse_conf_struct{
|
||||
u_int32_t rev; //0x0
|
||||
u_int32_t scratch;
|
||||
u_int32_t command_config;
|
||||
u_int32_t mac_0; //0x3
|
||||
u_int32_t mac_1;
|
||||
u_int32_t frm_length;
|
||||
u_int32_t pause_quant;
|
||||
u_int32_t rx_section_empty; //0x7
|
||||
u_int32_t rx_section_full;
|
||||
u_int32_t tx_section_empty;
|
||||
u_int32_t tx_section_full;
|
||||
u_int32_t rx_almost_empty; //0xB
|
||||
u_int32_t rx_almost_full;
|
||||
u_int32_t tx_almost_empty;
|
||||
u_int32_t tx_almost_full;
|
||||
u_int32_t mdio_addr0; //0xF
|
||||
u_int32_t mdio_addr1;
|
||||
}tse_conf;
|
||||
|
||||
@ -0,0 +1 @@
|
||||
../slsDetectorServer/slsDetectorServer_funcs.c
|
||||
@ -0,0 +1 @@
|
||||
../slsDetectorServer/slsDetectorServer_funcs.h
|
||||
@ -1,46 +0,0 @@
|
||||
/* A simple server in the internet domain using TCP
|
||||
The port number is passed as an argument */
|
||||
|
||||
|
||||
#include "sls_detector_defs.h"
|
||||
|
||||
|
||||
#include "communication_funcs.h"
|
||||
#include "firmware_funcs.h"
|
||||
|
||||
|
||||
int sockfd;
|
||||
|
||||
int main(int argc, char *argv[])
|
||||
{
|
||||
int portno;
|
||||
int retval=0;
|
||||
|
||||
portno = DEFAULT_PORTNO;
|
||||
|
||||
|
||||
bindSocket(portno);
|
||||
if (getServerError())
|
||||
return -1;
|
||||
|
||||
|
||||
|
||||
/* waits for connection */
|
||||
while(retval!=GOODBYE) {
|
||||
#ifdef VERBOSE
|
||||
printf("\n");
|
||||
#endif
|
||||
#ifdef VERY_VERBOSE
|
||||
printf("Stop server: waiting for client call\n");
|
||||
#endif
|
||||
acceptConnection();
|
||||
retval=stopStateMachine();
|
||||
closeConnection();
|
||||
}
|
||||
|
||||
exitServer();
|
||||
printf("Goodbye!\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -25,7 +25,7 @@ $(PROGS): $(OBJS)
|
||||
rm *.gdb
|
||||
|
||||
clean:
|
||||
rm -rf $(DESTDIR)/$(PROGS) *.o
|
||||
rm -rf $(DESTDIR)/$(PROGS) *.o *.gdb
|
||||
|
||||
|
||||
|
||||
@ -14,23 +14,20 @@
|
||||
#include <time.h>
|
||||
#endif
|
||||
|
||||
// Global variable from slsDetectorServer
|
||||
// Global variable from slsDetectorServer_funcs
|
||||
extern int debugflag;
|
||||
|
||||
int firmware_compatibility = OK;
|
||||
int firmware_check_done = 0;
|
||||
char firmware_message[MAX_STR_LENGTH];
|
||||
|
||||
sls_detector_module *detectorModules = NULL;
|
||||
int *detectorDacs = NULL;
|
||||
|
||||
#ifdef VIRTUAL
|
||||
pthread_t pthread_virtual_tid;
|
||||
int virtual_status = 0;
|
||||
int virtual_stop = 0;
|
||||
#endif
|
||||
|
||||
enum detectorSettings thisSettings;
|
||||
enum detectorSettings thisSettings = UNINITIALIZED;
|
||||
int highvoltage = 0;
|
||||
int dacValues[NDAC] = {0};
|
||||
int32_t clkPhase[2] = {0, 0};
|
||||
@ -45,7 +42,7 @@ int getFirmwareCheckResult(char** mess) {
|
||||
return firmware_compatibility;
|
||||
}
|
||||
|
||||
void checkFirmwareCompatibility() {
|
||||
void basictests() {
|
||||
firmware_compatibility = OK;
|
||||
firmware_check_done = 0;
|
||||
memset(firmware_message, 0, MAX_STR_LENGTH);
|
||||
@ -242,7 +239,7 @@ int detectorTest( enum digitalTestMode arg){
|
||||
//DETECTOR_MEMORY_TEST:testRAM
|
||||
//DETECTOR_SOFTWARE_TEST:
|
||||
default:
|
||||
FILE_LOG(logERROR, ("Test not implemented for this detector %d\n", (int)arg));
|
||||
FILE_LOG(logERROR, ("Test %s not implemented for this detector\n", (int)arg));
|
||||
break;
|
||||
}
|
||||
return OK;
|
||||
@ -387,39 +384,11 @@ void initStopServer() {
|
||||
|
||||
/* set up detector */
|
||||
|
||||
void allocateDetectorStructureMemory(){
|
||||
FILE_LOG(logINFO, ("This Server is for 1 Jungfrau module (500k)\n"));
|
||||
|
||||
//Allocation of memory
|
||||
if (detectorModules != NULL) free(detectorModules);
|
||||
if (detectorDacs != NULL) free(detectorDacs);
|
||||
detectorModules = malloc(sizeof(sls_detector_module));
|
||||
detectorDacs = malloc(NDAC*sizeof(int));
|
||||
FILE_LOG(logDEBUG1, ("modules from 0x%x to 0x%x\n",detectorModules, detectorModules));
|
||||
FILE_LOG(logDEBUG1, ("dacs from 0x%x to 0x%x\n",detectorDacs, detectorDacs));
|
||||
(detectorModules)->dacs = detectorDacs;
|
||||
(detectorModules)->ndac = NDAC;
|
||||
(detectorModules)->nchip = NCHIP;
|
||||
(detectorModules)->nchan = NCHIP * NCHAN;
|
||||
(detectorModules)->reg = 0;
|
||||
(detectorModules)->iodelay = 0;
|
||||
(detectorModules)->tau = 0;
|
||||
(detectorModules)->eV = 0;
|
||||
thisSettings = UNINITIALIZED;
|
||||
|
||||
{ // initialize to -1
|
||||
int i = 0;
|
||||
for (i = 0; i < NDAC; ++i) {
|
||||
dacValues[i] = -1;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
void setupDetector() {
|
||||
|
||||
allocateDetectorStructureMemory();
|
||||
FILE_LOG(logINFO, ("This Server is for 1 Jungfrau module (500k)\n"));
|
||||
|
||||
resetPLL();
|
||||
resetCore();
|
||||
@ -797,12 +766,12 @@ int64_t getTimeLeft(enum timerIndex ind){
|
||||
break;
|
||||
|
||||
case ACTUAL_TIME:
|
||||
retval = get64BitReg(TIME_FROM_START_LSB_REG, TIME_FROM_START_MSB_REG) / (1E-9 * CLK_SYNC);
|
||||
retval = get64BitReg(TIME_FROM_START_LSB_REG, TIME_FROM_START_MSB_REG) / (1E-3 * CLK_SYNC);
|
||||
FILE_LOG(logINFO, ("Getting actual time (time from start): %lld\n", (long long int)retval));
|
||||
break;
|
||||
|
||||
case MEASUREMENT_TIME:
|
||||
retval = get64BitReg(START_FRAME_TIME_LSB_REG, START_FRAME_TIME_MSB_REG) / (1E-9 * CLK_SYNC);
|
||||
retval = get64BitReg(START_FRAME_TIME_LSB_REG, START_FRAME_TIME_MSB_REG) / (1E-3 * CLK_SYNC);
|
||||
FILE_LOG(logINFO, ("Getting measurement time (timestamp/ start frame time): %lld\n", (long long int)retval));
|
||||
break;
|
||||
|
||||
@ -835,19 +804,10 @@ int setModule(sls_detector_module myMod, char* mess){
|
||||
// settings
|
||||
setSettings( (enum detectorSettings)myMod.reg);
|
||||
|
||||
//copy module locally
|
||||
if (detectorModules) {
|
||||
if (copyModule(detectorModules, &myMod) == FAIL) {
|
||||
sprintf(mess, "Could not copy module\n");
|
||||
FILE_LOG(logERROR, (mess));
|
||||
return FAIL;
|
||||
}
|
||||
}
|
||||
|
||||
//set dac values
|
||||
{
|
||||
int i = 0, retval[2] = {-1, -1};
|
||||
for(i = 0; i < myMod.ndac; ++i)
|
||||
for(i = 0; i < NDAC; ++i)
|
||||
setDAC((enum DACINDEX)i, myMod.dacs[i], 0, retval);
|
||||
}
|
||||
return OK;
|
||||
@ -855,19 +815,20 @@ int setModule(sls_detector_module myMod, char* mess){
|
||||
|
||||
|
||||
int getModule(sls_detector_module *myMod){
|
||||
int i;
|
||||
int retval[2];
|
||||
|
||||
//dacs
|
||||
for(i=0;i<NDAC;i++)
|
||||
setDAC((enum DACINDEX)i,-1,0,retval);
|
||||
|
||||
//copy from local copy
|
||||
if (detectorModules)
|
||||
copyModule(myMod,detectorModules);
|
||||
else
|
||||
return FAIL;
|
||||
return OK;
|
||||
int idac = 0;
|
||||
for (idac = 0; idac < NDAC; ++idac) {
|
||||
if (dacValues[idac] >= 0)
|
||||
*((myMod->dacs) + idac) = dacValues[idac];
|
||||
}
|
||||
// check if all of them are not initialized
|
||||
int initialized = 0;
|
||||
for (idac = 0; idac < NDAC; ++idac) {
|
||||
if (dacValues[idac] >= 0)
|
||||
initialized = 1;
|
||||
}
|
||||
if (initialized)
|
||||
return OK;
|
||||
return FAIL;
|
||||
}
|
||||
|
||||
|
||||
@ -1028,22 +989,25 @@ int dacToVoltage(unsigned int digital){
|
||||
|
||||
|
||||
void setDAC(enum DACINDEX ind, int val, int mV, int retval[]){
|
||||
int dacval = val;
|
||||
int dacmV = val;
|
||||
|
||||
//if set and mv, convert to dac
|
||||
if (val > 0 && mV) {
|
||||
val = voltageToDac(val); //gives -1 on error
|
||||
}
|
||||
//if set and mv, convert to dac
|
||||
if (val > 0) {
|
||||
if (mV)
|
||||
val = voltageToDac(val); //gives -1 on error
|
||||
else
|
||||
dacmV = dacToVoltage(val); //gives -1 on error
|
||||
}
|
||||
|
||||
if ( (val >= 0) || (val == -100)) {
|
||||
#ifdef VIRTUAL
|
||||
dacValues[ind] = dacval;
|
||||
dacValues[ind] = val;
|
||||
#else
|
||||
u_int32_t codata;
|
||||
int csdx = ind / NDAC + DAC_SERIAL_CS_OUT_OFST; // old board (16 dacs),so can be DAC_SERIAL_CS_OUT_OFST or +1
|
||||
int dacchannel = ind % NDAC; // 0-8, dac channel number (also for dacnum 9-15 in old board)
|
||||
|
||||
FILE_LOG(logINFO, ("Setting DAC %d: %d dac (%d mV)\n",ind, dacval, val));
|
||||
FILE_LOG(logINFO, ("Setting DAC %d: %d dac (%d mV)\n",ind, val, dacmV));
|
||||
// command
|
||||
if (val >= 0) {
|
||||
FILE_LOG(logDEBUG1,("\tWrite to Input Register and Update\n"));
|
||||
@ -1064,7 +1028,7 @@ void setDAC(enum DACINDEX ind, int val, int mV, int retval[]){
|
||||
serializeToSPI(SPI_REG, codata, (0x1 << csdx), LTC2620_DAC_NUMBITS,
|
||||
DAC_SERIAL_CLK_OUT_MSK, DAC_SERIAL_DIGITAL_OUT_MSK, DAC_SERIAL_DIGITAL_OUT_OFST);
|
||||
|
||||
dacValues[ind] = dacval;
|
||||
dacValues[ind] = val;
|
||||
|
||||
if (ind == VREF_COMP) {
|
||||
bus_w (VREF_COMP_MOD_REG, (bus_r(VREF_COMP_MOD_REG) &~ (VREF_COMP_MOD_MSK)) // reset
|
||||
@ -1177,12 +1141,7 @@ enum externalCommunicationMode getTiming() {
|
||||
|
||||
|
||||
long int calcChecksum(int sourceip, int destip) {
|
||||
|
||||
ip_header ip;
|
||||
int count;
|
||||
unsigned short *addr;
|
||||
long int sum = 0;
|
||||
long int checksum;
|
||||
ip.ip_ver = 0x4;
|
||||
ip.ip_ihl = 0x5;
|
||||
ip.ip_tos = 0x0;
|
||||
@ -1196,18 +1155,22 @@ long int calcChecksum(int sourceip, int destip) {
|
||||
ip.ip_sourceip = sourceip;
|
||||
ip.ip_destip = destip;
|
||||
|
||||
count = sizeof(ip);
|
||||
addr = (unsigned short*) &(ip); /* warning: assignment from incompatible pointer type */
|
||||
while( count > 1 ) {
|
||||
int count = sizeof(ip);
|
||||
|
||||
unsigned short *addr;
|
||||
addr = (unsigned short*) &(ip); /* warning: assignment from incompatible pointer type */
|
||||
|
||||
long int sum = 0;
|
||||
while( count > 1 ) {
|
||||
sum += *addr++;
|
||||
count -= 2;
|
||||
}
|
||||
if (count > 0) sum += *addr; // Add left-over byte, if any
|
||||
while (sum>>16) sum = (sum & 0xffff) + (sum >> 16);// Fold 32-bit sum to 16 bits
|
||||
checksum = (~sum) & 0xffff;
|
||||
|
||||
if (count > 0)
|
||||
sum += *addr; // Add left-over byte, if any
|
||||
while (sum>>16)
|
||||
sum = (sum & 0xffff) + (sum >> 16);// Fold 32-bit sum to 16 bits
|
||||
long int checksum = (~sum) & 0xffff;
|
||||
FILE_LOG(logINFO, ("IP checksum is 0x%lx\n",checksum));
|
||||
|
||||
return checksum;
|
||||
}
|
||||
|
||||
@ -1215,7 +1178,7 @@ long int calcChecksum(int sourceip, int destip) {
|
||||
|
||||
int configureMAC(uint32_t destip, uint64_t destmac, uint64_t sourcemac, uint32_t sourceip, uint32_t udpport, uint32_t udpport2){
|
||||
#ifdef VIRTUAL
|
||||
return 0;
|
||||
return OK;
|
||||
#endif
|
||||
FILE_LOG(logINFOBLUE, ("Configuring MAC\n"));
|
||||
uint32_t sourceport = DEFAULT_TX_UDP_PORT;
|
||||
@ -1277,7 +1240,7 @@ int configureMAC(uint32_t destip, uint64_t destmac, uint64_t sourcemac, uint32_t
|
||||
resetCore();
|
||||
|
||||
usleep(500 * 1000); /* todo maybe without */
|
||||
return 0;
|
||||
return OK;
|
||||
}
|
||||
|
||||
|
||||
@ -1602,11 +1565,11 @@ void readFrame(int *ret, char *mess){
|
||||
|
||||
|
||||
|
||||
u_int32_t runBusy(void) {
|
||||
u_int32_t runBusy() {
|
||||
#ifdef VIRTUAL
|
||||
return virtual_status;
|
||||
#endif
|
||||
u_int32_t s = ((bus_r(STATUS_REG) & RUN_BUSY_MSK) >> RUN_BUSY_OFST);
|
||||
u_int32_t s = (bus_r(STATUS_REG) & RUN_BUSY_MSK);
|
||||
FILE_LOG(logDEBUG1, ("Status Register: %08x\n", s));
|
||||
return s;
|
||||
}
|
||||
@ -1620,45 +1583,6 @@ u_int32_t runBusy(void) {
|
||||
|
||||
/* common */
|
||||
|
||||
//jungfrau doesnt require chips and chans (save memory)
|
||||
int copyModule(sls_detector_module *destMod, sls_detector_module *srcMod){
|
||||
|
||||
int idac;
|
||||
int ret=OK;
|
||||
|
||||
FILE_LOG(logDEBUG1, ("Copying module\n"));
|
||||
|
||||
if (srcMod->serialnumber>=0){
|
||||
destMod->serialnumber=srcMod->serialnumber;
|
||||
}
|
||||
if ((srcMod->nchip)>(destMod->nchip)) {
|
||||
FILE_LOG(logERROR, ("Number of chip of source is larger than number of chips of destination\n"));
|
||||
return FAIL;
|
||||
}
|
||||
if ((srcMod->nchan)>(destMod->nchan)) {
|
||||
FILE_LOG(logERROR, ("Number of channels of source is larger than number of channels of destination\n"));
|
||||
return FAIL;
|
||||
}
|
||||
if ((srcMod->ndac)>(destMod->ndac)) {
|
||||
FILE_LOG(logERROR, ("Number of dacs of source is larger than number of dacs of destination\n"));
|
||||
return FAIL;
|
||||
}
|
||||
FILE_LOG(logDEBUG1, ("DACs: src %d, dest %d\n",srcMod->ndac,destMod->ndac));
|
||||
FILE_LOG(logDEBUG1, ("Chips: src %d, dest %d\n",srcMod->nchip,destMod->nchip));
|
||||
FILE_LOG(logDEBUG1, ("Chans: src %d, dest %d\n",srcMod->nchan,destMod->nchan));
|
||||
|
||||
if (srcMod->reg>=0)
|
||||
destMod->reg=srcMod->reg;
|
||||
FILE_LOG(logDEBUG1, ("Copying register %x (%x)\n",destMod->reg,srcMod->reg ));
|
||||
|
||||
for (idac=0; idac<(srcMod->ndac); idac++) {
|
||||
if (*((srcMod->dacs)+idac)>=0)
|
||||
*((destMod->dacs)+idac)=*((srcMod->dacs)+idac);
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
int calculateDataBytes(){
|
||||
return DATA_BYTES;
|
||||
}
|
||||
|
||||
@ -38,11 +38,8 @@ enum DACINDEX {VB_COMP, VDD_PROT, VIN_COM, VREF_PRECH, VB_PIXBUF, VB_DS, VREF
|
||||
480, /* VREF_DS */ \
|
||||
420 /* VREF_COMP */ \
|
||||
};
|
||||
|
||||
enum NETWORKINDEX { TXN_FRAME };
|
||||
|
||||
|
||||
|
||||
/* Hardware Definitions */
|
||||
#define NCHAN (256 * 256)
|
||||
#define NCHIP (8)
|
||||
@ -55,7 +52,6 @@ enum NETWORKINDEX { TXN_FRAME };
|
||||
#define CLK_RUN (40) /* MHz */
|
||||
#define CLK_SYNC (20) /* MHz */
|
||||
|
||||
|
||||
/** Default Parameters */
|
||||
#define DEFAULT_NUM_FRAMES (100*1000*1000)
|
||||
#define DEFAULT_NUM_CYCLES (1)
|
||||
@ -78,7 +74,6 @@ enum NETWORKINDEX { TXN_FRAME };
|
||||
#define MAX_STORAGE_CELL_VAL (15) //0xF
|
||||
#define ACQ_TIME_MIN_CLOCK (2)
|
||||
|
||||
|
||||
#define SAMPLE_ADC_HALF_SPEED (SAMPLE_DECMT_FACTOR_2_VAL + SAMPLE_DGTL_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_0_VAL + SAMPLE_ADC_SAMPLE_0_VAL) /* 0x1000 */
|
||||
#define SAMPLE_ADC_QUARTER_SPEED (SAMPLE_DECMT_FACTOR_4_VAL + SAMPLE_DGTL_SAMPLE_8_VAL + SAMPLE_ADC_DECMT_FACTOR_1_VAL + SAMPLE_ADC_SAMPLE_0_VAL) /* 0x2810 */
|
||||
#define CONFIG_HALF_SPEED (CONFIG_TDMA_DISABLE_VAL + CONFIG_HALF_SPEED_20MHZ_VAL + CONFIG_MODE_1_X_10GBE_VAL)
|
||||
@ -89,15 +84,6 @@ enum NETWORKINDEX { TXN_FRAME };
|
||||
#define ADC_PHASE_QUARTER_SPEED (0x2D) //45
|
||||
#define ADC_PORT_INVERT_VAL (0x453b2a9c)
|
||||
|
||||
/* Maybe not required for jungfrau */
|
||||
#define NTRIMBITS (6)
|
||||
#define NCOUNTBITS (24)
|
||||
#define NCHIPS_PER_ADC (2)
|
||||
#define TRIM_DR (((int)pow(2,NTRIMBITS))-1)
|
||||
#define COUNT_DR (((int)pow(2,NCOUNTBITS))-1)
|
||||
#define ALLMOD (0xffff)
|
||||
#define ALLFIFO (0xffff)
|
||||
|
||||
/* MSB & LSB DEFINES */
|
||||
#define MSB_OF_64_BIT_REG_OFST (32)
|
||||
#define LSB_OF_64_BIT_REG_OFST (0)
|
||||
@ -116,14 +102,11 @@ enum NETWORKINDEX { TXN_FRAME };
|
||||
#define LTC2620_DAC_CMD_POWER_DOWN (0x00000004 << LTC2620_DAC_CMD_OFST)
|
||||
#define LTC2620_DAC_NUMBITS (24)
|
||||
|
||||
|
||||
/* MAX1932 HV DEFINES */
|
||||
#define MAX1932_HV_NUMBITS (8)
|
||||
#define MAX1932_HV_DATA_OFST (0)
|
||||
#define MAX1932_HV_DATA_MSK (0x000000FF << MAX1932_HV_DATA_OFST)
|
||||
|
||||
|
||||
|
||||
/** PLL Reconfiguration Registers */
|
||||
//https://www.altera.com/documentation/mcn1424769382940.html
|
||||
#define PLL_MODE_REG (0x00)
|
||||
|
||||
@ -1,5 +1,4 @@
|
||||
#ifndef AD9257_H
|
||||
#define AD9257_H
|
||||
#pragma once
|
||||
|
||||
#include "commonServerFunctions.h" // blackfin.h, ansi.h
|
||||
|
||||
@ -90,12 +89,24 @@ void prepareADC(){
|
||||
FILE_LOG(logINFO, ("\tPower mode reset\n"));
|
||||
setAdc(AD9257_POWER_MODE_REG,
|
||||
(AD9257_INT_RESET_VAL << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK);
|
||||
#ifdef GOTTHARDD
|
||||
usleep(50000);
|
||||
#endif
|
||||
|
||||
//power mode chip run
|
||||
FILE_LOG(logINFO, ("\tPower mode chip run\n"));
|
||||
setAdc(AD9257_POWER_MODE_REG,
|
||||
(AD9257_INT_CHIP_RUN_VAL << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK);
|
||||
#ifdef GOTTHARDD
|
||||
usleep(50000);
|
||||
|
||||
// binary offset
|
||||
FILE_LOG(logINFO, ("\tBinary offset\n"));
|
||||
setAdc(AD9257_OUT_MODE_REG,
|
||||
(AD9257_OUT_BINARY_OFST_VAL << AD9257_OUT_FORMAT_OFST) & AD9257_OUT_FORMAT_MSK);
|
||||
usleep(50000);
|
||||
return;
|
||||
#endif
|
||||
//output clock phase
|
||||
FILE_LOG(logINFO, ("\tOutput clock phase\n"));
|
||||
setAdc(AD9257_OUT_PHASE_REG,
|
||||
@ -132,5 +143,3 @@ void prepareADC(){
|
||||
(AD9257_MIXED_BIT_FREQ_VAL << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK);
|
||||
#endif
|
||||
}
|
||||
|
||||
#endif //AD9257_H
|
||||
|
||||
@ -1,13 +1,6 @@
|
||||
#ifndef COMMON_SERVER_FUNCTIONS_H
|
||||
#define COMMON_SERVER_FUNCTIONS_H
|
||||
#pragma once
|
||||
|
||||
#ifndef GOTTHARDD //gotthard already had bus_w etc defined in its firmware_funcs.c (not yet made with common files)
|
||||
#include "blackfin.h"
|
||||
#else
|
||||
#include "ansi.h"
|
||||
#endif
|
||||
|
||||
/* global variables */
|
||||
|
||||
void SPIChipSelect (u_int32_t* valw, u_int32_t addr, u_int32_t csmask) {
|
||||
|
||||
@ -69,5 +62,3 @@ void serializeToSPI(u_int32_t addr, u_int32_t val, u_int32_t csmask, int numbits
|
||||
|
||||
SPIChipDeselect(&valw, addr, csmask, clkmask);
|
||||
}
|
||||
|
||||
#endif //COMMON_SERVER_FUNCTIONS_H
|
||||
|
||||
@ -13,20 +13,21 @@ Here are the definitions, but the actual implementation should be done for each
|
||||
|
||||
|
||||
// basic tests
|
||||
#if defined(EIGERD) || defined(JUNGFRAUD) || defined(GOTTHARD)
|
||||
#if defined(EIGERD) || defined(JUNGFRAUD) || defined(GOTTHARDD)
|
||||
int isFirmwareCheckDone();
|
||||
int getFirmwareCheckResult(char** mess);
|
||||
#endif
|
||||
|
||||
void checkFirmwareCompatibility();
|
||||
void basictests();
|
||||
#ifdef JUNGFRAUD
|
||||
int checkType();
|
||||
u_int32_t testFpga(void);
|
||||
int testBus(void);
|
||||
#endif
|
||||
|
||||
#ifdef JUNGFRAUD
|
||||
int detectorTest( enum digitalTestMode arg);
|
||||
#ifdef GOTTHARDD
|
||||
int detectorTest(enum digitalTestMode arg, int ival);
|
||||
#elif JUNGFRAUD
|
||||
int detectorTest(enum digitalTestMode arg);
|
||||
#endif
|
||||
|
||||
// Ids
|
||||
@ -40,6 +41,9 @@ u_int16_t getHardwareSerialNumber();
|
||||
u_int32_t getDetectorNumber();
|
||||
u_int64_t getDetectorMAC();
|
||||
u_int32_t getDetectorIP();
|
||||
#ifdef GOTTHARDD
|
||||
u_int32_t getBoardRevision();
|
||||
#endif
|
||||
|
||||
|
||||
// initialization
|
||||
@ -50,9 +54,11 @@ void getModuleConfiguration();
|
||||
#endif
|
||||
|
||||
// set up detector
|
||||
#ifdef EIGERD
|
||||
void allocateDetectorStructureMemory();
|
||||
#endif
|
||||
void setupDetector();
|
||||
#ifdef JUNGFRAUD
|
||||
#if defined(GOTTHARDD) || defined(JUNGFRAUD)
|
||||
int setDefaultDacs();
|
||||
#endif
|
||||
|
||||
@ -61,9 +67,12 @@ int setDefaultDacs();
|
||||
#ifndef EIGERD
|
||||
extern u_int32_t writeRegister(u_int32_t offset, u_int32_t data); // blackfin.h
|
||||
extern u_int32_t readRegister(u_int32_t offset); // blackfin.h
|
||||
#else
|
||||
#elif JUNGFRAUD
|
||||
uint32_t writeRegister(uint32_t offset, uint32_t data);
|
||||
uint32_t readRegister(uint32_t offset);
|
||||
#else
|
||||
uint32_t writeRegister16And32(uint32_t offset, uint32_t data);
|
||||
uint32_t readRegister16And32(uint32_t offset);
|
||||
#endif
|
||||
|
||||
|
||||
@ -77,16 +86,29 @@ int autoCompDisable(int on);
|
||||
int adcPhase(int st);
|
||||
int getPhase();
|
||||
void configureASICTimer();
|
||||
#elif GOTTHARDD
|
||||
void setPhaseShiftOnce();
|
||||
void setPhaseShift(int numphaseshift);
|
||||
void cleanFifos();
|
||||
void setADCSyncRegister();
|
||||
void setDAQRegister();
|
||||
void setChipOfInterestRegister(int adc);
|
||||
void setROIADC(int adc);
|
||||
void setGbitReadout();
|
||||
int readConfigFile();
|
||||
void setMasterSlaveConfiguration();
|
||||
#endif
|
||||
|
||||
// parameters - dr, roi
|
||||
int setDynamicRange(int dr);
|
||||
#ifdef GOTTHARD
|
||||
int setROI(int n, ROI arg[], int *retvalsize, int *ret);
|
||||
ROI* setROI(int n, ROI arg[], int *retvalsize, int *ret);
|
||||
#endif
|
||||
|
||||
// parameters - readout
|
||||
#ifndef GOTTHARDD
|
||||
enum speedVariable setSpeed(int val);
|
||||
#endif
|
||||
#ifdef EIGERD
|
||||
enum readOutFlags setReadOutFlags(enum readOutFlags val);
|
||||
#endif
|
||||
@ -114,17 +136,23 @@ int setThresholdEnergy(int ev);
|
||||
|
||||
// parameters - dac, adc, hv
|
||||
#ifdef JUNGFRAUD
|
||||
void serializeToSPI(u_int32_t addr, u_int32_t val, u_int32_t csmask, int numbitstosend, u_int32_t clkmask, u_int32_t digoutmask, int digofset);
|
||||
void serializeToSPI(u_int32_t addr, u_int32_t val, u_int32_t csmask, int numbitstosend, u_int32_t clkmask, u_int32_t digoutmask, int digofset); //commonServerFunction.h
|
||||
void initDac(int dacnum);
|
||||
#endif
|
||||
#if defined(GOTTHARDD) || defined(JUNGFRAUD)
|
||||
int voltageToDac(int value);
|
||||
int dacToVoltage(unsigned int digital);
|
||||
#endif
|
||||
|
||||
#ifdef JUNGFRAUD
|
||||
extern void setAdc(int addr, int val); // AD9257.h
|
||||
#endif
|
||||
|
||||
void setDAC(enum DACINDEX ind, int val, int mV, int retval[]);
|
||||
#ifdef GOTTHARDD
|
||||
void initDAC(int dac_addr, int value);
|
||||
void clearDACSregister();
|
||||
void nextDAC();
|
||||
void program_one_dac(int addr, int value);
|
||||
u_int32_t putout(char *s);
|
||||
#endif
|
||||
int getADC(enum ADCINDEX ind);
|
||||
|
||||
int setHighVoltage(int val);
|
||||
@ -134,16 +162,21 @@ int setHighVoltage(int val);
|
||||
// parameters - timing, extsig
|
||||
void setTiming( enum externalCommunicationMode arg);
|
||||
enum externalCommunicationMode getTiming();
|
||||
#ifdef GOTTHARDD
|
||||
void setExtSignal(enum externalSignalFlag mode);
|
||||
int getExtSignal();
|
||||
#endif
|
||||
|
||||
// configure mac
|
||||
#ifdef JUNGFRAUD
|
||||
#ifdef GOTTHARDD
|
||||
void calcChecksum(mac_conf* mac, int sourceip, int destip);
|
||||
#elif JUNGFRAUD
|
||||
long int calcChecksum(int sourceip, int destip);
|
||||
#endif
|
||||
#ifdef GOTTHARDD
|
||||
int configureMAC(uint32_t destip, uint64_t destmac, uint64_t sourcemac, uint32_t sourceip, uint32_t udpport, uint32_t udpport2, int ival);
|
||||
#else
|
||||
int configureMAC(uint32_t destip, uint64_t destmac, uint64_t sourcemac, uint32_t sourceip, uint32_t udpport, uint32_t udpport2);
|
||||
int getAdcConfigured();
|
||||
#endif
|
||||
int configureMAC(uint32_t destip, uint64_t destmac, uint64_t sourcemac, uint32_t sourceip, uint32_t udpport, uint32_t udpport2);
|
||||
#if defined(JUNGFRAUD) || defined(EIGERD)
|
||||
int setDetectorPosition(int pos[]);
|
||||
#endif
|
||||
@ -153,10 +186,9 @@ int setDetectorPosition(int pos[]);
|
||||
|
||||
// gotthard specific - image, pedestal
|
||||
#ifdef GOTTHARDD
|
||||
int loadImage(enum imageType index, char *imageVals);
|
||||
void loadImage(enum imageType index, short int imageVals[]);
|
||||
int readCounterBlock(int startACQ, char *counterVals);
|
||||
int resetCounterBlock(int startACQ);
|
||||
int calibratePedestal(int frames);
|
||||
|
||||
// jungfrau specific - pll, flashing firmware
|
||||
#elif JUNGFRAUD
|
||||
@ -198,7 +230,7 @@ int setNetworkParameter(enum NETWORKINDEX mode, int value);
|
||||
|
||||
|
||||
// aquisition
|
||||
#if defined(EIGERD) || defined(GOTTHARD)
|
||||
#ifdef EIGERD
|
||||
int prepareAcquisition();
|
||||
#endif
|
||||
int startStateMachine();
|
||||
@ -209,18 +241,23 @@ int stopStateMachine();
|
||||
#ifdef EIGERD
|
||||
int softwareTrigger();
|
||||
#endif
|
||||
#ifndef JUNGFRAUD
|
||||
#ifdef EIGERD
|
||||
int startReadOut();
|
||||
#endif
|
||||
enum runStatus getRunStatus();
|
||||
void readFrame(int *ret, char *mess);
|
||||
#ifdef JUNGFRAUD
|
||||
u_int32_t runBusy(void);
|
||||
#if defined(GOTTHARDD) || defined(JUNGFRAUD)
|
||||
u_int32_t runBusy();
|
||||
#endif
|
||||
#ifdef GOTTHARDD
|
||||
u_int32_t runState();
|
||||
#endif
|
||||
|
||||
|
||||
//common
|
||||
#ifdef EIGERD
|
||||
int copyModule(sls_detector_module *destMod, sls_detector_module *srcMod);
|
||||
#endif
|
||||
int calculateDataBytes();
|
||||
int getTotalNumberOfChannels();
|
||||
int getNumberOfChips();
|
||||
|
||||
@ -19,6 +19,11 @@ extern int ret;
|
||||
extern int sockfd;
|
||||
extern int debugflag;
|
||||
|
||||
// Global variables from slsDetectorFunctionList
|
||||
#ifdef GOTTHARDD
|
||||
extern int phaseShift;
|
||||
#endif
|
||||
|
||||
void error(char *msg){
|
||||
perror(msg);
|
||||
}
|
||||
@ -41,10 +46,23 @@ int main(int argc, char *argv[]){
|
||||
FILE_LOG(logINFO, ("Detected stop server\n"));
|
||||
isControlServer = 0;
|
||||
}
|
||||
else if(!strcasecmp(argv[i],"-devel")){
|
||||
FILE_LOG(logINFO, ("Detected developer mode\n"));
|
||||
debugflag = 1;
|
||||
else if(!strcasecmp(argv[i],"-devel")){
|
||||
FILE_LOG(logINFO, ("Detected developer mode\n"));
|
||||
debugflag = DEVELOPER_MODE;
|
||||
}
|
||||
#ifdef GOTTHARDD
|
||||
else if(!strcasecmp(argv[i],"-phaseshift")){
|
||||
if ((i + 1) >= argc) {
|
||||
FILE_LOG(logERROR, ("no phase shift value given. Exiting.\n"));
|
||||
return -1;
|
||||
}
|
||||
if (sscanf(argv[i + 1], "%d", &phaseShift) == 0) {
|
||||
FILE_LOG(logERROR, ("cannot decode phase shift value %s. Exiting.\n", argv[i + 1]));
|
||||
return -1;
|
||||
}
|
||||
FILE_LOG(logINFO, ("Detected phase shift of %d\n", phaseShift));
|
||||
}
|
||||
#endif
|
||||
#ifdef JUNGFRAUD
|
||||
else if(!strcasecmp(argv[i],"-update")){
|
||||
FILE_LOG(logINFO, ("Detected update mode\n"));
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -3,7 +3,6 @@
|
||||
|
||||
// initialization functions
|
||||
int printSocketReadError();
|
||||
void basictests();
|
||||
void init_detector();
|
||||
int decode_function(int);
|
||||
const char* getFunctionName(enum detFuncs func);
|
||||
|
||||
@ -42,7 +42,7 @@ slsDetector::slsDetector(detectorType type, int multiId, int id, bool verify)
|
||||
// ensure shared memory was not created before
|
||||
auto shm = SharedMemory(multiId, id);
|
||||
if (shm.IsExisting()) {
|
||||
FILE_LOG(logWARNING) << "Weird, this shared memory should have been "
|
||||
FILE_LOG(logWARNING) << "This shared memory should have been "
|
||||
"deleted before! " << shm.GetName() << ". Freeing it again";
|
||||
freeSharedMemory(multiId, id);
|
||||
}
|
||||
@ -1402,12 +1402,6 @@ int slsDetector::updateDetectorNoWait() {
|
||||
thisDetector->timerValue[DELAY_AFTER_TRIGGER] = i64;
|
||||
}
|
||||
|
||||
if ((thisDetector->myDetectorType != JUNGFRAU) &&
|
||||
(thisDetector->myDetectorType != EIGER)) {
|
||||
n += controlSocket->ReceiveDataOnly(&i64, sizeof(i64));
|
||||
thisDetector->timerValue[GATES_NUMBER] = i64;
|
||||
}
|
||||
|
||||
n += controlSocket->ReceiveDataOnly(&i64, sizeof(i64));
|
||||
thisDetector->timerValue[CYCLES_NUMBER] = i64;
|
||||
|
||||
@ -2060,7 +2054,7 @@ int slsDetector::configureMAC() {
|
||||
int ret = FAIL;
|
||||
char args[9][50];
|
||||
memset(args, 0, sizeof(args));
|
||||
char retvals[3][50];
|
||||
char retvals[2][50];
|
||||
memset(retvals, 0, sizeof(retvals));
|
||||
FILE_LOG(logDEBUG1) << "Configuring MAC";
|
||||
|
||||
@ -2186,30 +2180,30 @@ int slsDetector::configureMAC() {
|
||||
// get detectormac, detector ip
|
||||
uint64_t idetectormac = 0;
|
||||
uint32_t idetectorip = 0;
|
||||
sscanf(retvals[1], "%lx", &idetectormac);
|
||||
sscanf(retvals[2], "%x", &idetectorip);
|
||||
sprintf(retvals[1],"%02x:%02x:%02x:%02x:%02x:%02x",
|
||||
sscanf(retvals[0], "%lx", &idetectormac);
|
||||
sscanf(retvals[1], "%x", &idetectorip);
|
||||
sprintf(retvals[0],"%02x:%02x:%02x:%02x:%02x:%02x",
|
||||
(unsigned int)((idetectormac>>40)&0xFF),
|
||||
(unsigned int)((idetectormac>>32)&0xFF),
|
||||
(unsigned int)((idetectormac>>24)&0xFF),
|
||||
(unsigned int)((idetectormac>>16)&0xFF),
|
||||
(unsigned int)((idetectormac>>8)&0xFF),
|
||||
(unsigned int)((idetectormac>>0)&0xFF));
|
||||
sprintf(retvals[2],"%d.%d.%d.%d",
|
||||
sprintf(retvals[1],"%d.%d.%d.%d",
|
||||
(idetectorip>>24)&0xff,
|
||||
(idetectorip>>16)&0xff,
|
||||
(idetectorip>>8)&0xff,
|
||||
(idetectorip)&0xff);
|
||||
// update if different
|
||||
if (strcasecmp(retvals[1],thisDetector->detectorMAC)) {
|
||||
if (strcasecmp(retvals[0],thisDetector->detectorMAC)) {
|
||||
memset(thisDetector->detectorMAC, 0, MAX_STR_LENGTH);
|
||||
strcpy(thisDetector->detectorMAC, retvals[1]);
|
||||
strcpy(thisDetector->detectorMAC, retvals[0]);
|
||||
FILE_LOG(logINFO) << detId << ": Detector MAC updated to " <<
|
||||
thisDetector->detectorMAC;
|
||||
}
|
||||
if (strcasecmp(retvals[2],thisDetector->detectorIP)) {
|
||||
if (strcasecmp(retvals[1],thisDetector->detectorIP)) {
|
||||
memset(thisDetector->detectorIP, 0, MAX_STR_LENGTH);
|
||||
strcpy(thisDetector->detectorIP, retvals[2]);
|
||||
strcpy(thisDetector->detectorIP, retvals[1]);
|
||||
FILE_LOG(logINFO) << detId << ": Detector IP updated to " <<
|
||||
thisDetector->detectorIP;
|
||||
}
|
||||
@ -3364,11 +3358,12 @@ int slsDetector::digitalTest( digitalTestMode mode, int ival) {
|
||||
|
||||
int slsDetector::loadImageToDetector(imageType index,std::string const fname) {
|
||||
int ret = FAIL;
|
||||
short int args[thisDetector->nChans * thisDetector->nChips];
|
||||
int nChan = getTotalNumberOfChannels();
|
||||
short int args[nChan];
|
||||
FILE_LOG(logDEBUG1) << "Loading " << (!index ? "Dark" : "Gain") << "image from file " << fname;
|
||||
|
||||
if (readDataFile(fname, args, getTotalNumberOfChannels())) {
|
||||
ret = sendImageToDetector(index,args);
|
||||
if (readDataFile(fname, args, nChan)) {
|
||||
ret = sendImageToDetector(index, args);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -3381,18 +3376,24 @@ int slsDetector::loadImageToDetector(imageType index,std::string const fname) {
|
||||
int slsDetector::sendImageToDetector(imageType index,short int imageVals[]) {
|
||||
int fnum = F_LOAD_IMAGE;
|
||||
int ret = FAIL;
|
||||
int nChan = getTotalNumberOfChannels();
|
||||
int args[2] = {(int)index, nChan};
|
||||
FILE_LOG(logDEBUG1) << "Sending image to detector";
|
||||
|
||||
if (thisDetector->onlineFlag == ONLINE_FLAG && connectControl() == OK) {
|
||||
ret = thisDetectorControl->Client_Send(fnum,
|
||||
imageVals, thisDetector->dataBytes, NULL, 0);
|
||||
disconnectControl();
|
||||
|
||||
// handle ret
|
||||
if (ret == FAIL) {
|
||||
setErrorMask((getErrorMask())|(OTHER_ERROR_CODE));
|
||||
} else if (ret == FORCE_UPDATE)
|
||||
ret = updateDetector();
|
||||
controlSocket->SendDataOnly(&fnum, sizeof(fnum));
|
||||
controlSocket->SendDataOnly(args, sizeof(args));
|
||||
controlSocket->SendDataOnly(imageVals, nChan * sizeof(short int));
|
||||
controlSocket->ReceiveDataOnly(&ret, sizeof(ret));
|
||||
if (ret == FAIL) {
|
||||
char mess[MAX_STR_LENGTH] = {0};
|
||||
setErrorMask((getErrorMask())|(OTHER_ERROR_CODE));
|
||||
controlSocket->ReceiveDataOnly(mess, MAX_STR_LENGTH);
|
||||
FILE_LOG(logERROR) << "Detector " << detId << " returned error: " << mess;
|
||||
}
|
||||
disconnectControl();
|
||||
if (ret == FORCE_UPDATE)
|
||||
ret = updateDetector();
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
@ -3400,7 +3401,8 @@ int slsDetector::sendImageToDetector(imageType index,short int imageVals[]) {
|
||||
|
||||
int slsDetector::writeCounterBlockFile(std::string const fname,int startACQ) {
|
||||
int ret = FAIL;
|
||||
short int retvals[thisDetector->nChans * thisDetector->nChips];
|
||||
int nChan = getTotalNumberOfChannels();
|
||||
short int retvals[nChan];
|
||||
FILE_LOG(logDEBUG1) << "Reading Counter to " << fname <<
|
||||
(startACQ ? " and Restarting Acquisition" : "\n");
|
||||
|
||||
@ -3408,20 +3410,22 @@ int slsDetector::writeCounterBlockFile(std::string const fname,int startACQ) {
|
||||
if (ret == FAIL)
|
||||
setErrorMask((getErrorMask())|(OTHER_ERROR_CODE));
|
||||
else
|
||||
ret=writeDataFile(fname, getTotalNumberOfChannels(), retvals);
|
||||
ret = writeDataFile(fname, nChan, retvals);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
int slsDetector::getCounterBlock(short int image[],int startACQ) {
|
||||
int fnum = F_READ_COUNTER_BLOCK;
|
||||
int nChan = getTotalNumberOfChannels();
|
||||
int fnum = F_READ_COUNTER_BLOCK;
|
||||
int ret = FAIL;
|
||||
int arg = startACQ;
|
||||
int nChan = getTotalNumberOfChannels();
|
||||
int args[2] = {startACQ, nChan};
|
||||
FILE_LOG(logDEBUG1) << "Reading Counter block with startacq: " << startACQ;
|
||||
|
||||
if (thisDetector->onlineFlag == ONLINE_FLAG && connectControl() == OK) {
|
||||
ret = thisDetectorControl->Client_Send(fnum,
|
||||
&arg, sizeof(arg), image, thisDetector->dataBytes);
|
||||
args, sizeof(args), image, nChan * sizeof(short int));
|
||||
disconnectControl();
|
||||
|
||||
// handle ret
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user