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https://github.com/slsdetectorgroup/slsDetectorPackage.git
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ctb/moench server: clock fix, max shifts per clock is calculated everytime
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c15e72510c
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@ -1,9 +1,9 @@
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Path: slsDetectorPackage/slsDetectorServers/ctbDetectorServer
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Path: slsDetectorPackage/slsDetectorServers/ctbDetectorServer
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URL: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git
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URL: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git
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Repository Root: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git
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Repository Root: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git
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Repsitory UUID: 050854de36f01379e974005e204b6563ffbc7004
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Repsitory UUID: c15e72510ca9e11eeb234e94dae47c6e3c163c3b
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Revision: 43
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Revision: 44
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Branch: refactor
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Branch: refactor
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Last Changed Author: Dhanya_Thattil
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Last Changed Author: Gemma_Tinti
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Last Changed Rev: 4458
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Last Changed Rev: 4473
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Last Changed Date: 2019-03-21 14:00:57.000000002 +0100 ../slsDetectorServer/ALTERA_PLL.h
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Last Changed Date: 2019-03-25 14:39:58.000000002 +0100 ./slsDetectorFunctionList.c
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@ -1,6 +1,6 @@
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#define GITURL "git@github.com:slsdetectorgroup/slsDetectorPackage.git"
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#define GITURL "git@github.com:slsdetectorgroup/slsDetectorPackage.git"
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#define GITREPUUID "050854de36f01379e974005e204b6563ffbc7004"
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#define GITREPUUID "c15e72510ca9e11eeb234e94dae47c6e3c163c3b"
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#define GITAUTH "Dhanya_Thattil"
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#define GITAUTH "Gemma_Tinti"
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#define GITREV 0x4458
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#define GITREV 0x4473
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#define GITDATE 0x20190321
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#define GITDATE 0x20190325
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#define GITBRANCH "refactor"
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#define GITBRANCH "refactor"
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@ -1656,7 +1656,9 @@ void configurePhase(enum CLKINDEX ind, int val) {
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int phase = 0;
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int phase = 0;
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int maxShifts = ((ind == ADC_CLK) ? MAX_PHASE_SHIFTS_ADC_CLK : MAX_PHASE_SHIFTS_DBIT_CLK);
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int maxShifts = (PLL_VCO_FREQ_MHZ / clkDivider[ind]) * MAX_PHASE_SHIFTS_STEPS;
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FILE_LOG(logDEBUG1, ("Clock: %d MHz, VCO:%d MHz, Max Phase shifts:%d\n",
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clkDivider[ind], PLL_VCO_FREQ_MHZ, maxShifts));
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// delay clk
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// delay clk
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if (relativePhase > 0) {
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if (relativePhase > 0) {
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@ -80,8 +80,7 @@ enum DACINDEX {D0, D1, D2, D3, D4, D5, D6, D7, D8, D9,
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/* Defines in the Firmware */
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/* Defines in the Firmware */
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#define MAX_PATTERN_LENGTH (0xFFFF)
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#define MAX_PATTERN_LENGTH (0xFFFF)
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#define DIGITAL_IO_DELAY_MAXIMUM_PS ((OUTPUT_DELAY_0_OTPT_STTNG_MSK >> OUTPUT_DELAY_0_OTPT_STTNG_OFST) * OUTPUT_DELAY_0_OTPT_STTNG_STEPS)
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#define DIGITAL_IO_DELAY_MAXIMUM_PS ((OUTPUT_DELAY_0_OTPT_STTNG_MSK >> OUTPUT_DELAY_0_OTPT_STTNG_OFST) * OUTPUT_DELAY_0_OTPT_STTNG_STEPS)
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#define MAX_PHASE_SHIFTS_ADC_CLK (320)
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#define MAX_PHASE_SHIFTS_STEPS (8)
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#define MAX_PHASE_SHIFTS_DBIT_CLK (32)
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#define WAIT_TME_US_FR_ACQDONE_REG (100) // wait time in us after acquisition done to ensure there is no data in fifo
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#define WAIT_TME_US_FR_ACQDONE_REG (100) // wait time in us after acquisition done to ensure there is no data in fifo
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#define WAIT_TIME_US_PLL (10 * 1000)
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#define WAIT_TIME_US_PLL (10 * 1000)
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@ -1,9 +1,9 @@
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Path: slsDetectorPackage/slsDetectorServers/moenchDetectorServer
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Path: slsDetectorPackage/slsDetectorServers/moenchDetectorServer
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URL: origin https://www.github.com/slsdetectorgroup/slsDetectorPackage
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URL: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git
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Repository Root: origin https://www.github.com/slsdetectorgroup/slsDetectorPackage
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Repository Root: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git
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Repsitory UUID: 6765fd0dc89176b4eceaf5e2304ef808a316ba9b
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Repsitory UUID: c15e72510ca9e11eeb234e94dae47c6e3c163c3b
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Revision: 16
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Revision: 20
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Branch: refactor
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Branch: refactor
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Last Changed Author: Dhanya_Thattil
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Last Changed Author: Gemma_Tinti
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Last Changed Rev: 4394
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Last Changed Rev: 4473
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Last Changed Date: 2019-03-13 08:04:56.000000002 +0100 ./RegisterDefs.h
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Last Changed Date: 2019-03-25 14:39:22.000000002 +0100 ./slsDetectorFunctionList.c
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@ -1,6 +1,6 @@
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#define GITURL "https://www.github.com/slsdetectorgroup/slsDetectorPackage"
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#define GITURL "git@github.com:slsdetectorgroup/slsDetectorPackage.git"
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#define GITREPUUID "6765fd0dc89176b4eceaf5e2304ef808a316ba9b"
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#define GITREPUUID "c15e72510ca9e11eeb234e94dae47c6e3c163c3b"
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#define GITAUTH "Dhanya_Thattil"
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#define GITAUTH "Gemma_Tinti"
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#define GITREV 0x4394
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#define GITREV 0x4473
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#define GITDATE 0x20190313
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#define GITDATE 0x20190325
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#define GITBRANCH "refactor"
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#define GITBRANCH "refactor"
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@ -1292,7 +1292,9 @@ void configurePhase(enum CLKINDEX ind, int val) {
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int phase = 0;
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int phase = 0;
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int maxShifts = ((ind == ADC_CLK) ? MAX_PHASE_SHIFTS_ADC_CLK : MAX_PHASE_SHIFTS_DBIT_CLK);
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int maxShifts = (PLL_VCO_FREQ_MHZ / clkDivider[ind]) * MAX_PHASE_SHIFTS_STEPS;
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FILE_LOG(logDEBUG1, ("Clock: %d MHz, VCO:%d MHz, Max Phase shifts:%d\n",
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clkDivider[ind], PLL_VCO_FREQ_MHZ, maxShifts));
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// delay clk
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// delay clk
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if (relativePhase > 0) {
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if (relativePhase > 0) {
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@ -61,8 +61,7 @@ enum DACINDEX {D0, D1, D2, D3, D4, D5, D6, D7};
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/* Defines in the Firmware */
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/* Defines in the Firmware */
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#define MAX_PATTERN_LENGTH (0xFFFF)
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#define MAX_PATTERN_LENGTH (0xFFFF)
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#define DIGITAL_IO_DELAY_MAXIMUM_PS ((OUTPUT_DELAY_0_OTPT_STTNG_MSK >> OUTPUT_DELAY_0_OTPT_STTNG_OFST) * OUTPUT_DELAY_0_OTPT_STTNG_STEPS)
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#define DIGITAL_IO_DELAY_MAXIMUM_PS ((OUTPUT_DELAY_0_OTPT_STTNG_MSK >> OUTPUT_DELAY_0_OTPT_STTNG_OFST) * OUTPUT_DELAY_0_OTPT_STTNG_STEPS)
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#define MAX_PHASE_SHIFTS_ADC_CLK (320)
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#define MAX_PHASE_SHIFTS_STEPS (8)
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#define MAX_PHASE_SHIFTS_DBIT_CLK (32)
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#define WAIT_TME_US_FR_ACQDONE_REG (100) // wait time in us after acquisition done to ensure there is no data in fifo
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#define WAIT_TME_US_FR_ACQDONE_REG (100) // wait time in us after acquisition done to ensure there is no data in fifo
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#define WAIT_TIME_US_PLL (10 * 1000)
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#define WAIT_TIME_US_PLL (10 * 1000)
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