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802: jungfrau HW 1.0: adc output clock phase to 120 (#951)

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* jungfrau: change adc output clock phase from 180 to 120 for v1.0 boards for reliable readout of adc #2

* formatting
This commit is contained in:
maliakal_d
2024-08-22 14:27:16 +02:00
committed by GitHub
parent 7a28ba03c9
commit 8ada7b6e37
8 changed files with 25 additions and 2 deletions
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2
slsSupportLib/include/sls/versionAPI.h
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@@ -6,8 +6,8 @@
#define APICTB "8.0.0 0x231109"
#define APIGOTTHARD "8.0.0 0x231109"
#define APIGOTTHARD2 "8.0.0 0x231109"
#define APIJUNGFRAU "8.0.0 0x231109"
#define APIEIGER "8.0.0 0x231109"
#define APILIB "8.0.1 0x240112"
#define APIMOENCH "8.0.2 0x240703"
#define APIMYTHEN3 "8.0.2 0x240715"
#define APIJUNGFRAU "8.0.2 0x240822"