mythen3: fix of external signals to not allow master output inversion, but can edge detect not configurable, and default dout pulse length

This commit is contained in:
2020-05-28 13:09:09 +02:00
parent 754536898a
commit 8aa7144252
6 changed files with 51 additions and 20 deletions

View File

@ -41,6 +41,7 @@
#define DEFAULT_SYSTEM_C1 (10) //(125000000) // chip_clk, 125 MHz
#define DEFAULT_SYSTEM_C2 (10) //(125000000) // sync_clk, 125 MHz
#define DEFAULT_ASIC_LATCHING_NUM_PULSES (10)
#define DEFAULT_MSTR_OTPT_P1_NUM_PULSES (20)
/* Firmware Definitions */
#define IP_HEADER_SIZE (20)