settings file shud read and write according ot dac names and can be in any order, included eiger definitions

git-svn-id: file:///afs/psi.ch/project/sls_det_software/svn/slsDetectorSoftware@610 951219d9-93cf-4727-9268-0efd64621fa3
This commit is contained in:
l_maliakal_d
2013-06-17 13:40:47 +00:00
parent a17e6f616d
commit 89a8871e22

View File

@ -83,6 +83,8 @@ slsDetectorDefs::sls_detector_module* energyConversion::readSettingsFile(string
nflag=1; nflag=1;
} }
int id=0,i;
string names[100];
string myfname; string myfname;
string str; string str;
ifstream infile; ifstream infile;
@ -94,6 +96,48 @@ slsDetectorDefs::sls_detector_module* energyConversion::readSettingsFile(string
int nch=((myMod->nchan)/(myMod->nchip)); int nch=((myMod->nchan)/(myMod->nchip));
//to verify dac
switch (myDetectorType) {
case MYTHEN:
break;
case MOENCH:
case GOTTHARD:
names[id++]="Vref";
names[id++]="VcascN";
names[id++]="VcascP";
names[id++]="Vout";
names[id++]="Vcasc";
names[id++]="Vin";
names[id++]="Vref_comp";
names[id++]="Vib_test";
break;
case EIGER:
names[id++]="SvP";
names[id++]="SvN";
names[id++]="Vtr";
names[id++]="Vrf";
names[id++]="Vrs";
names[id++]="Vin";
names[id++]="Vtgstv";
names[id++]="Vcmp_ll";
names[id++]="Vcmp_lr";
names[id++]="cal";
names[id++]="Vcmp_rl";
names[id++]="Vcmp_rr";
names[id++]="rxb_rb";
names[id++]="rxb_lb";
names[id++]="Vcmp_lr";
names[id++]="Vcp";
names[id++]="Vcmp_rl";
names[id++]="Vcn";
names[id++]="Vis";
names[id++]="iodelay";
break;
default:
cout << "Unknown detector type - unknown format for settings file" << endl;
return NULL;
}
#ifdef VERBOSE #ifdef VERBOSE
std::cout<< "reading settings file for module number "<< myMod->module << std::endl; std::cout<< "reading settings file for module number "<< myMod->module << std::endl;
#endif #endif
@ -200,10 +244,11 @@ slsDetectorDefs::sls_detector_module* energyConversion::readSettingsFile(string
break; break;
case EIGER:
case MOENCH: case MOENCH:
case GOTTHARD: case GOTTHARD:
//---------------dacs--------------- //---------------dacs---------------
for (int iarg=0; iarg<myMod->ndac; iarg++) { while(infile.good()) {
getline(infile,str); getline(infile,str);
iline++; iline++;
#ifdef VERBOSE #ifdef VERBOSE
@ -211,11 +256,26 @@ slsDetectorDefs::sls_detector_module* energyConversion::readSettingsFile(string
#endif #endif
istringstream ssstr(str); istringstream ssstr(str);
ssstr >> sargname >> ival; ssstr >> sargname >> ival;
for (i=0;i<id;i++){
if (!strcasecmp(sargname.c_str(),names[i].c_str())){
myMod->dacs[i]=ival;
idac++;
#ifdef VERBOSE #ifdef VERBOSE
std::cout<< sargname << " dac nr. " << idac << " is " << ival << std::endl; std::cout<< sargname << " dac nr. " << idac << " is " << ival << std::endl;
#endif #endif
myMod->dacs[idac]=ival; break;
idac++; }
}
if (i < id) {
#ifdef VERBOSE
std::cout<< sargname << " dac nr. " << idac << " is " << ival << std::endl;
#endif
}else{
std::cout<< "Unknown dac " << sargname << std::endl;
infile.close();
deleteModule(myMod);
return NULL;
}
} }
break; break;
@ -273,6 +333,28 @@ int energyConversion::writeSettingsFile(string fname, detectorType myDetectorTyp
names[id++]="Vref_comp"; names[id++]="Vref_comp";
names[id++]="Vib_test"; names[id++]="Vib_test";
break; break;
case EIGER:
names[id++]="SvP";
names[id++]="SvN";
names[id++]="Vtr";
names[id++]="Vrf";
names[id++]="Vrs";
names[id++]="Vin";
names[id++]="Vtgstv";
names[id++]="Vcmp_ll";
names[id++]="Vcmp_lr";
names[id++]="cal";
names[id++]="Vcmp_rl";
names[id++]="Vcmp_rr";
names[id++]="rxb_rb";
names[id++]="rxb_lb";
names[id++]="Vcmp_lr";
names[id++]="Vcp";
names[id++]="Vcmp_rl";
names[id++]="Vcn";
names[id++]="Vis";
names[id++]="iodelay";
break;
default: default:
cout << "Unknown detector type - unknown format for settings file" << endl; cout << "Unknown detector type - unknown format for settings file" << endl;
return FAIL; return FAIL;
@ -289,7 +371,7 @@ int energyConversion::writeSettingsFile(string fname, detectorType myDetectorTyp
outfile << names[idac] << " " << iv << std::endl; outfile << names[idac] << " " << iv << std::endl;
} }
if((myDetectorType!=GOTTHARD)&&(myDetectorType!=MOENCH)){ if((myDetectorType!=GOTTHARD)&&(myDetectorType!=MOENCH)&&(myDetectorType!=EIGER)){
for (ichip=0; ichip<mod.nchip; ichip++) { for (ichip=0; ichip<mod.nchip; ichip++) {
iv1=mod.chipregs[ichip]&1; iv1=mod.chipregs[ichip]&1;
outfile << names[idac] << " " << iv1 << std::endl; outfile << names[idac] << " " << iv1 << std::endl;