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ctb server compiles

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This commit is contained in:
maliakal_d
2019-01-16 13:28:50 +01:00
parent 9d9251293d
commit 7fe9251a3b
11 changed files with 111 additions and 73 deletions
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57
slsDetectorServers/slsDetectorServer/I2C.h
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@ -21,6 +21,7 @@
#define I2C_DATA_RATE_KBPS (200)
#define I2C_SCL_PERIOD_NS ((1000 * 1000) / I2C_DATA_RATE_KBPS)
#define I2C_SCL_LOW_PERIOD_NS (I2C_SCL_PERIOD_NS / 2)
#define I2C_SCL_HIGH_PERIOD_NS (I2C_SCL_PERIOD_NS / 2)
#define I2C_SDA_DATA_HOLD_TIME_NS (I2C_SCL_HIGH_PERIOD_NS / 2)
#define I2C_SCL_LOW_COUNT ((I2C_SCL_LOW_PERIOD_NS / 1000) * I2C_CLOCK_MHZ) // convert to us, then to clock (defined in blackfin.h)
#define I2C_SDA_DATA_HOLD_COUNT ((I2C_SDA_DATA_HOLD_TIME_NS / 1000) * I2C_CLOCK_MHZ) // convert to us, then to clock (defined in blackfin.h)
@ -63,25 +64,45 @@
#define I2C_TFR_CMD_RPTD_STRT_MSK (0x00000001 << I2C_TFR_CMD_RPTD_STRT_OFST)
uint32_t I2C_Control_Reg = 0x0;
uint32_t I2C_Rx_Data_Fifo_Level_Reg = 0x0;
uint32_t I2C_Scl_Low_Count_Reg = 0x0;
uint32_t I2C_Scl_High_Count_Reg = 0x0;
uint32_t I2C_Sda_Hold_Reg = 0x0;
uint32_t I2C_Transfer_Command_Fifo_Reg = 0x0;
/**
* Configure the I2C core,
* Enable core and
* Calibrate the calibration register for current readout
* @param creg control register (defined in RegisterDefs.h)
* @param rreg rx data fifo level register (defined in RegisterDefs.h)
* @param slreg scl low count register (defined in RegisterDefs.h)
* @param shreg scl high count register (defined in RegisterDefs.h)
* @param sdreg sda hold register (defined in RegisterDefs.h)
* @param treg transfer command fifo register (defined in RegisterDefs.h)
*/
void I2C_ConfigureI2CCore() {
void I2C_ConfigureI2CCore(uint32_t creg, uint32_t rreg, uint32_t slreg, uint32_t shreg, uint32_t sdreg, uint32_t treg) {
FILE_LOG(logINFOBLUE, ("\tConfiguring I2C Core for %d kbps:\n", I2C_DATA_RATE_KBPS));
I2C_Control_Reg = creg;
I2C_Rx_Data_Fifo_Level_Reg = rreg;
I2C_Scl_Low_Count_Reg = slreg;
I2C_Scl_High_Count_Reg = shreg;
I2C_Sda_Hold_Reg = sdreg;
I2C_Transfer_Command_Fifo_Reg = treg;
FILE_LOG(logINFOBLUE, ("\tSetting SCL Low Period: %d ns (0x%x clocks)\n", I2C_SCL_LOW_PERIOD_NS, I2C_SCL_LOW_COUNT));
bus_w(I2C_SCL_LOW_COUNT_REG, (uint32_t)I2C_SCL_LOW_COUNT);
bus_w(I2C_Scl_Low_Count_Reg, (uint32_t)I2C_SCL_LOW_COUNT);
FILE_LOG(logINFOBLUE, ("\tSetting SCL High Period: %d ns (0x%x clocks)\n", I2C_SCL_HIGH_PERIOD_NS, I2C_SCL_LOW_COUNT));
bus_w(I2C_SCL_HIGH_COUNT_REG, (uint32_t)I2C_SCL_LOW_COUNT);
bus_w(I2C_Scl_High_Count_Reg, (uint32_t)I2C_SCL_LOW_COUNT);
FILE_LOG(logINFOBLUE, ("\tSetting SDA Hold Time: %d ns (0x%x clocks)\n", I2C_SDA_DATA_HOLD_TIME_NS, I2C_SDA_DATA_HOLD_COUNT));
bus_w(I2C_SDA_HOLD_REG, (uint32_t)I2C_SDA_DATA_HOLD_COUNT);
bus_w(I2C_Sda_Hold_Reg, (uint32_t)I2C_SDA_DATA_HOLD_COUNT);
FILE_LOG(logINFOBLUE, ("\tEnabling core\n"));
bus_w(I2C_CONTROL_REG, I2C_CTRL_ENBLE_CORE_MSK | I2C_CTRL_BUS_SPEED_FAST_400_VAL);// fixme: (works?)
bus_w(I2C_Control_Reg, I2C_CTRL_ENBLE_CORE_MSK | I2C_CTRL_BUS_SPEED_FAST_400_VAL);// fixme: (works?)
}
/**
@ -96,22 +117,22 @@ uint32_t I2C_Read(uint32_t devId, uint32_t addr) {
uint32_t devIdMask = ((devId << I2C_TFR_CMD_ADDR_OFST) & I2C_TFR_CMD_ADDR_MSK);
// write I2C ID
bus_w(I2C_TRANSFER_COMMAND_FIFO_REG, (devIdMask & ~(I2C_TFR_CMD_RW_MSK)));
bus_w(I2C_Transfer_Command_Fifo_Reg, (devIdMask & ~(I2C_TFR_CMD_RW_MSK)));
// write register addr
bus_w(I2C_TRANSFER_COMMAND_FIFO_REG, addr);
bus_w(I2C_Transfer_Command_Fifo_Reg, addr);
// repeated start with read
bus_w(I2C_TRANSFER_COMMAND_FIFO_REG, (devIdMask | I2C_TFR_CMD_RPTD_STRT_MSK | I2C_TFR_CMD_RW_READ_VAL));
bus_w(I2C_Transfer_Command_Fifo_Reg, (devIdMask | I2C_TFR_CMD_RPTD_STRT_MSK | I2C_TFR_CMD_RW_READ_VAL));
// continue reading
bus_w(I2C_TRANSFER_COMMAND_FIFO_REG, 0x0);
bus_w(I2C_Transfer_Command_Fifo_Reg, 0x0);
// stop reading
bus_w(I2C_TRANSFER_COMMAND_FIFO_REG, I2C_TFR_CMD_STOP_MSK);
bus_w(I2C_Transfer_Command_Fifo_Reg, I2C_TFR_CMD_STOP_MSK);
// read value
return bus_r(I2C_RX_DATA_FIFO_LEVEL_REG);
return bus_r(I2C_Rx_Data_Fifo_Level_Reg);
}
/**
@ -126,22 +147,22 @@ void I2C_Write(uint32_t devId, uint32_t addr, uint16_t data) {
uint32_t devIdMask = ((devId << I2C_TFR_CMD_ADDR_OFST) & I2C_TFR_CMD_ADDR_MSK);
// write I2C ID
bus_w(I2C_TRANSFER_COMMAND_FIFO_REG, (devIdMask & ~(I2C_TFR_CMD_RW_MSK)));
bus_w(I2C_Transfer_Command_Fifo_Reg, (devIdMask & ~(I2C_TFR_CMD_RW_MSK)));
// write register addr
bus_w(I2C_TRANSFER_COMMAND_FIFO_REG, addr);
bus_w(I2C_Transfer_Command_Fifo_Reg, addr);
// repeated start with write
bus_w(I2C_TRANSFER_COMMAND_FIFO_REG, (devIdMask | I2C_TFR_CMD_RPTD_STRT_MSK & ~(I2C_TFR_CMD_RW_MSK)));
bus_w(I2C_Transfer_Command_Fifo_Reg, ((devIdMask | I2C_TFR_CMD_RPTD_STRT_MSK) & ~(I2C_TFR_CMD_RW_MSK)));
uint8_t msb = data & 0xFF00;
uint8_t lsb = data & 0x00FF;
uint8_t msb = (uint8_t)((data & 0xFF00) >> 8);
uint8_t lsb = (uint8_t)(data & 0x00FF);
// writing data MSB
bus_w(I2C_TRANSFER_COMMAND_FIFO_REG, ((msb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK));
bus_w(I2C_Transfer_Command_Fifo_Reg, ((msb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK));
// writing data LSB and stop writing bit
bus_w(I2C_TRANSFER_COMMAND_FIFO_REG, ((lsb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK) | I2C_TFR_CMD_STOP_MSK);
bus_w(I2C_Transfer_Command_Fifo_Reg, ((lsb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK) | I2C_TFR_CMD_STOP_MSK);
}

29
slsDetectorServers/slsDetectorServer/INA226.h
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@ -38,33 +38,44 @@
#define INA226_CALIBRATION_MSK (0x7FFF)
/** get calibration register value to be set */
#define INA226_getCalibrationValue(rOhm) (0.00512 /(INA226_CURRENT_IMIN_UA * 1e-6 * rohm))
#define INA226_getCalibrationValue(rOhm) (0.00512 /(INA226_CURRENT_IMIN_UA * 1e-6 * rOhm))
/** get current unit */
#define INA226_getConvertedCurrentUnits(shuntVReg, calibReg) (shuntVReg * calibReg / 2048)
double INA226_Shunt_Resistor_Ohm = 0.0;
/**
* Configure the I2C core and Enable core
* @param rOhm shunt resister value in Ohms (defined in slsDetectorServer_defs.h)
* @param creg control register (defined in RegisterDefs.h)
* @param rreg rx data fifo level register (defined in RegisterDefs.h)
* @param slreg scl low count register (defined in RegisterDefs.h)
* @param shreg scl high count register (defined in RegisterDefs.h)
* @param sdreg sda hold register (defined in RegisterDefs.h)
* @param treg transfer command fifo register (defined in RegisterDefs.h)
*/
void INA226_ConfigureI2CCore() {
void INA226_ConfigureI2CCore(double rOhm, uint32_t creg, uint32_t rreg, uint32_t slreg, uint32_t shreg, uint32_t sdreg, uint32_t treg) {
FILE_LOG(logINFO, ("Configuring INA226\n"));
I2C_ConfigureI2CCore();
INA226_Shunt_Resistor_Ohm = rOhm;
I2C_ConfigureI2CCore(creg, rreg, slreg, shreg, sdreg, treg);
}
/**
* Calibrate resolution of current register
* @param shuntResisterOhm shunt resister value in Ohms
* @param transferCommandReg transfer command fifo register (defined in RegisterDefs.h)
* @param deviceId device Id (defined in slsDetectorServer_defs.h)
*/
void INA226_CalibrateCurrentRegister(uint32_t deviceId) {
// get calibration value based on shunt resistor
uint16_t calVal = INA226_getCalibrationValue(I2C_SHUNT_RESISTER_OHMS) & INA226_CALIBRATION_MSK;
uint16_t calVal = ((uint16_t)INA226_getCalibrationValue(INA226_Shunt_Resistor_Ohm)) & INA226_CALIBRATION_MSK;
FILE_LOG(logINFO, ("\tWriting to Calibration reg: 0x%0x\n", calVal));
// calibrate current register
I2C_Write(INA226_TRANSFER_COMMAND_FIFO_REG, deviceId, INA226_CALIBRATION_REG, calVal);
I2C_Write(deviceId, INA226_CALIBRATION_REG, calVal);
}
/**
@ -104,12 +115,12 @@ int INA226_ReadCurrent(uint32_t deviceId) {
// read shunt voltage register
FILE_LOG(logDEBUG1, ("\tReading shunt voltage reg\n"));
uint32_t shuntVoltageRegVal = I2C_Read(deviceId, INA226_SHUNT_VOLTAGE_REG);
FILE_LOG(logDEBUG1, ("\tshunt voltage reg: 0x%08x\n", regval));
FILE_LOG(logDEBUG1, ("\tshunt voltage reg: 0x%08x\n", shuntVoltageRegVal));
// read calibration register
FILE_LOG(logDEBUG1, ("\tReading calibration reg\n"));
uint32_t calibrationRegVal = I2C_Read(deviceId, INA226_CALIBRATION_REG);
FILE_LOG(logDEBUG1, ("\tcalibration reg: 0x%08x\n", regval));
FILE_LOG(logDEBUG1, ("\tcalibration reg: 0x%08x\n", calibrationRegVal));
// value for current
uint32_t retval = INA226_getConvertedCurrentUnits(shuntVoltageRegVal, calibrationRegVal);

8
slsDetectorServers/slsDetectorServer/slsDetectorFunctionList.h
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@ -180,7 +180,7 @@ int getDACIndexFromADCIndex(enum ADCINDEX ind);
int getADCIndexFromDACIndex(enum DACINDEX ind);
int isPowerValid(int val);
int getPower();
void setPower(DACINDEX ind, int val);
void setPower(enum DACINDEX ind, int val);
#endif
/*#ifdef GOTTHARDD
void initDAC(int dac_addr, int value);
@ -192,12 +192,6 @@ u_int32_t putout(char *s);
#ifndef MOENCHD
int getADC(enum ADCINDEX ind);
#endif
#ifdef CHIPTESTBOARDD
extern int INA226_ReadVoltage(uint32_t transferCommandReg, uint32_t rxDataFifoLevelReg, uint32_t deviceId); // INA226.h
extern int INA226_ReadCurrent(uint32_t transferCommandReg, uint32_t rxDataFifoLevelReg, uint32_t deviceId); // INA226.h
extern int AD7689_GetTemperature(); // AD7689.h
extern int AD7689_GetChannel(int ichan); // AD7689.h
#endif
int setHighVoltage(int val);

4
slsDetectorServers/slsDetectorServer/slsDetectorServer_funcs.c
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@ -794,7 +794,7 @@ int set_dac(int file_des) {
FILE_LOG(logERROR,(mess));
} else if (!isPowerValid(val)) {
ret = FAIL;
sprintf(mess,"Could not set power. Power regulator %d should be between %d and %d mV\n", POWER_RGLTR_MIN, POWER_RGLTR_MAX);
sprintf(mess,"Could not set power. Power regulator %d should be between %d and %d mV\n", ind, POWER_RGLTR_MIN, POWER_RGLTR_MAX);
FILE_LOG(logERROR,(mess));
} else {
if (val != -1)
@ -989,7 +989,7 @@ int get_adc(int file_des) {
#endif
default:
#ifdef CHIPTESTBOARDD
if (ind >= SLOW_ADC_START_INDEX && ind <= SLOW_ADC_END_INDEX) {
if (ind >= SLOW_ADC0 && ind <= SLOW_ADC_TEMP) {
break;
}
#endif