mirror of
https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2025-04-26 08:10:02 +02:00
ctb server compiles
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9d9251293d
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9
slsDetectorServers/ctbDetectorServer/gitInfo.txt
Normal file
9
slsDetectorServers/ctbDetectorServer/gitInfo.txt
Normal file
@ -0,0 +1,9 @@
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Path: slsDetectorPackage/slsDetectorServers/ctbDetectorServer
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URL: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git
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Repository Root: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git
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Repsitory UUID: 9d9251293d1a0b5300b8d7191949cf01de1c7b81
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Revision: 11
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Branch: refactor
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Last Changed Author: Dhanya_Thattil
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Last Changed Rev: 4255
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Last Changed Date: 2019-01-15 19:51:41.000000002 +0100 ./RegisterDefs.h
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@ -1,6 +1,6 @@
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#define GITURL "git@github.com:slsdetectorgroup/slsDetectorPackage.git"
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#define GITREPUUID "91dd176a0fb314f583ca6e29140053f1eb742896"
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#define GITREPUUID "9d9251293d1a0b5300b8d7191949cf01de1c7b81"
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#define GITAUTH "Dhanya_Thattil"
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#define GITREV 0x4166
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#define GITDATE 0x20181108
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#define GITREV 0x4255
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#define GITDATE 0x20190115
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#define GITBRANCH "refactor"
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@ -487,7 +487,7 @@ void setupDetector() {
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// power regulators
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// I2C
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INA226_ConfigureI2CCore();
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INA226_ConfigureI2CCore(I2C_SHUNT_RESISTER_OHMS, I2C_CONTROL_REG, I2C_RX_DATA_FIFO_LEVEL_REG, I2C_SCL_LOW_COUNT_REG, I2C_SCL_HIGH_COUNT_REG, I2C_SDA_HOLD_REG, I2C_TRANSFER_COMMAND_FIFO_REG);
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INA226_CalibrateCurrentRegister(I2C_POWER_VIO_DEVICE_ID);
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INA226_CalibrateCurrentRegister(I2C_POWER_VA_DEVICE_ID);
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INA226_CalibrateCurrentRegister(I2C_POWER_VB_DEVICE_ID);
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@ -495,7 +495,7 @@ void setupDetector() {
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INA226_CalibrateCurrentRegister(I2C_POWER_VD_DEVICE_ID);
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// switch off
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powerChip(0);
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setvchip(VCHIP_MIN_MV);
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setVchip(VCHIP_MIN_MV);
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// adcs
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AD9257_SetDefines(ADC_SPI_REG, ADC_SPI_SRL_CS_OTPT_MSK, ADC_SPI_SRL_CLK_OTPT_MSK, ADC_SPI_SRL_DT_OTPT_MSK, ADC_SPI_SRL_DT_OTPT_OFST);
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@ -1146,10 +1146,10 @@ int getVChipToSet(enum DACINDEX ind, int val) {
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int ipwr = 0;
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// loop through the adcs
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for (ipwr = 0; ipwr < PWR -1; ++ipwr) {
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for (ipwr = 0; ipwr < NPWR -1; ++ipwr) {
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// get the dac values for each adc
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int dacVal = dacValues[getDACIndexFromADCIndex(i)];
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int dacVal = dacValues[getDACIndexFromADCIndex(ipwr)];
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// if current index, replace with value to be set
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if (ipwr == adcIndex)
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@ -1252,6 +1252,7 @@ int getPower(enum DACINDEX ind) {
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}
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// convert dac to voltage
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int retval = -1;
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ConvertToDifferentRange(LTC2620_MIN_VAL, LTC2620_MAX_VAL, POWER_RGLTR_MIN, (getVchip() - VCHIP_POWER_INCRMNT),
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dacValues[ind], &retval);
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return retval;
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@ -1261,7 +1262,7 @@ void setPower(enum DACINDEX ind, int val) {
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// validate index & get adc index
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int adcIndex = getADCIndexFromDACIndex(ind);
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if (adcIndex == -1) {
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return -1;
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return;
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}
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uint32_t addr = POWER_REG;
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@ -1274,7 +1275,7 @@ void setPower(enum DACINDEX ind, int val) {
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// validate value (already checked at tcp)
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if (!isPowerValid(val)) {
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FILE_LOG(logERROR, ("\Invalid value of %d mV for Power %d. Is not between %d and %d mV\n", val, ind, POWER_RGLTR_MIN, POWER_RGLTR_MAX));
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FILE_LOG(logERROR, ("Invalid value of %d mV for Power %d. Is not between %d and %d mV\n", val, ind, POWER_RGLTR_MIN, POWER_RGLTR_MAX));
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return;
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}
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@ -1289,13 +1290,14 @@ void setPower(enum DACINDEX ind, int val) {
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// set vchip
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setVchip(vchip);
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if (getvchip() != vchip) {
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FILE_LOG(logERROR, ("Weird, Could not set vchip. Set %d, read %d\n.", vchip, getvchip()));
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if (getVchip() != vchip) {
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FILE_LOG(logERROR, ("Weird, Could not set vchip. Set %d, read %d\n.", vchip, getVchip()));
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return;
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}
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// convert it to dac
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if (val != LTC2620_PWR_DOWN_VAL) {
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int dacval = -1;
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// convert voltage to dac
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if (ConvertToDifferentRange(POWER_RGLTR_MIN, vchip - VCHIP_POWER_INCRMNT, LTC2620_MIN_VAL, LTC2620_MAX_VAL,
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val, &dacval) == FAIL) {
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@ -1318,22 +1320,19 @@ int getADC(enum ADCINDEX ind){
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#ifdef VIRTUAL
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return 0;
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#endif
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int idac = (int)ind;
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switch(ind) {
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case V_PWR_IO:
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case V_PWR_A:
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case V_PWR_B:
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case V_PWR_C:
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case V_PWR_D:
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return INA226_ReadVoltage(I2C_TRANSFER_COMMAND_FIFO_REG, I2C_RX_DATA_FIFO_LEVEL_REG,
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I2C_POWER_VIO_DEVICE_ID + (int)ind);
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return INA226_ReadVoltage(I2C_POWER_VIO_DEVICE_ID + (int)ind);
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case I_PWR_IO:
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case I_PWR_A:
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case I_PWR_B:
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case I_PWR_C:
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case I_PWR_D:
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return INA226_ReadCurrent(I2C_TRANSFER_COMMAND_FIFO_REG, I2C_RX_DATA_FIFO_LEVEL_REG,
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I2C_POWER_VIO_DEVICE_ID + (int)(ind - I_PWR_IO));
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return INA226_ReadCurrent(I2C_POWER_VIO_DEVICE_ID + (int)(ind - I_PWR_IO));
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// slow adcs
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case SLOW_ADC_TEMP:
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@ -1346,7 +1345,7 @@ int getADC(enum ADCINDEX ind){
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case SLOW_ADC5:
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case SLOW_ADC6:
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case SLOW_ADC7:
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return AD7689_GetChannel(ind - SLOW_ADC0);
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return AD7689_GetChannel((int)ind - SLOW_ADC0);
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default:
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FILE_LOG(logERROR, ("Adc Index %d not defined \n", (int)ind));
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return -1;
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@ -1845,15 +1844,19 @@ uint64_t setPatternWaitTime(int level, uint64_t t) {
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void setPatternLoop(int level, int *startAddr, int *stopAddr, int *nLoop) {
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// level 0-2, addr upto patternlength + 1 (checked at tcp)
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if ((level != -1) && (*startAddr > (MAX_PATTERN_LENGTH + 1) || *stopAddr > (MAX_PATTERN_LENGTH + 1))) {
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FILE_LOG(logERROR, ("Cannot set Pattern (Pattern Loop, level:%d, addr:%d). Addr must be less than %d\n",
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level, addr, MAX_PATTERN_LENGTH + 1));
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if ((level != -1) &&
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(*startAddr >= 0 || *stopAddr > (MAX_PATTERN_LENGTH + 1))) {
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FILE_LOG(logERROR, ("Cannot set Pattern (Pattern Loop, level:%d, startaddr:%d, stopaddr:%d). "
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"Addr must be less than %d\n",
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level, *startAddr, *stopAddr, MAX_PATTERN_LENGTH + 1));
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}
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//level -1, addr upto patternlength (checked at tcp)
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else if ((level == -1) && (*startAddr > MAX_PATTERN_LENGTH || *stopAddr > MAX_PATTERN_LENGTH)) {
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FILE_LOG(logERROR, ("Cannot set Pattern (Pattern Loop, complete pattern, addr:%d). Addr must be less than %d\n",
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addr, MAX_PATTERN_LENGTH));
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else if ((level == -1) &&
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(*startAddr >= 0 || *stopAddr > MAX_PATTERN_LENGTH)) {
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FILE_LOG(logERROR, ("Cannot set Pattern (Pattern Loop, complete pattern, stopaddr:%d). "
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"Addr must be less than %d\n",
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*startAddr, *stopAddr, MAX_PATTERN_LENGTH));
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}
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uint32_t addr = 0;
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@ -1,9 +1,9 @@
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Path: slsDetectorPackage/slsDetectorServers/eigerDetectorServer
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URL: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git
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Repository Root: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git
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Repsitory UUID: 55c57e4c3ff61010f12f0b5a1b9a080e103f2ef3
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Revision: 20
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Repsitory UUID: 9d9251293d1a0b5300b8d7191949cf01de1c7b81
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Revision: 21
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Branch: refactor
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Last Changed Author: Dhanya_Thattil
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Last Changed Rev: 4213
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Last Changed Date: 2019-01-07 12:06:28.000000002 +0100 ./xparameters.h
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Last Changed Rev: 4255
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Last Changed Date: 2019-01-15 10:22:16.000000002 +0100 ./xparameters.h
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@ -1,6 +1,6 @@
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#define GITURL "git@github.com:slsdetectorgroup/slsDetectorPackage.git"
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#define GITREPUUID "55c57e4c3ff61010f12f0b5a1b9a080e103f2ef3"
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#define GITREPUUID "9d9251293d1a0b5300b8d7191949cf01de1c7b81"
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#define GITAUTH "Dhanya_Thattil"
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#define GITREV 0x4213
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#define GITDATE 0x20190107
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#define GITREV 0x4255
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#define GITDATE 0x20190115
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#define GITBRANCH "refactor"
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@ -1,9 +1,9 @@
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Path: slsDetectorPackage/slsDetectorServers/gotthardDetectorServer
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URL: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git
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Repository Root: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git
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Repsitory UUID: 553633651a7549b13ea314c887c49dd296c075d5
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Revision: 18
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Repsitory UUID: 9d9251293d1a0b5300b8d7191949cf01de1c7b81
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Revision: 21
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Branch: refactor
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Last Changed Author: Dhanya_Thattil
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Last Changed Rev: 4203
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Last Changed Date: 2019-01-08 06:54:17.000000002 +0100 ./RegisterDefs.h
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Last Changed Rev: 4255
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Last Changed Date: 2019-01-15 10:22:16.000000002 +0100 ./.target-makefrag
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@ -1,6 +1,6 @@
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#define GITURL "git@github.com:slsdetectorgroup/slsDetectorPackage.git"
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#define GITREPUUID "553633651a7549b13ea314c887c49dd296c075d5"
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#define GITREPUUID "9d9251293d1a0b5300b8d7191949cf01de1c7b81"
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#define GITAUTH "Dhanya_Thattil"
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#define GITREV 0x4203
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#define GITDATE 0x20190108
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#define GITREV 0x4255
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#define GITDATE 0x20190115
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#define GITBRANCH "refactor"
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@ -21,6 +21,7 @@
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#define I2C_DATA_RATE_KBPS (200)
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#define I2C_SCL_PERIOD_NS ((1000 * 1000) / I2C_DATA_RATE_KBPS)
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#define I2C_SCL_LOW_PERIOD_NS (I2C_SCL_PERIOD_NS / 2)
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#define I2C_SCL_HIGH_PERIOD_NS (I2C_SCL_PERIOD_NS / 2)
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#define I2C_SDA_DATA_HOLD_TIME_NS (I2C_SCL_HIGH_PERIOD_NS / 2)
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#define I2C_SCL_LOW_COUNT ((I2C_SCL_LOW_PERIOD_NS / 1000) * I2C_CLOCK_MHZ) // convert to us, then to clock (defined in blackfin.h)
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#define I2C_SDA_DATA_HOLD_COUNT ((I2C_SDA_DATA_HOLD_TIME_NS / 1000) * I2C_CLOCK_MHZ) // convert to us, then to clock (defined in blackfin.h)
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@ -63,25 +64,45 @@
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#define I2C_TFR_CMD_RPTD_STRT_MSK (0x00000001 << I2C_TFR_CMD_RPTD_STRT_OFST)
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uint32_t I2C_Control_Reg = 0x0;
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uint32_t I2C_Rx_Data_Fifo_Level_Reg = 0x0;
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uint32_t I2C_Scl_Low_Count_Reg = 0x0;
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uint32_t I2C_Scl_High_Count_Reg = 0x0;
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uint32_t I2C_Sda_Hold_Reg = 0x0;
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uint32_t I2C_Transfer_Command_Fifo_Reg = 0x0;
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/**
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* Configure the I2C core,
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* Enable core and
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* Calibrate the calibration register for current readout
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* @param creg control register (defined in RegisterDefs.h)
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* @param rreg rx data fifo level register (defined in RegisterDefs.h)
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* @param slreg scl low count register (defined in RegisterDefs.h)
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* @param shreg scl high count register (defined in RegisterDefs.h)
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* @param sdreg sda hold register (defined in RegisterDefs.h)
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* @param treg transfer command fifo register (defined in RegisterDefs.h)
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*/
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void I2C_ConfigureI2CCore() {
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void I2C_ConfigureI2CCore(uint32_t creg, uint32_t rreg, uint32_t slreg, uint32_t shreg, uint32_t sdreg, uint32_t treg) {
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FILE_LOG(logINFOBLUE, ("\tConfiguring I2C Core for %d kbps:\n", I2C_DATA_RATE_KBPS));
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I2C_Control_Reg = creg;
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I2C_Rx_Data_Fifo_Level_Reg = rreg;
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I2C_Scl_Low_Count_Reg = slreg;
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I2C_Scl_High_Count_Reg = shreg;
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I2C_Sda_Hold_Reg = sdreg;
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I2C_Transfer_Command_Fifo_Reg = treg;
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FILE_LOG(logINFOBLUE, ("\tSetting SCL Low Period: %d ns (0x%x clocks)\n", I2C_SCL_LOW_PERIOD_NS, I2C_SCL_LOW_COUNT));
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bus_w(I2C_SCL_LOW_COUNT_REG, (uint32_t)I2C_SCL_LOW_COUNT);
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bus_w(I2C_Scl_Low_Count_Reg, (uint32_t)I2C_SCL_LOW_COUNT);
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FILE_LOG(logINFOBLUE, ("\tSetting SCL High Period: %d ns (0x%x clocks)\n", I2C_SCL_HIGH_PERIOD_NS, I2C_SCL_LOW_COUNT));
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bus_w(I2C_SCL_HIGH_COUNT_REG, (uint32_t)I2C_SCL_LOW_COUNT);
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bus_w(I2C_Scl_High_Count_Reg, (uint32_t)I2C_SCL_LOW_COUNT);
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FILE_LOG(logINFOBLUE, ("\tSetting SDA Hold Time: %d ns (0x%x clocks)\n", I2C_SDA_DATA_HOLD_TIME_NS, I2C_SDA_DATA_HOLD_COUNT));
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bus_w(I2C_SDA_HOLD_REG, (uint32_t)I2C_SDA_DATA_HOLD_COUNT);
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bus_w(I2C_Sda_Hold_Reg, (uint32_t)I2C_SDA_DATA_HOLD_COUNT);
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FILE_LOG(logINFOBLUE, ("\tEnabling core\n"));
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bus_w(I2C_CONTROL_REG, I2C_CTRL_ENBLE_CORE_MSK | I2C_CTRL_BUS_SPEED_FAST_400_VAL);// fixme: (works?)
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bus_w(I2C_Control_Reg, I2C_CTRL_ENBLE_CORE_MSK | I2C_CTRL_BUS_SPEED_FAST_400_VAL);// fixme: (works?)
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}
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/**
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@ -96,22 +117,22 @@ uint32_t I2C_Read(uint32_t devId, uint32_t addr) {
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uint32_t devIdMask = ((devId << I2C_TFR_CMD_ADDR_OFST) & I2C_TFR_CMD_ADDR_MSK);
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// write I2C ID
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bus_w(I2C_TRANSFER_COMMAND_FIFO_REG, (devIdMask & ~(I2C_TFR_CMD_RW_MSK)));
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bus_w(I2C_Transfer_Command_Fifo_Reg, (devIdMask & ~(I2C_TFR_CMD_RW_MSK)));
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// write register addr
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bus_w(I2C_TRANSFER_COMMAND_FIFO_REG, addr);
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bus_w(I2C_Transfer_Command_Fifo_Reg, addr);
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// repeated start with read
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bus_w(I2C_TRANSFER_COMMAND_FIFO_REG, (devIdMask | I2C_TFR_CMD_RPTD_STRT_MSK | I2C_TFR_CMD_RW_READ_VAL));
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bus_w(I2C_Transfer_Command_Fifo_Reg, (devIdMask | I2C_TFR_CMD_RPTD_STRT_MSK | I2C_TFR_CMD_RW_READ_VAL));
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// continue reading
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bus_w(I2C_TRANSFER_COMMAND_FIFO_REG, 0x0);
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bus_w(I2C_Transfer_Command_Fifo_Reg, 0x0);
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// stop reading
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bus_w(I2C_TRANSFER_COMMAND_FIFO_REG, I2C_TFR_CMD_STOP_MSK);
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bus_w(I2C_Transfer_Command_Fifo_Reg, I2C_TFR_CMD_STOP_MSK);
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// read value
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return bus_r(I2C_RX_DATA_FIFO_LEVEL_REG);
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return bus_r(I2C_Rx_Data_Fifo_Level_Reg);
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}
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/**
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@ -126,22 +147,22 @@ void I2C_Write(uint32_t devId, uint32_t addr, uint16_t data) {
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uint32_t devIdMask = ((devId << I2C_TFR_CMD_ADDR_OFST) & I2C_TFR_CMD_ADDR_MSK);
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// write I2C ID
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bus_w(I2C_TRANSFER_COMMAND_FIFO_REG, (devIdMask & ~(I2C_TFR_CMD_RW_MSK)));
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bus_w(I2C_Transfer_Command_Fifo_Reg, (devIdMask & ~(I2C_TFR_CMD_RW_MSK)));
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// write register addr
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bus_w(I2C_TRANSFER_COMMAND_FIFO_REG, addr);
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bus_w(I2C_Transfer_Command_Fifo_Reg, addr);
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// repeated start with write
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bus_w(I2C_TRANSFER_COMMAND_FIFO_REG, (devIdMask | I2C_TFR_CMD_RPTD_STRT_MSK & ~(I2C_TFR_CMD_RW_MSK)));
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bus_w(I2C_Transfer_Command_Fifo_Reg, ((devIdMask | I2C_TFR_CMD_RPTD_STRT_MSK) & ~(I2C_TFR_CMD_RW_MSK)));
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uint8_t msb = data & 0xFF00;
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uint8_t lsb = data & 0x00FF;
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uint8_t msb = (uint8_t)((data & 0xFF00) >> 8);
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uint8_t lsb = (uint8_t)(data & 0x00FF);
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// writing data MSB
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bus_w(I2C_TRANSFER_COMMAND_FIFO_REG, ((msb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK));
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bus_w(I2C_Transfer_Command_Fifo_Reg, ((msb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK));
|
||||
|
||||
// writing data LSB and stop writing bit
|
||||
bus_w(I2C_TRANSFER_COMMAND_FIFO_REG, ((lsb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK) | I2C_TFR_CMD_STOP_MSK);
|
||||
bus_w(I2C_Transfer_Command_Fifo_Reg, ((lsb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK) | I2C_TFR_CMD_STOP_MSK);
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||||
}
|
||||
|
||||
|
||||
|
||||
@ -38,33 +38,44 @@
|
||||
#define INA226_CALIBRATION_MSK (0x7FFF)
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|
||||
/** get calibration register value to be set */
|
||||
#define INA226_getCalibrationValue(rOhm) (0.00512 /(INA226_CURRENT_IMIN_UA * 1e-6 * rohm))
|
||||
#define INA226_getCalibrationValue(rOhm) (0.00512 /(INA226_CURRENT_IMIN_UA * 1e-6 * rOhm))
|
||||
|
||||
/** get current unit */
|
||||
#define INA226_getConvertedCurrentUnits(shuntVReg, calibReg) (shuntVReg * calibReg / 2048)
|
||||
|
||||
double INA226_Shunt_Resistor_Ohm = 0.0;
|
||||
|
||||
|
||||
/**
|
||||
* Configure the I2C core and Enable core
|
||||
* @param rOhm shunt resister value in Ohms (defined in slsDetectorServer_defs.h)
|
||||
* @param creg control register (defined in RegisterDefs.h)
|
||||
* @param rreg rx data fifo level register (defined in RegisterDefs.h)
|
||||
* @param slreg scl low count register (defined in RegisterDefs.h)
|
||||
* @param shreg scl high count register (defined in RegisterDefs.h)
|
||||
* @param sdreg sda hold register (defined in RegisterDefs.h)
|
||||
* @param treg transfer command fifo register (defined in RegisterDefs.h)
|
||||
*/
|
||||
void INA226_ConfigureI2CCore() {
|
||||
void INA226_ConfigureI2CCore(double rOhm, uint32_t creg, uint32_t rreg, uint32_t slreg, uint32_t shreg, uint32_t sdreg, uint32_t treg) {
|
||||
FILE_LOG(logINFO, ("Configuring INA226\n"));
|
||||
I2C_ConfigureI2CCore();
|
||||
|
||||
INA226_Shunt_Resistor_Ohm = rOhm;
|
||||
|
||||
I2C_ConfigureI2CCore(creg, rreg, slreg, shreg, sdreg, treg);
|
||||
}
|
||||
|
||||
/**
|
||||
* Calibrate resolution of current register
|
||||
* @param shuntResisterOhm shunt resister value in Ohms
|
||||
* @param transferCommandReg transfer command fifo register (defined in RegisterDefs.h)
|
||||
* @param deviceId device Id (defined in slsDetectorServer_defs.h)
|
||||
*/
|
||||
void INA226_CalibrateCurrentRegister(uint32_t deviceId) {
|
||||
|
||||
// get calibration value based on shunt resistor
|
||||
uint16_t calVal = INA226_getCalibrationValue(I2C_SHUNT_RESISTER_OHMS) & INA226_CALIBRATION_MSK;
|
||||
uint16_t calVal = ((uint16_t)INA226_getCalibrationValue(INA226_Shunt_Resistor_Ohm)) & INA226_CALIBRATION_MSK;
|
||||
FILE_LOG(logINFO, ("\tWriting to Calibration reg: 0x%0x\n", calVal));
|
||||
|
||||
// calibrate current register
|
||||
I2C_Write(INA226_TRANSFER_COMMAND_FIFO_REG, deviceId, INA226_CALIBRATION_REG, calVal);
|
||||
I2C_Write(deviceId, INA226_CALIBRATION_REG, calVal);
|
||||
}
|
||||
|
||||
/**
|
||||
@ -104,12 +115,12 @@ int INA226_ReadCurrent(uint32_t deviceId) {
|
||||
// read shunt voltage register
|
||||
FILE_LOG(logDEBUG1, ("\tReading shunt voltage reg\n"));
|
||||
uint32_t shuntVoltageRegVal = I2C_Read(deviceId, INA226_SHUNT_VOLTAGE_REG);
|
||||
FILE_LOG(logDEBUG1, ("\tshunt voltage reg: 0x%08x\n", regval));
|
||||
FILE_LOG(logDEBUG1, ("\tshunt voltage reg: 0x%08x\n", shuntVoltageRegVal));
|
||||
|
||||
// read calibration register
|
||||
FILE_LOG(logDEBUG1, ("\tReading calibration reg\n"));
|
||||
uint32_t calibrationRegVal = I2C_Read(deviceId, INA226_CALIBRATION_REG);
|
||||
FILE_LOG(logDEBUG1, ("\tcalibration reg: 0x%08x\n", regval));
|
||||
FILE_LOG(logDEBUG1, ("\tcalibration reg: 0x%08x\n", calibrationRegVal));
|
||||
|
||||
// value for current
|
||||
uint32_t retval = INA226_getConvertedCurrentUnits(shuntVoltageRegVal, calibrationRegVal);
|
||||
|
||||
@ -180,7 +180,7 @@ int getDACIndexFromADCIndex(enum ADCINDEX ind);
|
||||
int getADCIndexFromDACIndex(enum DACINDEX ind);
|
||||
int isPowerValid(int val);
|
||||
int getPower();
|
||||
void setPower(DACINDEX ind, int val);
|
||||
void setPower(enum DACINDEX ind, int val);
|
||||
#endif
|
||||
/*#ifdef GOTTHARDD
|
||||
void initDAC(int dac_addr, int value);
|
||||
@ -192,12 +192,6 @@ u_int32_t putout(char *s);
|
||||
#ifndef MOENCHD
|
||||
int getADC(enum ADCINDEX ind);
|
||||
#endif
|
||||
#ifdef CHIPTESTBOARDD
|
||||
extern int INA226_ReadVoltage(uint32_t transferCommandReg, uint32_t rxDataFifoLevelReg, uint32_t deviceId); // INA226.h
|
||||
extern int INA226_ReadCurrent(uint32_t transferCommandReg, uint32_t rxDataFifoLevelReg, uint32_t deviceId); // INA226.h
|
||||
extern int AD7689_GetTemperature(); // AD7689.h
|
||||
extern int AD7689_GetChannel(int ichan); // AD7689.h
|
||||
#endif
|
||||
|
||||
int setHighVoltage(int val);
|
||||
|
||||
|
||||
@ -794,7 +794,7 @@ int set_dac(int file_des) {
|
||||
FILE_LOG(logERROR,(mess));
|
||||
} else if (!isPowerValid(val)) {
|
||||
ret = FAIL;
|
||||
sprintf(mess,"Could not set power. Power regulator %d should be between %d and %d mV\n", POWER_RGLTR_MIN, POWER_RGLTR_MAX);
|
||||
sprintf(mess,"Could not set power. Power regulator %d should be between %d and %d mV\n", ind, POWER_RGLTR_MIN, POWER_RGLTR_MAX);
|
||||
FILE_LOG(logERROR,(mess));
|
||||
} else {
|
||||
if (val != -1)
|
||||
@ -989,7 +989,7 @@ int get_adc(int file_des) {
|
||||
#endif
|
||||
default:
|
||||
#ifdef CHIPTESTBOARDD
|
||||
if (ind >= SLOW_ADC_START_INDEX && ind <= SLOW_ADC_END_INDEX) {
|
||||
if (ind >= SLOW_ADC0 && ind <= SLOW_ADC_TEMP) {
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user