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just finished the clock

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This commit is contained in:
Dhanya Maliakal
2016-10-25 09:21:08 +02:00
parent 31d48411db
commit 7eda5f9de5
4 changed files with 108 additions and 69 deletions
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129
slsDetectorSoftware/jungfrauDetectorServer/firmware_funcs.c
View File

@ -553,55 +553,57 @@ void configurePll(int i) {
//ic plays no role in jungfrau
u_int32_t setClockDivider(int d, int ic) {
if(myDetectorType == JUNGFRAU){
enum clkspeed{FULL,HALF,QUARTER};
switch((clkspeed)d){
//stop state machine if running
if(runBusy())
stopStateMachine();
if(d!=-1){
switch((clkspeed)d){
//stop state machine if running
if(runBusy())
stopStateMachine();
case FULL:
printf("Setting Half Speed (40 MHz)\n");
/**to be done*/
break;
case HALF:
printf("Setting Half Speed (20 MHz)\n");
case FULL:
printf("Setting Half Speed (40 MHz)\n");
/**to be done*/
dbitPipeline(JUNGFRAU_HALFSPEED_DBIT_PIPELINE);
adcPipeline(JUNGFRAU_HALFSPEED_ADC_PIPELINE);
initSpeedConfGain(JUNGFRAU_HALFSPEED_CONF);
adcPhase(JUNGFRAU_HALFSPEED_ADC_PHASE);
break;
case HALF:
printf("Setting Half Speed (20 MHz)\n");
dbitPipeline(JUNGFRAU_HALFSPEED_DBIT_PIPELINE);
adcPipeline(JUNGFRAU_HALFSPEED_ADC_PIPELINE);
initSpeedConfGain(JUNGFRAU_HALFSPEED_CONF);
adcPhase(JUNGFRAU_HALFSPEED_ADC_PHASE);
break;
case QUARTER:
printf("Setting Half Speed (10 MHz)\n");
dbitPipeline(JUNGFRAU_QUARTERSPEED_DBIT_PIPELINE);
adcPipeline(JUNGFRAU_QUARTERSPEED_ADC_PIPELINE);
initSpeedConfGain(JUNGFRAU_QUARTERSPEED_CONF);
adcPhase(JUNGFRAU_QUARTERSPEED_ADC_PHASE);
break;
sls_detector_put reg 0x59 0x7f7c
sls_detector_put reg 0x42 0x20
sls_detector_put status stop
sls_detector_put reg 0x5d 0x00000f00
sls_detector_put adcphase 65
sls_detector_put status start
break;
case QUARTER:
printf("Setting Half Speed (10 MHz)\n");
sls_detector_put reg 0x59 0x8981
sls_detector_put reg 0x42 0x10
sls_detector_put reg 0x5d 0xf0000f00
sls_detector_put adcphase 25
sls_detector_put status start
break;
}
}
getClockDivider(ic);
}
//u_int32_t l=0x0c;
//u_int32_t h=0x0d;
u_int32_t tot= PLL_VCO_FREQ_MHZ/d;
// int ic=0 is run clk; ic=1 is adc clk
if(myDetectorType == JUNGFRAU)
printf("set clk divider to %d\n", ic, d);
else{
printf("set clk divider %d to %d\n", ic, d);
printf("set clk divider %d to %d\n", ic, d);
if (ic>1)
return -1;
@ -616,7 +618,7 @@ u_int32_t setClockDivider(int d, int ic) {
if (tot<1)
return -1;
}
clkDivider[ic]=d;
@ -665,6 +667,23 @@ int getPhase() {
u_int32_t getClockDivider(int ic) {
if(myDetectorType == JUNGFRAU){
enum clkspeed{FULL,HALF,QUARTER};
switch(initSpeedConfGain(-1)){
//case JUNGFRAU_FULLSPEED_CONF:
//return FULL;
case JUNGFRAU_HALFSPEED_CONF:
return HALF;
case JUNGFRAU_QUARTERSPEED_CONF:
return QUARTER;
default:
return -1;
}
}
if (ic>1)
return -1;
return clkDivider[ic];
@ -702,6 +721,11 @@ u_int32_t getClockDivider(int ic) {
u_int32_t adcPipeline(int d) {
if(myDetectorType == JUNGFRAU){
if (d>=0)
bus_w(ADC_PIPELINE_REG, d);
return bus_r(ADC_PIPELINE_REG);
}
if (d>=0)
bus_w(DAQ_REG, d);
return bus_r(DAQ_REG)&0xff;
@ -709,9 +733,11 @@ u_int32_t adcPipeline(int d) {
u_int32_t dbitPipeline(int d){
if(myDetectorType != JUNGFRAU)
return 0;
if (d>=0)
bus_w(DAQ_REG, d);
return bus_r(DAQ_REG)&0xff;
bus_w(DBIT_PIPELINE_REG, d);
return bus_r(DBIT_PIPELINE_REG);
}
u_int32_t setSetLength(int d) {
@ -1669,24 +1695,43 @@ int initHighVoltage(int val, int imod){
/*used only by jungfrau */
int initConfGain(int isettings,int val,int imod){
int retval;
u_int32_t addr=CONFGAIN_REG;
if(isettings!=-1){
#ifdef VERBOSE
printf("Setting Gain of module:%d with val:%d\n",imod,val);
#endif
bus_w(addr,val);
//#ifdef VERBOSE
printf("Setting Gain with val:%d\n",val);
//#endif
bus_w(addr,(val|(bus_r(addr)&~JUNGFRAU_GAIN_MASK)));
}
retval=(bus_r(addr));
#ifdef VERBOSE
retval=(bus_r(addr)&JUNGFRAU_GAIN_MASK);
//#ifdef VERBOSE
printf("Value read from Gain reg is %d\n",retval);
#endif
printf("Gain Reg Value is %d\n",bus_r(addr));
//#endif
return retval;
}
/*used only by jungfrau */
int initSpeedConfGain(int val){
int retval;
u_int32_t addr=CONFGAIN_REG;
if(val!=-1){
//#ifdef VERBOSE
printf("Setting Speed of Gain reg with val:%d\n",val);
//#endif
bus_w(addr,((val<<JUNGFRAU_SPEED_GAIN_OFFSET)|(bus_r(addr)&~JUNGFRAU_SPEED_GAIN_MASK)));
}
retval=((bus_r(addr)&JUNGFRAU_SPEED_GAIN_MASK)>>JUNGFRAU_SPEED_GAIN_OFFSET);
//#ifdef VERBOSE
printf("Value read from Speed of Gain reg is %d\n",retval);
printf("Gain Reg Value is %d\n",bus_r(addr));
//#endif
return retval;
}
int setADC(int adc){
int reg,nchips,mask,nchans;

1
slsDetectorSoftware/jungfrauDetectorServer/firmware_funcs.h
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@ -77,6 +77,7 @@ int getDacRegister(int dacnum);
int getTemperature(int tempSensor,int imod);
int initHighVoltage(int val,int imod);
int initConfGain(int isettings,int val,int imod);
int initSpeedConfGain(int val);
int setADC(int adc);
//int configureMAC(int ipad, long long int macad, long long int detectormacadd, int detipad, int ival, int udpport);

5
slsDetectorSoftware/jungfrauDetectorServer/registers_m.h
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@ -414,6 +414,11 @@
#define SETTINGS_MASK 0x000000f0
#define SETTINGS_OFFSET 4
#define JUNGFRAU_GAIN_MASK 0x0000ffff
#define JUNGFRAU_SPEED_GAIN_MASK 0xf0000000
#define JUNGFRAU_SPEED_GAIN_OFFSET 28
/* CHIP_OF_INTRST_REG */
#define CHANNEL_MASK 0xffff0000

42
slsDetectorSoftware/jungfrauDetectorServer/server_funcs.c
View File

@ -14,21 +14,7 @@
int (*flist[256])(int);
//defined in the detector specific file
/* #ifdef MYTHEND */
/* const enum detectorType myDetectorType=MYTHEN; */
/* #elif GOTTHARDD */
/* const enum detectorType myDetectorType=GOTTHARD; */
/* #elif EIGERD */
/* const enum detectorType myDetectorType=EIGER; */
/* #elif PICASSOD */
/* const enum detectorType myDetectorType=PICASSO; */
/* #elif MOENCHD */
/* const enum detectorType myDetectorType=MOENCH; */
/* #else */
enum detectorType myDetectorType=GENERIC;
/* #endif */
extern int nModX;
extern int nModY;
@ -55,13 +41,23 @@ extern int withGotthard;
int adcvpp=0x4;
/** for jungfrau reinitializing macro later */
// for jungfrau reinitializing macro later
int N_CHAN=NCHAN;
int N_CHIP=NCHIP;
int N_DAC=NDAC;
int N_ADC=NADC;
int N_CHANS=NCHANS;
//jungfrau specific
const static int JUNGFRAU_HALFSPEED_DBIT_PIPELINE = 0x7f7c;
const static int JUNGFRAU_QUARTERSPEED_DBIT_PIPELINE = 0x8981;
const static int JUNGFRAU_HALFSPEED_ADC_PIPELINE = 0x20;
const static int JUNGFRAU_QUARTERSPEED_ADC_PIPELINE = 0x10;
const static int JUNGFRAU_HALFSPEED_CONF = 0x0;
const static int JUNGFRAU_QUARTERSPEED_CONF = 0xf;
const static int JUNGFRAU_HALFSPEED_ADC_PHASE = 65;
const static int JUNGFRAU_QUARTERSPEED_ADC_PHASE = 25;
int init_detector(int b, int checkType) {
@ -180,31 +176,23 @@ int init_detector(int b, int checkType) {
writeADC(ADCREG4,0x3f);
//vrefs - configurable?
writeADC(ADCREG_VREFS,0x2);
//set ADCINVERSionreg (by trial and error)
bus_w(ADC_INVERSION_REG,0x453b2a9c);
//set adc_pipeline
bus_w(ADC_PIPELINE_REG,0x20); //same as ADC_OFFSET_REG
//set dbit_pipeline
bus_w(DBIT_PIPELINE_REG,0x7f7c);
//set adc_clock_phase in unit of 1/(52) clock period (by trial and error)
adcPhase(65);
adcPipeline(JUNGFRAU_HALFSPEED_ADC_PIPELINE);
dbitPipeline(JUNGFRAU_HALFSPEED_DBIT_PIPELINE);
adcPhase(JUNGFRAU_HALFSPEED_ADC_PHASE); //set adc_clock_phase in unit of 1/(52) clock period (by trial and error)
//reset mem machine fifos fifos
bus_w(MEM_MACHINE_FIFOS_REG,0x4000);
bus_w(MEM_MACHINE_FIFOS_REG,0x0);
//reset run control
bus_w(MEM_MACHINE_FIFOS_REG,0x0400);
bus_w(MEM_MACHINE_FIFOS_REG,0x0);
//set default setting
initSpeedConfGain(JUNGFRAU_HALFSPEED_CONF);
setSettings(DYNAMICGAIN,-1);
/*setting the 4bits to 0x0 (MSB)*/
}