detectors/slsDetectorPackage
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some format changes

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mazzol_a
2026-05-29 15:27:56 +02:00
parent 58453a5f33
commit 77940231a3
3 changed files with 119 additions and 54 deletions
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etc/generate_registerdefs.py
+5
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@@ -77,6 +77,11 @@ constexpr RegisterField ModuleIndex{
// clang-format on
"""
postpend = r"""
} // namespace sls
// clang-format on
"""
def main():
args = argument_parser()
slsDetectorServers/matterhonServer/include/RegisterDefs.hpp
+106 -50
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@@ -1,6 +1,9 @@
// clang-format off
#include "RegisterHelperStructs.hpp"
namespace sls {
/// @brief Enum for IP cores, value are adresses
constexpr enum class IPCore : uint32_t {
MH_RO_SM_AXI = 0, // dummy adresses for now
@@ -82,103 +85,156 @@ constexpr Register PktCoordReg2{IPCore::PACKETIZERREG, 0xa110};
// Register fields
constexpr RegisterField Power_VIO{CTRL_Reg, 0x1, 0};
constexpr RegisterField Power_VIO{
CTRL_Reg, 0, 0x1};
constexpr RegisterField Power_Vcc_A{CTRL_Reg, 0x1, 1};
constexpr RegisterField Power_Vcc_A{
CTRL_Reg, 1, 0x1};
constexpr RegisterField Power_Vcc_B{CTRL_Reg, 0x1, 2};
constexpr RegisterField Power_Vcc_B{
CTRL_Reg, 2, 0x1};
constexpr RegisterField Power_Vcc_C{CTRL_Reg, 0x1, 3};
constexpr RegisterField Power_Vcc_C{
CTRL_Reg, 3, 0x1};
constexpr RegisterField Power_Vcc_D{CTRL_Reg, 0x1, 4};
constexpr RegisterField Power_Vcc_D{
CTRL_Reg, 4, 0x1};
constexpr RegisterField MH_Enable_Enable{CTRL_Reg, 0x1, 5};
constexpr RegisterField MH_Enable_Enable{
CTRL_Reg, 5, 0x1};
constexpr RegisterField MH_Clk_Enable{CTRL_Reg, 0x1, 6};
constexpr RegisterField MH_Clk_Enable{
CTRL_Reg, 6, 0x1};
constexpr RegisterField sm_busy{Status_Reg, 0x1, 0};
constexpr RegisterField sm_busy{
Status_Reg, 0, 0x1};
constexpr RegisterField FPGACompDate{FPGAVersionReg, 0xffffff, 0};
constexpr RegisterField FPGACompDate{
FPGAVersionReg, 0, 0xffffff};
constexpr RegisterField FPGADetType{FPGAVersionReg, 0xff, 24};
constexpr RegisterField FPGADetType{
FPGAVersionReg, 24, 0xff};
constexpr RegisterField FPGA_GIT_HEAD{FPGA_GIT_HEAD, 0xffffffff, 0};
constexpr RegisterField FPGA_GIT_HEAD{
FPGA_GIT_HEAD, 0, 0xffffffff};
constexpr RegisterField FixedPattern{FixedPatternReg, 0xffffffff, 0};
constexpr RegisterField FixedPattern{
FixedPatternReg, 0, 0xffffffff};
constexpr RegisterField ApiCompDate{ApiVersionReg, 0xffffff, 0};
constexpr RegisterField ApiCompDate{
ApiVersionReg, 0, 0xffffff};
constexpr RegisterField ApiDetType{ApiVersionReg, 0xff, 24};
constexpr RegisterField ApiDetType{
ApiVersionReg, 24, 0xff};
constexpr RegisterField ChipID{Chip_ID_Reg, 0x7, 0};
constexpr RegisterField ChipID{
Chip_ID_Reg, 0, 0x7};
constexpr RegisterField Start_Acquistion{MH_SM_Ctrl_Reg, 0x1, 0};
constexpr RegisterField Start_Acquistion{
MH_SM_Ctrl_Reg, 0, 0x1};
constexpr RegisterField Stop_Acquistion{MH_SM_Ctrl_Reg, 0x1, 1};
constexpr RegisterField Stop_Acquistion{
MH_SM_Ctrl_Reg, 1, 0x1};
constexpr RegisterField MH_Readout_Exposure_Time{MH_SM_Exposure_Reg, 0xffffffff, 0};
constexpr RegisterField MH_Readout_Exposure_Time{
MH_SM_Exposure_Reg, 0, 0xffffffff};
constexpr RegisterField MH_Readout_Period_Time{MH_SM_Period_Reg, 0xffffffff, 0};
constexpr RegisterField MH_Readout_Period_Time{
MH_SM_Period_Reg, 0, 0xffffffff};
constexpr RegisterField MH_Readout_Frames{MH_SM_Frames_Reg, 0xffffffff, 0};
constexpr RegisterField MH_Readout_Frames{
MH_SM_Frames_Reg, 0, 0xffffffff};
constexpr RegisterField MH_SM_StoreLength{MH_SM_StoreLength_Reg, 0xffffffff, 0};
constexpr RegisterField MH_SM_StoreLength{
MH_SM_StoreLength_Reg, 0, 0xffffffff};
constexpr RegisterField MH_SM_ResetMHLength{MH_SM_ResetMHLength_Reg, 0xffffffff, 0};
constexpr RegisterField MH_SM_ResetMHLength{
MH_SM_ResetMHLength_Reg, 0, 0xffffffff};
constexpr RegisterField Frame_Hdr_Set_Framenumber{Frame_HDR_Set_Reg, 0x1, 0};
constexpr RegisterField Frame_Hdr_Set_Framenumber{
Frame_HDR_Set_Reg, 0, 0x1};
constexpr RegisterField Frame_Hdr_Set_Timestamp{Frame_HDR_Set_Reg, 0x1, 1};
constexpr RegisterField Frame_Hdr_Set_Timestamp{
Frame_HDR_Set_Reg, 1, 0x1};
constexpr RegisterField Frame_Hdr_Framenumber_LSB{Frame_HDR_FrameNumLSB_Reg, 0xffffffff, 0};
constexpr RegisterField Frame_Hdr_Framenumber_LSB{
Frame_HDR_FrameNumLSB_Reg, 0, 0xffffffff};
constexpr RegisterField Frame_Hdr_Framenumber_MSB{Frame_HDR_FrameNumMSB_Reg, 0xffffffff, 0};
constexpr RegisterField Frame_Hdr_Framenumber_MSB{
Frame_HDR_FrameNumMSB_Reg, 0, 0xffffffff};
constexpr RegisterField Frame_Hdr_Timestamp_LSB{Frame_HDR_TimestampLSB_Reg, 0xffffffff, 0};
constexpr RegisterField Frame_Hdr_Timestamp_LSB{
Frame_HDR_TimestampLSB_Reg, 0, 0xffffffff};
constexpr RegisterField Frame_Hdr_Timestamp_MSB{Frame_HDR_TimestampMSB_Reg, 0xffffffff, 0};
constexpr RegisterField Frame_Hdr_Timestamp_MSB{
Frame_HDR_TimestampMSB_Reg, 0, 0xffffffff};
constexpr RegisterField Frame_HDR_ModCoord_LSB{Frame_HDR_ModCoord_LSB_Reg, 0xffffffff, 0};
constexpr RegisterField Frame_HDR_ModCoord_LSB{
Frame_HDR_ModCoord_LSB_Reg, 0, 0xffffffff};
constexpr RegisterField Frame_HDR_ModCoord_MSB{Frame_HDR_ModCoord_MSB_Reg, 0xffffffff, 0};
constexpr RegisterField Frame_HDR_ModCoord_MSB{
Frame_HDR_ModCoord_MSB_Reg, 0, 0xffffffff};
constexpr RegisterField Frame_HDR_PktctrMax{Frame_HDR_PktctrMax_Reg, 0xff, 0};
constexpr RegisterField Frame_HDR_PktctrMax{
Frame_HDR_PktctrMax_Reg, 0, 0xff};
constexpr RegisterField Aurora_Number_Valid_DW{Aurora_Valid_DW_Reg, 0xffffffff, 0};
constexpr RegisterField Aurora_Number_Valid_DW{
Aurora_Valid_DW_Reg, 0, 0xffffffff};
constexpr RegisterField Aurora_Valid_Bytes{Aurora_Valid_Bytes_Reg, 0xffffffff, 0};
constexpr RegisterField Aurora_Valid_Bytes{
Aurora_Valid_Bytes_Reg, 0, 0xffffffff};
constexpr RegisterField Aurora_Busy_Up_Cycles{Aurora_Busy_Up_Cycles_Reg, 0xffffffff, 0};
constexpr RegisterField Aurora_Busy_Up_Cycles{
Aurora_Busy_Up_Cycles_Reg, 0, 0xffffffff};
constexpr RegisterField Aurora_Hard_Errors{Aurora_Hard_Errors_Reg, 0xffffffff, 0};
constexpr RegisterField Aurora_Hard_Errors{
Aurora_Hard_Errors_Reg, 0, 0xffffffff};
constexpr RegisterField Aurora_Soft_Errors{Aurora_Soft_Errors_Reg, 0xffffffff, 0};
constexpr RegisterField Aurora_Soft_Errors{
Aurora_Soft_Errors_Reg, 0, 0xffffffff};
constexpr RegisterField Aurora_Lanes_Up{Aurora_Channel_n_Lanes_Up_Reg, 0xf, 0};
constexpr RegisterField Aurora_Lanes_Up{
Aurora_Channel_n_Lanes_Up_Reg, 0, 0xf};
constexpr RegisterField Aurora_Channel_Up{Aurora_Channel_n_Lanes_Up_Reg, 0x1, 4};
constexpr RegisterField Aurora_Channel_Up{
Aurora_Channel_n_Lanes_Up_Reg, 4, 0x1};
constexpr RegisterField Aurora_GT_PLL_Lock{Aurora_GT_PLL_Lock_Reg, 0x1, 0};
constexpr RegisterField Aurora_GT_PLL_Lock{
Aurora_GT_PLL_Lock_Reg, 0, 0x1};
constexpr RegisterField Aurora_GT_PLL_Lock_Counter{Aurora_GT_PLL_Lock_Reg, 0x1ffffff, 4};
constexpr RegisterField Aurora_GT_PLL_Lock_Counter{
Aurora_GT_PLL_Lock_Reg, 4, 0x1ffffff};
constexpr RegisterField PacketLength1G{PktPacketLengthReg, 0xffff, 0};
constexpr RegisterField PacketLength1G{
PktPacketLengthReg, 0, 0xffff};
constexpr RegisterField PacketLength10G{PktPacketLengthReg, 0xffff, 16};
constexpr RegisterField PacketLength10G{
PktPacketLengthReg, 16, 0xffff};
constexpr RegisterField NoPackets1G{PktNoPacketsReg, 0x3f, 0};
constexpr RegisterField NoPackets1G{
PktNoPacketsReg, 0, 0x3f};
constexpr RegisterField NoPackets10G{PktNoPacketsReg, 0x3f, 16};
constexpr RegisterField NoPackets10G{
PktNoPacketsReg, 16, 0x3f};
constexpr RegisterField NoServers{PktCtrlReg, 0x3f, 0};
constexpr RegisterField NoServers{
PktCtrlReg, 0, 0x3f};
constexpr RegisterField ServerStart{PktCtrlReg, 0x1f, 8};
constexpr RegisterField ServerStart{
PktCtrlReg, 8, 0x1f};
constexpr RegisterField EthInterf{PktCtrlReg, 0x1, 16};
constexpr RegisterField EthInterf{
PktCtrlReg, 16, 0x1};
constexpr RegisterField Coordx{PktCoordReg1, 0xffff, 0};
constexpr RegisterField Coordx{
PktCoordReg1, 0, 0xffff};
constexpr RegisterField Coordy{PktCoordReg1, 0xffff, 16};
constexpr RegisterField Coordy{
PktCoordReg1, 16, 0xffff};
constexpr RegisterField Coordz{PktCoordReg2, 0xffff, 0};
constexpr RegisterField Coordz{
PktCoordReg2, 0, 0xffff};
} // namespace sls
// clang-format on
slsDetectorServers/matterhonServer/include/RegisterHelperStructs.hpp
+8 -4
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@@ -1,6 +1,8 @@
#include <cstdint>
#include <string_view>
namespace sls {
enum class IPCore : uint32_t; // forward declaration of IPCore enum class
struct Register {
@@ -16,10 +18,12 @@ struct RegisterField {
/// @brief Register to which the field belongs
const Register register_{};
/// @brief Bitmask for the field
const uint32_t bitmask{};
/// @brief Bit position of the least significant bit of the field in the
/// register
const uint32_t bit_position{};
};
/// @brief Bitmask for the field
const uint32_t bitmask{};
};
} // namespace sls