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fix to allow all clks for pll (totaldiv was float instead of int) (#579)
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86
slsDetectorServers/compileAllServers_noAPIUpdate.sh
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86
slsDetectorServers/compileAllServers_noAPIUpdate.sh
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# SPDX-License-Identifier: LGPL-3.0-or-other
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# Copyright (C) 2021 Contributors to the SLS Detector Package
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# empty branch = developer branch in updateAPIVersion.sh
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branch=""
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det_list=("ctbDetectorServer"
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"gotthardDetectorServer"
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"gotthard2DetectorServer"
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"jungfrauDetectorServer"
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"mythen3DetectorServer"
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"moenchDetectorServer"
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)
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usage="\nUsage: compileAllServers.sh [server|all(opt)] [branch(opt)]. \n\tNo arguments mean all servers with 'developer' branch. \n\tNo 'branch' input means 'developer branch'"
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# arguments
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if [ $# -eq 0 ]; then
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# no argument, all servers
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declare -a det=${det_list[@]}
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echo "Compiling all servers"
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elif [ $# -eq 1 ] || [ $# -eq 2 ]; then
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# 'all' servers
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if [[ $1 == "all" ]]; then
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declare -a det=${det_list[@]}
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echo "Compiling all servers"
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else
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# only one server
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# arg not in list
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if [[ $det_list != *$1* ]]; then
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echo -e "Invalid argument 1: $1. $usage"
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return -1
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fi
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declare -a det=("${1}")
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#echo "Compiling only $1"
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fi
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# branch
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if [ $# -eq 2 ]; then
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# arg in list
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if [[ $det_list == *$2* ]]; then
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echo -e "Invalid argument 2: $2. $usage"
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return -1
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fi
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branch+=$2
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#echo "with branch $branch"
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fi
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else
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echo -e "Too many arguments.$usage"
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return -1
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fi
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declare -a deterror=("OK" "OK" "OK" "OK" "OK" "OK")
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echo -e "list is ${det[@]}"
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# compile each server
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idet=0
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for i in ${det[@]}
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do
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dir=$i
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file="${i}_developer"
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echo -e "Compiling $dir [$file]"
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cd $dir
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make clean
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if make API_BRANCH=$branch; then
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deterror[$idet]="OK"
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else
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deterror[$idet]="FAIL"
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fi
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mv bin/$dir bin/$file
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git add -f bin/$file
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cp bin/$file /tftpboot/
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cd ..
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echo -e "\n\n"
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((++idet))
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done
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echo -e "Results:"
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idet=0
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for i in ${det[@]}
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do
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printf "%s\t\t= %s\n" "$i" "${deterror[$idet]}"
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((++idet))
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done
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@ -274,7 +274,7 @@ int ALTERA_PLL_SetOuputFrequency(int clkIndex, int pllVCOFreqMhz, int value) {
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clkIndex, value, pllVCOFreqMhz));
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clkIndex, value, pllVCOFreqMhz));
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// calculate output frequency
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// calculate output frequency
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float total_div = (float)pllVCOFreqMhz / (float)value;
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int total_div = (float)pllVCOFreqMhz / (float)value;
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// assume 50% duty cycle
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// assume 50% duty cycle
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uint32_t low_count = total_div / 2;
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uint32_t low_count = total_div / 2;
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@ -282,7 +282,7 @@ int ALTERA_PLL_SetOuputFrequency(int clkIndex, int pllVCOFreqMhz, int value) {
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uint32_t odd_division = 0;
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uint32_t odd_division = 0;
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// odd division
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// odd division
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if (total_div > (float)(2 * low_count)) {
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if (total_div > (2 * low_count)) {
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++high_count;
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++high_count;
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odd_division = 1;
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odd_division = 1;
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}
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}
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@ -172,7 +172,7 @@ void ALTERA_PLL_C10_SetOuputClockDivider(int pllIndex, int clkIndex,
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uint32_t odd_division = 0;
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uint32_t odd_division = 0;
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// odd division
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// odd division
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if (value > (int)(2 * low_count)) {
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if (value > (2 * low_count)) {
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++high_count;
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++high_count;
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odd_division = 1;
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odd_division = 1;
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}
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}
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