fix to allow all clks for pll (totaldiv was float instead of int) (#579)

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Dhanya Thattil 2022-11-17 16:39:17 +01:00 committed by GitHub
parent 4bb1a612f1
commit 5ea2cdb83d
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9 changed files with 89 additions and 3 deletions

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@ -0,0 +1,86 @@
# SPDX-License-Identifier: LGPL-3.0-or-other
# Copyright (C) 2021 Contributors to the SLS Detector Package
# empty branch = developer branch in updateAPIVersion.sh
branch=""
det_list=("ctbDetectorServer"
"gotthardDetectorServer"
"gotthard2DetectorServer"
"jungfrauDetectorServer"
"mythen3DetectorServer"
"moenchDetectorServer"
)
usage="\nUsage: compileAllServers.sh [server|all(opt)] [branch(opt)]. \n\tNo arguments mean all servers with 'developer' branch. \n\tNo 'branch' input means 'developer branch'"
# arguments
if [ $# -eq 0 ]; then
# no argument, all servers
declare -a det=${det_list[@]}
echo "Compiling all servers"
elif [ $# -eq 1 ] || [ $# -eq 2 ]; then
# 'all' servers
if [[ $1 == "all" ]]; then
declare -a det=${det_list[@]}
echo "Compiling all servers"
else
# only one server
# arg not in list
if [[ $det_list != *$1* ]]; then
echo -e "Invalid argument 1: $1. $usage"
return -1
fi
declare -a det=("${1}")
#echo "Compiling only $1"
fi
# branch
if [ $# -eq 2 ]; then
# arg in list
if [[ $det_list == *$2* ]]; then
echo -e "Invalid argument 2: $2. $usage"
return -1
fi
branch+=$2
#echo "with branch $branch"
fi
else
echo -e "Too many arguments.$usage"
return -1
fi
declare -a deterror=("OK" "OK" "OK" "OK" "OK" "OK")
echo -e "list is ${det[@]}"
# compile each server
idet=0
for i in ${det[@]}
do
dir=$i
file="${i}_developer"
echo -e "Compiling $dir [$file]"
cd $dir
make clean
if make API_BRANCH=$branch; then
deterror[$idet]="OK"
else
deterror[$idet]="FAIL"
fi
mv bin/$dir bin/$file
git add -f bin/$file
cp bin/$file /tftpboot/
cd ..
echo -e "\n\n"
((++idet))
done
echo -e "Results:"
idet=0
for i in ${det[@]}
do
printf "%s\t\t= %s\n" "$i" "${deterror[$idet]}"
((++idet))
done

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@ -274,7 +274,7 @@ int ALTERA_PLL_SetOuputFrequency(int clkIndex, int pllVCOFreqMhz, int value) {
clkIndex, value, pllVCOFreqMhz));
// calculate output frequency
float total_div = (float)pllVCOFreqMhz / (float)value;
int total_div = (float)pllVCOFreqMhz / (float)value;
// assume 50% duty cycle
uint32_t low_count = total_div / 2;
@ -282,7 +282,7 @@ int ALTERA_PLL_SetOuputFrequency(int clkIndex, int pllVCOFreqMhz, int value) {
uint32_t odd_division = 0;
// odd division
if (total_div > (float)(2 * low_count)) {
if (total_div > (2 * low_count)) {
++high_count;
odd_division = 1;
}

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@ -172,7 +172,7 @@ void ALTERA_PLL_C10_SetOuputClockDivider(int pllIndex, int clkIndex,
uint32_t odd_division = 0;
// odd division
if (value > (int)(2 * low_count)) {
if (value > (2 * low_count)) {
++high_count;
odd_division = 1;
}