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fix to allow all clks for pll (totaldiv was float instead of int) (#579)

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Dhanya Thattil
2022-11-17 16:39:17 +01:00
committed by GitHub
parent 4bb1a612f1
commit 5ea2cdb83d
9 changed files with 89 additions and 3 deletions
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4
slsDetectorServers/slsDetectorServer/src/ALTERA_PLL.c
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@@ -274,7 +274,7 @@ int ALTERA_PLL_SetOuputFrequency(int clkIndex, int pllVCOFreqMhz, int value) {
clkIndex, value, pllVCOFreqMhz));
// calculate output frequency
float total_div = (float)pllVCOFreqMhz / (float)value;
int total_div = (float)pllVCOFreqMhz / (float)value;
// assume 50% duty cycle
uint32_t low_count = total_div / 2;
@@ -282,7 +282,7 @@ int ALTERA_PLL_SetOuputFrequency(int clkIndex, int pllVCOFreqMhz, int value) {
uint32_t odd_division = 0;
// odd division
if (total_div > (float)(2 * low_count)) {
if (total_div > (2 * low_count)) {
++high_count;
odd_division = 1;
}

2
slsDetectorServers/slsDetectorServer/src/ALTERA_PLL_CYCLONE10.c
View File

@@ -172,7 +172,7 @@ void ALTERA_PLL_C10_SetOuputClockDivider(int pllIndex, int clkIndex,
uint32_t odd_division = 0;
// odd division
if (value > (int)(2 * low_count)) {
if (value > (2 * low_count)) {
++high_count;
odd_division = 1;
}