gotthard: changed the fpga dummyreg read/write test

git-svn-id: file:///afs/psi.ch/project/sls_det_software/svn/slsDetectorSoftware@49 951219d9-93cf-4727-9268-0efd64621fa3
This commit is contained in:
maliakal_d 2011-11-15 14:24:45 +00:00
parent 025c6ae10f
commit 5d687a1dee
3 changed files with 44 additions and 45 deletions

View File

@ -127,50 +127,52 @@ int setDummyRegister() {
valw=((valw&(~(0x1<<csdx))));bus_w(offw,valw); //chip sel bar down
for (i=1;i<25;i++) {
valw=(valw&(~(0x1<<cdx)));bus_w(offw,valw); //cldwn
valw=((valw&(~(0x1<<ddx)))+(((codata>>(24-i))&0x1)<<ddx));bus_w(offw,valw);//write data (i)
// printf("%d ", ((codata>>(24-i))&0x1));
valw=((valw&(~(0x1<<cdx)))+(0x1<<cdx));bus_w(offw,valw);//clkup
}
valw=((valw&(~(0x1<<csdx)))+(0x1<<csdx));bus_w(offw,valw); //csup
valw=(valw&(~(0x1<<cdx)));bus_w(offw,valw); //cldwn
valw=0xffff; bus_w(offw,(valw)); // stop point =start point of course
printf("Writing %d in DAC(0-7) %d \n",dacvalue,dacnum);
}
valw=(valw&(~(0x1<<cdx)));bus_w(offw,valw); //cldwn
valw=((valw&(~(0x1<<ddx)))+(((codata>>(24-i))&0x1)<<ddx));bus_w(offw,valw);//write data (i)
// printf("%d ", ((codata>>(24-i))&0x1));
valw=((valw&(~(0x1<<cdx)))+(0x1<<cdx));bus_w(offw,valw);//clkup
}
valw=((valw&(~(0x1<<csdx)))+(0x1<<csdx));bus_w(offw,valw); //csup
valw=(valw&(~(0x1<<cdx)));bus_w(offw,valw); //cldwn
valw=0xffff; bus_w(offw,(valw)); // stop point =start point of course
printf("Writing %d in DAC(0-7) %d \n",dacvalue,dacnum);
}
*/
u_int32_t val,addr;
volatile u_int32_t val,addr;
addr = DUMMY_REG;
// (else use bs_w16)
int i;
for(i=0;i<100;i++)
if(result==OK)
{
//dummy register
val=45;
bus_w(addr, val);
val=bus_r(addr);
if (val!=45) {
printf("ATTEMPT:%d:\tFPGA dummy register wrong!! %x instead of 0xF0F0F0F0 \n",i,val);
result=FAIL;
}
//dummy register
val=0x0F0F0F0F;
bus_w(addr, val);
val=bus_r(addr);
if (val!=0x0F0F0F0F) {
printf("ATTEMPT:%d:\tFPGA dummy register wrong!! %x instead of 0x0F0F0F0F \n",i,val);
result=FAIL;
}
//dummy register
val=0xF0F0F0F0;
bus_w(DUMMY_REG, val);
val=bus_r(DUMMY_REG);
if (val!=0xF0F0F0F0) {
printf("ATTEMPT:%d:\tFPGA dummy register wrong!! %x instead of 0xF0F0F0F0 \n",i,val);
result=FAIL;
}
{
//dummy register
val=0x5A5A5A5A-i;
bus_w(addr, val);
// bus_w(SET_DELAY_LSB_REG,0);
//val=bus_r(addr);
val=bus_r(addr);
if (val!=0x5A5A5A5A-i) {
printf("ATTEMPT:%d:\tFPGA dummy register wrong!! %x instead of %x \n",i,val,0x5A5A5A5A-i);
result=FAIL;
}
//dummy register
val=0x0F0F0F0F;
bus_w(addr, val);
val=bus_r(addr);
if (val!=0x0F0F0F0F) {
printf("ATTEMPT:%d:\tFPGA dummy register wrong!! %x instead of 0x0F0F0F0F \n",i,val);
result=FAIL;
}
//dummy register
val=0xF0F0F0F0;
bus_w(DUMMY_REG, val);
val=bus_r(DUMMY_REG);
if (val!=0xF0F0F0F0) {
printf("ATTEMPT:%d:\tFPGA dummy register wrong!! %x instead of 0xF0F0F0F0 \n\n",i,val);
result=FAIL;
}
}
if(result==OK)
{
printf("\n\n----------------------------------------------------------------------------------------------");
@ -181,12 +183,6 @@ int setDummyRegister() {
}
//aldos function volatile (not needed)
u_int16_t bus_w16(u_int32_t offset, u_int16_t data) {
u_int16_t *ptr1;

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@ -756,8 +756,9 @@ void showbits(int h)
int initDACs(int* v,int imod)
{
#ifdef VERBOSE
printf("\n..inside initdacs\n");
#endif
int iaddr;
// sDac=0;
for (iaddr=0; iaddr<8; iaddr++) {
@ -783,7 +784,9 @@ int initDACs(int* v,int imod)
int setSettings(int i)
{
#ifdef VERBOSE
printf("\ninside set settings wit settins=%d...\n",i);
#endif
int imod, isett, is;
int vrefds[] = VREFDS_VALS;
int vcascn[] = VCASCN_VALS;

View File

@ -18,7 +18,7 @@ int main(int argc, char *argv[])
int portno, b;
char cmd[100];
int retval=OK;
if (argc==1) {
portno = DEFAULT_PORTNO;
sprintf(cmd,"%s %d &",argv[0],DEFAULT_PORTNO+1);