added bf_usleep with proper timing for blackfin
Build on RHEL9 docker image / build (push) Successful in 3m26s
Build on RHEL8 docker image / build (push) Successful in 4m44s
Run Simulator Tests on local RHEL9 / build (push) Successful in 14m40s
Run Simulator Tests on local RHEL8 / build (push) Successful in 17m3s

This commit is contained in:
2026-03-31 09:34:28 +02:00
parent c3b8d59de4
commit 52ec2e1e1e
@@ -11064,6 +11064,15 @@ int set_pattern_wait_interval(int file_des) {
return Server_SendResult(file_des, INT64, NULL, 0);
}
// usleep is not viable on blackfin
void usleep_bf(uint64_t i){
const uint64_t BFIN_CYCLES_1uSECOND=20;
uint64_t j=i*20;
while(--j){
asm volatile("");
}
}
/**
* Non destructive read from SPI register. Read n_bytes by shifting in dummy
* data while keeping csn 0 after the operation. Shift the read out data back
@@ -11220,7 +11229,7 @@ int spi_read(int file_des) {
bus_r(SPI_CTRL_REG) | (1 << SPI_CTRL_WRITESTROBE_BIT));
bus_w(SPI_CTRL_REG,
bus_r(SPI_CTRL_REG) & ~(1 << SPI_CTRL_WRITESTROBE_BIT));
usleep(50);
usleep_bf(25);
local_rx[i] = (uint8_t)bus_r(SPI_READDATA_REG);
bus_w(SPI_CTRL_REG,
bus_r(SPI_CTRL_REG) | (1 << SPI_CTRL_READSTROBE_BIT));
@@ -11268,7 +11277,7 @@ int spi_read(int file_des) {
bus_r(SPI_CTRL_REG) | (1 << SPI_CTRL_WRITESTROBE_BIT));
bus_w(SPI_CTRL_REG,
bus_r(SPI_CTRL_REG) & ~(1 << SPI_CTRL_WRITESTROBE_BIT));
usleep(50);
usleep_bf(25);
local_rx[i] = (uint8_t)bus_r(SPI_READDATA_REG);
bus_w(SPI_CTRL_REG,
bus_r(SPI_CTRL_REG) | (1 << SPI_CTRL_READSTROBE_BIT));
@@ -11402,7 +11411,7 @@ int spi_write(int file_des) {
bus_r(SPI_CTRL_REG) | (1 << SPI_CTRL_WRITESTROBE_BIT));
bus_w(SPI_CTRL_REG,
bus_r(SPI_CTRL_REG) & ~(1 << SPI_CTRL_WRITESTROBE_BIT));
usleep(50);
usleep_bf(25);
local_rx[i] = (uint8_t)bus_r(SPI_READDATA_REG);
bus_w(SPI_CTRL_REG,
bus_r(SPI_CTRL_REG) | (1 << SPI_CTRL_READSTROBE_BIT));
@@ -11421,4 +11430,5 @@ int spi_write(int file_des) {
free(local_tx);
free(local_rx);
return ret;
}
}