mirror of
https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2026-11-09 18:33:53 +01:00
1010/jf chip1 2 part3 (#1619)
* cli and test side wip * server side upto imp * almost done, need to pick up from last pr to get chipindex * update activatetime also for exptime * use chipindex and fix the cli put * minor * tests pass * binary in * hdr mode works * binaries in * cannot cap activation time with 8 bit storage * update activation time when changin exptime only if hdr enabled * update activation time no matter if hdr enabled or not (when changing exptime), its anyway not enabled * jf binary in * enable hdr only after setting activation time * jf binary in * fix enable by reading reg again * swapped timeout and activation time, select bits reversed also for 1.2 chipversion * inversion select removed in firmware * jungfrau binary in * minor: err message * fix * fixed autocomplete for synchrortron * should now ++17 as well * added hdr to python * minor * updated the help for hdr * updated the help for python api and the pybindings minor refactor * minor typo in pybind * fixed pybind error
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maliakal_d authored and 
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@@ -9,6 +9,7 @@ pybind11_add_module(_slsdet
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src/pattern.cpp
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src/scan.cpp
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src/current.cpp
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src/hdr.cpp
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src/duration.cpp
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src/DurationWrapper.cpp
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src/pedestal.cpp
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@@ -29,6 +29,7 @@ IpAddr = _slsdet.IpAddr
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MacAddr = _slsdet.MacAddr
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scanParameters = _slsdet.scanParameters
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currentSrcParameters = _slsdet.currentSrcParameters
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hdrParameters = _slsdet.hdrParameters
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DurationWrapper = _slsdet.DurationWrapper
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pedestalParameters = _slsdet.pedestalParameters
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@@ -3003,6 +3003,30 @@ class Detector(CppDetectorApi):
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def collectionmode(self, value):
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ut.set_using_dict(self.setCollectionMode, value)
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@property
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@element
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def hdr(self):
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"""[Jungfrau] Enables the high dynamic range in detector in synchrotron or fel mode.
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Pass in an hdrParameters instance, optionally initialized with the desired operationMode (defs.operationMode.SYNCHOTRON or defs.operationMode.FEL). The default constructor hdrParameters() disables the HDR, which is the default mode of operation. FEL can only be used with chip version '1.2 HDR'.
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Example
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-------
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>>> d.hdr = hdrParameters(defs.SYNCHROTRON)
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>>> d.hdr
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[enabled synchotron]
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>>> d.hdr = hdrParameters(defs.FEL)
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>>>d.hdr
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[enabled fel]
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>>> d.hdr = hdrParameters()
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>>> d.hdr
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[disabled]
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"""
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return self.getHDR()
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@hdr.setter
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def hdr(self, value):
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ut.set_using_dict(self.setHDR, value)
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@property
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def maxclkphaseshift(self):
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"""
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+10
-1
@@ -942,7 +942,6 @@ void init_det(py::module &m) {
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(void (Detector::*)(const std::vector<defs::ROI> &)) &
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Detector::setRxROI,
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py::arg());
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CppDetectorApi.def("clearRxROI",
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(void (Detector::*)()) & Detector::clearRxROI);
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CppDetectorApi.def(
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@@ -1307,6 +1306,16 @@ void init_det(py::module &m) {
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(void (Detector::*)(defs::collectionMode, sls::Positions)) &
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Detector::setCollectionMode,
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py::arg(), py::arg() = Positions{});
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CppDetectorApi.def(
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"getHDR",
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(Result<defs::hdrParameters>(Detector::*)(sls::Positions) const) &
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Detector::getHDR,
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py::arg() = Positions{});
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CppDetectorApi.def(
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"setHDR",
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(void (Detector::*)(const defs::hdrParameters, sls::Positions)) &
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Detector::setHDR,
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py::arg(), py::arg() = Positions{});
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CppDetectorApi.def("getNumberOfBursts",
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(Result<int64_t>(Detector::*)(sls::Positions) const) &
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Detector::getNumberOfBursts,
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@@ -333,4 +333,9 @@ void init_enums(py::module &m) {
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.value("HOLE", slsDetectorDefs::collectionMode::HOLE)
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.value("ELECTRON", slsDetectorDefs::collectionMode::ELECTRON)
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.export_values();
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py::enum_<slsDetectorDefs::operationMode>(Defs, "operationMode")
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.value("SYNCHROTRON", slsDetectorDefs::operationMode::SYNCHROTRON)
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.value("FEL", slsDetectorDefs::operationMode::FEL)
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.export_values();
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}
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@@ -0,0 +1,20 @@
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// SPDX-License-Identifier: LGPL-3.0-or-other
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// Copyright (C) 2021 Contributors to the SLS Detector Package
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#include "py_headers.h"
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#include "sls/ToString.h"
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#include "sls/sls_detector_defs.h"
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namespace py = pybind11;
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void init_hdr(py::module &m) {
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using hdr = slsDetectorDefs::hdrParameters;
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py::class_<hdr>(m, "hdrParameters")
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.def(py::init())
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.def(py::init<slsDetectorDefs::operationMode>())
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.def_readwrite("enable", &hdr::enable)
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.def_readwrite("opMode", &hdr::opMode)
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.def(pybind11::self == pybind11::self)
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.def("__repr__", [](const hdr &a) { return sls::ToString(a); });
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}
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@@ -18,6 +18,7 @@ void init_network(py::module &);
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void init_pattern(py::module &);
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void init_scan(py::module &);
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void init_source(py::module &);
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void init_hdr(py::module &);
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void init_duration(py::module &);
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void init_pedestal(py::module &);
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@@ -38,6 +39,7 @@ PYBIND11_MODULE(_slsdet, m) {
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init_pattern(m);
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init_scan(m);
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init_source(m);
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init_hdr(m);
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init_duration(m);
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init_pedestal(m);
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// init_experimental(m);
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@@ -15,6 +15,7 @@ from slsdet import Detector
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from slsdet._slsdet import slsDetectorDefs
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detectorType = slsDetectorDefs.detectorType
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operationMode = slsDetectorDefs.operationMode
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@pytest.fixture(
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scope="session",
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@@ -77,3 +78,86 @@ def test_numinterfaces(session_simulator):
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d = Detector()
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assert d.numinterfaces == 1
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def test_hdrParameters():
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""" Test hdrParameters struct."""
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from slsdet import hdrParameters
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# default is disabled
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p = hdrParameters()
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assert p.enable == 0
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assert p.opMode == operationMode.SYNCHROTRON
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assert repr(p) == "[disabled]"
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# constructing with operation mode enables it
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p = hdrParameters(operationMode.SYNCHROTRON)
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assert p.enable == 1
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assert p.opMode == operationMode.SYNCHROTRON
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assert repr(p) == "[enabled synchrotron]"
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p = hdrParameters(operationMode.FEL)
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assert p.enable == 1
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assert p.opMode == operationMode.FEL
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assert repr(p) == "[enabled fel]"
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# read write
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p.enable = 0
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assert p.enable == 0
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assert p != hdrParameters(operationMode.FEL)
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p.enable = 1
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p.opMode = operationMode.SYNCHROTRON
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assert p == hdrParameters(operationMode.SYNCHROTRON)
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assert p != hdrParameters()
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# invalid arguments
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with pytest.raises(TypeError):
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hdrParameters(1)
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with pytest.raises(TypeError):
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hdrParameters(operationMode.FEL, 1)
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Log(LogLevel.INFOGREEN, f"✅ Test passed. Struct: hdrParameters")
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@pytest.mark.detectorintegration
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def test_hdr(session_simulator):
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""" Test hdr command."""
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det_type, num_interfaces, num_mods, d = session_simulator
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assert d is not None
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from slsdet import hdrParameters
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if d.type == detectorType.JUNGFRAU:
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prev_val = d.getHDR()
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# invalid arguments (only hdrParameters accepted)
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with pytest.raises(TypeError):
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d.hdr = 0
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with pytest.raises(TypeError):
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d.hdr = operationMode.SYNCHROTRON
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# TODO: test fel once chip version can be checked (only for chip v1.2 HDR)
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d.hdr = hdrParameters(operationMode.SYNCHROTRON)
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assert d.hdr == hdrParameters(operationMode.SYNCHROTRON)
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assert repr(d.hdr) == "[enabled synchrotron]"
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d.hdr = hdrParameters()
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assert d.hdr == hdrParameters()
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assert repr(d.hdr) == "[disabled]"
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# per module
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d.hdr = {0: hdrParameters(operationMode.SYNCHROTRON)}
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assert d.getHDR([0])[0] == hdrParameters(operationMode.SYNCHROTRON)
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if num_mods > 1:
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assert d.getHDR([1])[0] == hdrParameters()
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assert d.hdr == [hdrParameters(operationMode.SYNCHROTRON), hdrParameters()]
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for i in range(len(d)):
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d.setHDR(prev_val[i], [i])
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else:
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with pytest.raises(Exception):
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d.hdr
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with pytest.raises(Exception):
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d.hdr = hdrParameters()
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Log(LogLevel.INFOGREEN, f"✅ Test passed. Command: hdr")
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@@ -463,6 +463,20 @@
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Time before end of exposure when comparator is disabled */
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#define COMP_DSBLE_TIME_REG (0x6C << MEM_MAP_SHIFT)
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/* High Dynamic Range, timeout and activation time tT = T x 25 ns */
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#define HDR_REG (0x6D << MEM_MAP_SHIFT)
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#define HDR_TIMOUT_OFST (0)
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#define HDR_MAX_TIMEOUT_VAL (0xFFFF)
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#define HDR_TIMOUT_MSK (HDR_MAX_TIMEOUT_VAL << HDR_TIMOUT_OFST)
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#define HDR_ACTIVATION_TIME_OFST (16)
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#define HDR_MAX_ACTIVATION_TIME_VAL (0xFF)
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#define HDR_ACTIVATION_TIME_MSK (HDR_MAX_ACTIVATION_TIME_VAL << HDR_ACTIVATION_TIME_OFST)
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#define HDR_MODE_FEL_OFST (24)
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#define HDR_MODE_FEL_MSK (0x00000001 << HDR_MODE_FEL_OFST)
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#define HDR_ENABLE_OFST (31)
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#define HDR_ENABLE_MSK (0x00000001 << HDR_ENABLE_OFST)
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/* Trigger Delay 32 bit register */
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#define SET_TRIGGER_DELAY_LSB_REG (0x70 << MEM_MAP_SHIFT)
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Binary file not shown.
@@ -71,7 +71,6 @@ bool has_filter_resistor = false;
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bool has_filter_cells = false;
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bool has_current_src_normal = false;
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bool has_current_src_64bit_selection = false;
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bool has_current_src_reverse_bits_selection = false;
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bool has_storage_start_in_chip_config = false;
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bool has_step_reduction = false;
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@@ -404,6 +403,8 @@ int setChipIndex(enum CHIPINDEX ind, char *mess) {
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return setChipVersionInFPGA(mess);
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}
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enum CHIPINDEX getChipIndex() { return chipIndex; }
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int validateChipIndex(enum CHIPINDEX ind, char *mess) {
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if (ind >= NUM_CHIP_INDICES) {
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sprintf(mess, "Invalid chip index %d. Options: %s\n", (int)ind,
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@@ -433,7 +434,6 @@ void setChipIndexAllowedFeatures() {
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has_filter_cells = false;
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has_current_src_normal = false;
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has_current_src_64bit_selection = false;
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has_current_src_reverse_bits_selection = false;
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has_storage_start_in_chip_config = false;
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has_step_reduction = false;
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defaultDacValue_G0 = defaultDacList_G0;
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@@ -446,7 +446,6 @@ void setChipIndexAllowedFeatures() {
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has_filter_cells = true;
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has_current_src_normal = true;
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has_current_src_64bit_selection = true;
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has_current_src_reverse_bits_selection = true;
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has_storage_start_in_chip_config = true;
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has_step_reduction = false;
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defaultDacValue_G0 = defaultDacList_G0;
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@@ -461,7 +460,6 @@ void setChipIndexAllowedFeatures() {
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has_filter_cells = false;
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has_current_src_normal = true;
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has_current_src_64bit_selection = true;
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has_current_src_reverse_bits_selection = false;
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has_storage_start_in_chip_config = true;
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has_step_reduction = true;
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defaultDacValue_G0 = defaultDacList_v1_2;
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@@ -1247,6 +1245,8 @@ int setExpTime(int64_t val) {
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}
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set64BitReg(val, SET_EXPTIME_LSB_REG, SET_EXPTIME_MSB_REG);
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updateHDRTimeout();
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// validate for tolerance
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val += ACQ_TIME_MIN_CLOCK;
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int64_t retval = getExpTime();
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@@ -2168,10 +2168,6 @@ bool hasCurrentSource64BitSelectionFeature() {
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return has_current_src_64bit_selection;
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}
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bool hasCurrentSourceReverseBitsSelectionFeature() {
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return has_current_src_reverse_bits_selection;
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}
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bool hasStorageCellStartInChipConfig() {
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return has_storage_start_in_chip_config;
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}
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@@ -2721,23 +2717,9 @@ void enableCurrentSource(int fix, uint64_t select, int normal) {
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// select (64 bits)
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else {
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uint64_t retval = 0;
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// reverse bits select first
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if (hasCurrentSourceReverseBitsSelectionFeature()) {
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uint64_t tmp = select;
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for (int i = 0; i != 64; ++i) {
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// get each bit from LSB side
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uint64_t bit = (tmp >> i) & 0x1;
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// push the bit into MSB side
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retval |= (bit << (63 - i));
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}
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} else {
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retval = select;
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}
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LOG(logINFO, ("\tSetting selection to 0x%lx (inverted from 0x%lx)\n",
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(long unsigned int)retval, (long unsigned int)select));
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set64BitReg(retval, CRRNT_SRC_COL_LSB_REG, CRRNT_SRC_COL_MSB_REG);
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(long unsigned int)select, (long unsigned int)select));
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set64BitReg(select, CRRNT_SRC_COL_LSB_REG, CRRNT_SRC_COL_MSB_REG);
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}
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if (hasCurrentSourceNormalFeature()) {
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@@ -2794,23 +2776,7 @@ uint64_t getSelectCurrentSource() {
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return ((bus_r(DAQ_REG) & DAQ_CRRNT_SRC_CLMN_SLCT_MSK) >>
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DAQ_CRRNT_SRC_CLMN_SLCT_OFST);
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} else {
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// invert the select
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uint64_t regval =
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get64BitReg(CRRNT_SRC_COL_LSB_REG, CRRNT_SRC_COL_MSB_REG);
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uint64_t retval = regval;
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if (hasCurrentSourceReverseBitsSelectionFeature()) {
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uint64_t tmp = regval;
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uint64_t inverted = 0;
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for (int i = 0; i != 64; ++i) {
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// get each bit from LSB side
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uint64_t bit = (tmp >> i) & 0x1;
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// push the bit into MSB side
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inverted |= (bit << (63 - i));
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}
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retval = inverted;
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}
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return retval;
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return get64BitReg(CRRNT_SRC_COL_LSB_REG, CRRNT_SRC_COL_MSB_REG);
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}
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}
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@@ -2953,6 +2919,84 @@ void setElectronCollectionMode(int enable) {
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configureChip();
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}
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void updateHDRTimeout() {
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uint32_t addr = HDR_REG;
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uint32_t regval = bus_r(addr);
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uint64_t expTimeInClks =
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get64BitReg(SET_EXPTIME_LSB_REG, SET_EXPTIME_MSB_REG) +
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ACQ_TIME_MIN_CLOCK;
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bool isFel = (regval & HDR_MODE_FEL_MSK);
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double percentage =
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(isFel ? HDR_FEL_TIMEOUT_PERCENT : HDR_SYNC_TIMEOUT_PERCENT) / 100.0;
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int timeout = expTimeInClks * percentage;
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// cap to max
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if (timeout > HDR_MAX_TIMEOUT_VAL) {
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LOG(logWARNING, ("HDR Timeout (%u clocks) exceeds maximum "
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"value. Capping to %d clocks\n",
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timeout, HDR_MAX_TIMEOUT_VAL));
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timeout = HDR_MAX_TIMEOUT_VAL;
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}
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uint16_t timeoutInClks = (uint16_t)(timeout);
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LOG(logINFO, ("Updating HDR Timeout to %d clocks (%d%% of exptime)\n",
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timeoutInClks, (int)(percentage * 100.00)));
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regval &= ~HDR_TIMOUT_MSK;
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regval |= ((timeoutInClks << HDR_TIMOUT_OFST) & HDR_TIMOUT_MSK);
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bus_w(addr, regval);
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}
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int setHDR(bool enable, enum operationMode mode) {
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LOG(logINFO, ("%s HDR\n", (enable ? "Enabling" : "Disabling")));
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// disable hdr first
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uint32_t addr = HDR_REG;
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uint32_t regval = bus_r(addr);
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bus_w(addr, regval & ~HDR_ENABLE_MSK);
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if (!enable) {
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return OK;
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}
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// mode
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uint16_t actTime = 0;
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switch (mode) {
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case SYNCHROTRON:
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LOG(logINFO, ("\tmode: synchrotron\n"));
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actTime = HDR_SYNC_ACT_TIME_CLK_VAL;
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regval &= ~HDR_MODE_FEL_MSK;
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break;
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case FEL:
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LOG(logINFO, ("\tmode: FEL\n"));
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actTime = HDR_FEL_ACT_TIME_CLK_VAL;
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regval |= HDR_MODE_FEL_MSK;
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break;
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default:
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LOG(logERROR, ("Unknown HDR mode %d\n", mode));
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return FAIL;
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}
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// timeout
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regval &= ~HDR_ACTIVATION_TIME_MSK;
|
||||
regval |= ((actTime << HDR_ACTIVATION_TIME_OFST) & HDR_ACTIVATION_TIME_MSK);
|
||||
bus_w(addr, regval);
|
||||
|
||||
updateHDRTimeout();
|
||||
|
||||
// enable HDR
|
||||
regval = bus_r(addr) | HDR_ENABLE_MSK;
|
||||
bus_w(addr, regval);
|
||||
|
||||
LOG(logDEBUG, ("\tHDR Register: 0x%08x\n", bus_r(addr)));
|
||||
return OK;
|
||||
}
|
||||
|
||||
void getHDR(bool *enable, enum operationMode *mode) {
|
||||
uint32_t addr = HDR_REG;
|
||||
uint32_t regval = bus_r(addr);
|
||||
*enable = (regval & HDR_ENABLE_MSK) ? true : false;
|
||||
*mode = (regval & HDR_MODE_FEL_MSK) ? FEL : SYNCHROTRON;
|
||||
}
|
||||
|
||||
int getTenGigaFlowControl() {
|
||||
return ((bus_r(CONFIG_REG) & CONFIG_ETHRNT_FLW_CNTRL_MSK) >>
|
||||
CONFIG_ETHRNT_FLW_CNTRL_OFST);
|
||||
|
||||
@@ -158,6 +158,11 @@
|
||||
#define ADC_OFST_HALF_SPEED_BOARD2_VAL (0x10)
|
||||
#define ADC_OFST_QUARTER_SPEED_BOARD2_VAL (0x08)
|
||||
|
||||
#define HDR_SYNC_TIMEOUT_PERCENT (8)
|
||||
#define HDR_SYNC_ACT_TIME_CLK_VAL (1) // 25ns
|
||||
#define HDR_FEL_TIMEOUT_PERCENT (0) // undefined
|
||||
#define HDR_FEL_ACT_TIME_CLK_VAL (0) // undefined
|
||||
|
||||
/* Struct Definitions */
|
||||
typedef struct udp_header_struct {
|
||||
uint32_t udp_destmac_msb;
|
||||
|
||||
@@ -102,6 +102,7 @@ int setChipVersionIntFromConfigFile(int val,
|
||||
char *mess); // for backward compatibility
|
||||
int setChipVersionStringFromConfigFile(char *cval, char *mess);
|
||||
int setChipIndex(enum CHIPINDEX ind, char *mess);
|
||||
enum CHIPINDEX getChipIndex();
|
||||
int validateChipIndex(enum CHIPINDEX ind, char *mess);
|
||||
void setChipIndexAllowedFeatures();
|
||||
int setChipVersionInFPGA(char *mess);
|
||||
@@ -560,7 +561,6 @@ bool hasFilterResistorFeature();
|
||||
bool hasFilterCellsFeature();
|
||||
bool hasCurrentSourceNormalFeature();
|
||||
bool hasCurrentSource64BitSelectionFeature();
|
||||
bool hasCurrentSourceReverseBitsSelectionFeature();
|
||||
bool hasStorageCellStartInChipConfig();
|
||||
bool hasStepReductionFeature();
|
||||
bool isChipConfigured();
|
||||
@@ -603,6 +603,9 @@ int setTimingInfoDecoder(enum timingInfoDecoder val);
|
||||
int getTimingInfoDecoder(enum timingInfoDecoder *retval);
|
||||
int getElectronCollectionMode();
|
||||
void setElectronCollectionMode(int enable);
|
||||
void updateHDRTimeout();
|
||||
int setHDR(bool enable, enum operationMode mode);
|
||||
void getHDR(bool *enable, enum operationMode *mode);
|
||||
#endif
|
||||
|
||||
// eiger specific - iodelay, pulse, rate, temp, activate, delay nw parameter
|
||||
|
||||
@@ -338,3 +338,5 @@ int get_collection_mode(int);
|
||||
int set_collection_mode(int);
|
||||
int get_pattern_wait_interval(int);
|
||||
int set_pattern_wait_interval(int);
|
||||
int set_hdr(int);
|
||||
int get_hdr(int);
|
||||
@@ -515,6 +515,8 @@ void function_table() {
|
||||
flist[F_SET_COLLECTION_MODE] = &set_collection_mode;
|
||||
flist[F_GET_PATTERN_WAIT_INTERVAL] = &get_pattern_wait_interval;
|
||||
flist[F_SET_PATTERN_WAIT_INTERVAL] = &set_pattern_wait_interval;
|
||||
flist[F_SET_HDR] = &set_hdr;
|
||||
flist[F_GET_HDR] = &get_hdr;
|
||||
// check
|
||||
if (NUM_DET_FUNCTIONS >= RECEIVER_ENUM_START) {
|
||||
LOG(logERROR, ("The last detector function enum has reached its "
|
||||
@@ -2368,7 +2370,7 @@ int set_num_additional_storage_cells(int file_des) {
|
||||
#else
|
||||
// only set
|
||||
if (Server_VerifyLock() == OK) {
|
||||
if (!hasStorageCellsFeature() || getChipVersionInFPGA() > 11) {
|
||||
if (!hasStorageCellsFeature() || getChipIndex() > v1_1) {
|
||||
ret = FAIL;
|
||||
sprintf(mess, "Cannot set addl. number of storage cells for this "
|
||||
"chip version\n");
|
||||
@@ -11071,3 +11073,68 @@ int set_pattern_wait_interval(int file_des) {
|
||||
#endif
|
||||
return Server_SendResult(file_des, INT64, NULL, 0);
|
||||
}
|
||||
|
||||
int set_hdr(int file_des) {
|
||||
ret = OK;
|
||||
memset(mess, 0, sizeof(mess));
|
||||
int args[2] = {-1, -1};
|
||||
if (receiveData(file_des, args, sizeof(args), INT32) < 0)
|
||||
return printSocketReadError();
|
||||
#ifndef JUNGFRAUD
|
||||
functionNotImplemented();
|
||||
#else
|
||||
|
||||
if (Server_VerifyLock() == OK) {
|
||||
int enable = args[0];
|
||||
enum operationMode mode = args[1];
|
||||
LOG(logDEBUG1, ("Setting HDR: %u %u\n", enable, mode));
|
||||
|
||||
if (enable != 0 && enable != 1) {
|
||||
ret = FAIL;
|
||||
sprintf(mess,
|
||||
"Could not set HDR. Invalid enable argument %d. Options: "
|
||||
"[0, 1]\n",
|
||||
enable);
|
||||
LOG(logERROR, (mess));
|
||||
} else if (mode != SYNCHROTRON && mode != FEL) {
|
||||
ret = FAIL;
|
||||
sprintf(mess,
|
||||
"Could not set HDR. Invalid mode argument %d. Options: "
|
||||
"[SYNCHROTRON, FEL]\n",
|
||||
mode);
|
||||
LOG(logERROR, (mess));
|
||||
} else if (mode == FEL && getChipIndex() != v1_2_HDR) {
|
||||
ret = FAIL;
|
||||
sprintf(mess, "Could not set HDR. FEL mode is only supported for "
|
||||
"chip index v1.2 HDR\n");
|
||||
LOG(logERROR, (mess));
|
||||
} else if (check_detector_idle("set HDR") == OK) {
|
||||
ret = setHDR(enable, mode);
|
||||
if (ret == FAIL) {
|
||||
sprintf(mess, "Could not %s HDR to mode: %d\n",
|
||||
enable ? "enable" : "disable", args[1]);
|
||||
LOG(logERROR, (mess));
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
return Server_SendResult(file_des, INT32, NULL, 0);
|
||||
}
|
||||
|
||||
int get_hdr(int file_des) {
|
||||
ret = OK;
|
||||
memset(mess, 0, sizeof(mess));
|
||||
int retvals[2] = {-1, -1};
|
||||
LOG(logDEBUG1, ("Getting HDR\n"));
|
||||
|
||||
#ifndef JUNGFRAUD
|
||||
functionNotImplemented();
|
||||
#else
|
||||
bool enable = false;
|
||||
enum operationMode mode = SYNCHROTRON;
|
||||
getHDR(&enable, &mode);
|
||||
retvals[0] = enable;
|
||||
retvals[1] = mode;
|
||||
#endif
|
||||
return Server_SendResult(file_des, INT32, retvals, sizeof(retvals));
|
||||
}
|
||||
@@ -80,7 +80,7 @@ _sd() {
|
||||
local IS_PATH=0
|
||||
|
||||
|
||||
local SLS_COMMANDS=" acquire activate adcclk adcenable adcenable10g adcindex adcinvert adclist adcname adcphase adcpipeline adcreg adcvpp apulse asamples autocompdisable badchannels blockingtrigger burstmode burstperiod bursts burstsl bustest cdsgain chipversion clearbit clearbusy clientversion clkdiv clkfreq clkphase collectionmode column compdisabletime confadc config configtransceiver counters currentsource dac dacindex daclist dacname dacvalues datastream dbitclk dbitphase dbitpipeline defaultdac defaultpattern define_bit define_reg definelist_bit definelist_reg delay delayl detectorserverversion detsize diodelay dpulse dr drlist dsamples execcommand exptime exptime1 exptime2 exptime3 extrastoragecells extsampling extsamplingsrc extsig fformat filtercells filterresistor findex firmwaretest firmwareversion fliprows flowcontrol10g fmaster fname foverwrite fpath framecounter frames framesl frametime free fwrite gaincaps gainmode gappixels gatedelay gatedelay1 gatedelay2 gatedelay3 gates getbit hardwareversion highvoltage hostname im_a im_b im_c im_d im_io imagetest include initialchecks inj_ch interpolation interruptsubframe kernelversion lastclient led lock master maxadcphaseshift maxclkphaseshift maxdbitphaseshift measuredperiod measuredsubperiod moduleid nextframenumber nmod numinterfaces overflow packageversion parallel parameters partialreset patfname patioctrl patlimits patloop patloop0 patloop1 patloop2 patmask patnloop patnloop0 patnloop1 patnloop2 patsetbit pattern patternstart patwait patwait0 patwait1 patwait2 patwaittime patwaittime0 patwaittime1 patwaittime2 patword pedestalmode period periodl polarity port powerchip powerindex powerlist powername powervalues programfpga pulse pulsechip pulsenmove pumpprobe quad ratecorr readnrows readout readoutspeed readoutspeedlist rebootcontroller reg resetdacs resetfpga romode row runclk runtime rx_arping rx_clearroi rx_dbitlist rx_dbitoffset rx_dbitreorder rx_discardpolicy rx_fifodepth rx_frameindex rx_framescaught rx_framesperfile rx_hostname rx_jsonaddheader rx_jsonpara rx_lastclient rx_lock rx_missingpackets rx_padding rx_printconfig rx_realudpsocksize rx_roi rx_silent rx_start rx_status rx_stop rx_tcpport rx_threads rx_udpsocksize rx_version rx_zmqfreq rx_zmqhwm rx_zmqip rx_zmqport rx_zmqstartfnum rx_zmqstream samples savepattern scan scanerrmsg selinterface serialnumber setbit settings settingslist settingspath signalindex signallist signalname sleep slowadc slowadcindex slowadclist slowadcname slowadcvalues start status stop stopport storagecell_delay storagecell_start subdeadtime subexptime sync syncclk temp_10ge temp_adc temp_control temp_dcdc temp_event temp_fpga temp_fpgaext temp_fpgafl temp_fpgafr temp_slowadc temp_sodl temp_sodr temp_threshold templist tempvalues tengiga threshold thresholdnotb timing timing_info_decoder timinglist timingsource top transceiverenable trigger triggers triggersl trimbits trimen trimval tsamples txdelay txdelay_frame txdelay_left txdelay_right type udp_cleardst udp_dstip udp_dstip2 udp_dstlist udp_dstmac udp_dstmac2 udp_dstport udp_dstport2 udp_firstdst udp_numdst udp_reconfigure udp_srcip udp_srcip2 udp_srcmac udp_srcmac2 udp_validate update updatedetectorserver updatekernel updatemode user v_a v_b v_c v_chip v_d v_io v_limit vchip_comp_adc vchip_comp_fe vchip_cs vchip_opa_1st vchip_opa_fd vchip_ref_comp_fe versions veto vetoalg vetofile vetophoton vetoref vetostream virtual vm_a vm_b vm_c vm_d vm_io zmqhwm zmqip zmqport "
|
||||
local SLS_COMMANDS=" acquire activate adcclk adcenable adcenable10g adcindex adcinvert adclist adcname adcphase adcpipeline adcreg adcvpp apulse asamples autocompdisable badchannels blockingtrigger burstmode burstperiod bursts burstsl bustest cdsgain chipversion clearbit clearbusy clientversion clkdiv clkfreq clkphase collectionmode column compdisabletime confadc config configtransceiver counters currentsource dac dacindex daclist dacname dacvalues datastream dbitclk dbitphase dbitpipeline defaultdac defaultpattern delay delayl detectorserverversion detsize diodelay dpulse dr drlist dsamples execcommand exptime exptime1 exptime2 exptime3 extrastoragecells extsampling extsamplingsrc extsig fformat filtercells filterresistor findex firmwaretest firmwareversion fliprows flowcontrol10g fmaster fname foverwrite fpath framecounter frames framesl frametime free fwrite gaincaps gainmode gappixels gatedelay gatedelay1 gatedelay2 gatedelay3 gates getbit hardwareversion hdr highvoltage hostname im_a im_b im_c im_d im_io imagetest include initialchecks inj_ch interpolation interruptsubframe kernelversion lastclient led lock master maxadcphaseshift maxclkphaseshift maxdbitphaseshift measuredperiod measuredsubperiod moduleid nextframenumber nmod numinterfaces overflow packageversion parallel parameters partialreset patfname patioctrl patlimits patloop patloop0 patloop1 patloop2 patmask patnloop patnloop0 patnloop1 patnloop2 patsetbit pattern patternstart patwait patwait0 patwait1 patwait2 patwaittime patwaittime0 patwaittime1 patwaittime2 patword pedestalmode period periodl polarity port powerchip powerindex powerlist powername powervalues programfpga pulse pulsechip pulsenmove pumpprobe quad ratecorr readnrows readout readoutspeed readoutspeedlist rebootcontroller reg resetdacs resetfpga romode row runclk runtime rx_arping rx_clearroi rx_dbitlist rx_dbitoffset rx_dbitreorder rx_discardpolicy rx_fifodepth rx_frameindex rx_framescaught rx_framesperfile rx_hostname rx_jsonaddheader rx_jsonpara rx_lastclient rx_lock rx_missingpackets rx_padding rx_printconfig rx_realudpsocksize rx_roi rx_silent rx_start rx_status rx_stop rx_streamdummyheader rx_tcpport rx_threads rx_udpsocksize rx_version rx_zmqfreq rx_zmqhwm rx_zmqip rx_zmqport rx_zmqstartfnum rx_zmqstream samples savepattern scan scanerrmsg selinterface serialnumber setbit settings settingslist settingspath signalindex signallist signalname sleep slowadc slowadcindex slowadclist slowadcname slowadcvalues start status stop stopport storagecell_delay storagecell_start subdeadtime subexptime sync syncclk temp_10ge temp_adc temp_control temp_dcdc temp_event temp_fpga temp_fpgaext temp_fpgafl temp_fpgafr temp_slowadc temp_sodl temp_sodr temp_threshold templist tempvalues tengiga threshold thresholdnotb timing timing_info_decoder timinglist timingsource top transceiverenable trigger triggers triggersl trimbits trimen trimval tsamples txdelay txdelay_frame txdelay_left txdelay_right type udp_cleardst udp_dstip udp_dstip2 udp_dstlist udp_dstmac udp_dstmac2 udp_dstport udp_dstport2 udp_firstdst udp_numdst udp_reconfigure udp_srcip udp_srcip2 udp_srcmac udp_srcmac2 udp_validate update updatedetectorserver updatekernel updatemode user v_a v_b v_c v_chip v_d v_io v_limit vchip_comp_adc vchip_comp_fe vchip_cs vchip_opa_1st vchip_opa_fd vchip_ref_comp_fe versions veto vetoalg vetofile vetophoton vetoref vetostream virtual vm_a vm_b vm_c vm_d vm_io zmqhwm zmqip zmqport "
|
||||
__acquire() {
|
||||
FCN_RETURN=""
|
||||
return 0
|
||||
@@ -1172,6 +1172,15 @@ __hardwareversion() {
|
||||
FCN_RETURN=""
|
||||
return 0
|
||||
}
|
||||
__hdr() {
|
||||
FCN_RETURN=""
|
||||
if [[ ${IS_GET} -eq 0 ]]; then
|
||||
if [[ "${cword}" == "2" ]]; then
|
||||
FCN_RETURN="fel synchrotron"
|
||||
fi
|
||||
fi
|
||||
return 0
|
||||
}
|
||||
__highvoltage() {
|
||||
FCN_RETURN=""
|
||||
if [[ ${IS_GET} -eq 0 ]]; then
|
||||
|
||||
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
@@ -4,7 +4,7 @@
|
||||
_sd() {
|
||||
|
||||
|
||||
local SLS_COMMANDS=" acquire activate adcclk adcenable adcenable10g adcindex adcinvert adclist adcname adcphase adcpipeline adcreg adcvpp apulse asamples autocompdisable badchannels blockingtrigger burstmode burstperiod bursts burstsl bustest cdsgain chipversion clearbit clearbusy clientversion clkdiv clkfreq clkphase collectionmode column compdisabletime confadc config configtransceiver counters currentsource dac dacindex daclist dacname dacvalues datastream dbitclk dbitphase dbitpipeline defaultdac defaultpattern define_bit define_reg definelist_bit definelist_reg delay delayl detectorserverversion detsize diodelay dpulse dr drlist dsamples execcommand exptime exptime1 exptime2 exptime3 extrastoragecells extsampling extsamplingsrc extsig fformat filtercells filterresistor findex firmwaretest firmwareversion fliprows flowcontrol10g fmaster fname foverwrite fpath framecounter frames framesl frametime free fwrite gaincaps gainmode gappixels gatedelay gatedelay1 gatedelay2 gatedelay3 gates getbit hardwareversion highvoltage hostname im_a im_b im_c im_d im_io imagetest include initialchecks inj_ch interpolation interruptsubframe kernelversion lastclient led lock master maxadcphaseshift maxclkphaseshift maxdbitphaseshift measuredperiod measuredsubperiod moduleid nextframenumber nmod numinterfaces overflow packageversion parallel parameters partialreset patfname patioctrl patlimits patloop patloop0 patloop1 patloop2 patmask patnloop patnloop0 patnloop1 patnloop2 patsetbit pattern patternstart patwait patwait0 patwait1 patwait2 patwaittime patwaittime0 patwaittime1 patwaittime2 patword pedestalmode period periodl polarity port powerchip powerindex powerlist powername powervalues programfpga pulse pulsechip pulsenmove pumpprobe quad ratecorr readnrows readout readoutspeed readoutspeedlist rebootcontroller reg resetdacs resetfpga romode row runclk runtime rx_arping rx_clearroi rx_dbitlist rx_dbitoffset rx_dbitreorder rx_discardpolicy rx_fifodepth rx_frameindex rx_framescaught rx_framesperfile rx_hostname rx_jsonaddheader rx_jsonpara rx_lastclient rx_lock rx_missingpackets rx_padding rx_printconfig rx_realudpsocksize rx_roi rx_silent rx_start rx_status rx_stop rx_tcpport rx_threads rx_udpsocksize rx_version rx_zmqfreq rx_zmqhwm rx_zmqip rx_zmqport rx_zmqstartfnum rx_zmqstream samples savepattern scan scanerrmsg selinterface serialnumber setbit settings settingslist settingspath signalindex signallist signalname sleep slowadc slowadcindex slowadclist slowadcname slowadcvalues start status stop stopport storagecell_delay storagecell_start subdeadtime subexptime sync syncclk temp_10ge temp_adc temp_control temp_dcdc temp_event temp_fpga temp_fpgaext temp_fpgafl temp_fpgafr temp_slowadc temp_sodl temp_sodr temp_threshold templist tempvalues tengiga threshold thresholdnotb timing timing_info_decoder timinglist timingsource top transceiverenable trigger triggers triggersl trimbits trimen trimval tsamples txdelay txdelay_frame txdelay_left txdelay_right type udp_cleardst udp_dstip udp_dstip2 udp_dstlist udp_dstmac udp_dstmac2 udp_dstport udp_dstport2 udp_firstdst udp_numdst udp_reconfigure udp_srcip udp_srcip2 udp_srcmac udp_srcmac2 udp_validate update updatedetectorserver updatekernel updatemode user v_a v_b v_c v_chip v_d v_io v_limit vchip_comp_adc vchip_comp_fe vchip_cs vchip_opa_1st vchip_opa_fd vchip_ref_comp_fe versions veto vetoalg vetofile vetophoton vetoref vetostream virtual vm_a vm_b vm_c vm_d vm_io zmqhwm zmqip zmqport "
|
||||
local SLS_COMMANDS=" acquire activate adcclk adcenable adcenable10g adcindex adcinvert adclist adcname adcphase adcpipeline adcreg adcvpp apulse asamples autocompdisable badchannels blockingtrigger burstmode burstperiod bursts burstsl bustest cdsgain chipversion clearbit clearbusy clientversion clkdiv clkfreq clkphase collectionmode column compdisabletime confadc config configtransceiver counters currentsource dac dacindex daclist dacname dacvalues datastream dbitclk dbitphase dbitpipeline defaultdac defaultpattern delay delayl detectorserverversion detsize diodelay dpulse dr drlist dsamples execcommand exptime exptime1 exptime2 exptime3 extrastoragecells extsampling extsamplingsrc extsig fformat filtercells filterresistor findex firmwaretest firmwareversion fliprows flowcontrol10g fmaster fname foverwrite fpath framecounter frames framesl frametime free fwrite gaincaps gainmode gappixels gatedelay gatedelay1 gatedelay2 gatedelay3 gates getbit hardwareversion hdr highvoltage hostname im_a im_b im_c im_d im_io imagetest include initialchecks inj_ch interpolation interruptsubframe kernelversion lastclient led lock master maxadcphaseshift maxclkphaseshift maxdbitphaseshift measuredperiod measuredsubperiod moduleid nextframenumber nmod numinterfaces overflow packageversion parallel parameters partialreset patfname patioctrl patlimits patloop patloop0 patloop1 patloop2 patmask patnloop patnloop0 patnloop1 patnloop2 patsetbit pattern patternstart patwait patwait0 patwait1 patwait2 patwaittime patwaittime0 patwaittime1 patwaittime2 patword pedestalmode period periodl polarity port powerchip powerindex powerlist powername powervalues programfpga pulse pulsechip pulsenmove pumpprobe quad ratecorr readnrows readout readoutspeed readoutspeedlist rebootcontroller reg resetdacs resetfpga romode row runclk runtime rx_arping rx_clearroi rx_dbitlist rx_dbitoffset rx_dbitreorder rx_discardpolicy rx_fifodepth rx_frameindex rx_framescaught rx_framesperfile rx_hostname rx_jsonaddheader rx_jsonpara rx_lastclient rx_lock rx_missingpackets rx_padding rx_printconfig rx_realudpsocksize rx_roi rx_silent rx_start rx_status rx_stop rx_streamdummyheader rx_tcpport rx_threads rx_udpsocksize rx_version rx_zmqfreq rx_zmqhwm rx_zmqip rx_zmqport rx_zmqstartfnum rx_zmqstream samples savepattern scan scanerrmsg selinterface serialnumber setbit settings settingslist settingspath signalindex signallist signalname sleep slowadc slowadcindex slowadclist slowadcname slowadcvalues start status stop stopport storagecell_delay storagecell_start subdeadtime subexptime sync syncclk temp_10ge temp_adc temp_control temp_dcdc temp_event temp_fpga temp_fpgaext temp_fpgafl temp_fpgafr temp_slowadc temp_sodl temp_sodr temp_threshold templist tempvalues tengiga threshold thresholdnotb timing timing_info_decoder timinglist timingsource top transceiverenable trigger triggers triggersl trimbits trimen trimval tsamples txdelay txdelay_frame txdelay_left txdelay_right type udp_cleardst udp_dstip udp_dstip2 udp_dstlist udp_dstmac udp_dstmac2 udp_dstport udp_dstport2 udp_firstdst udp_numdst udp_reconfigure udp_srcip udp_srcip2 udp_srcmac udp_srcmac2 udp_validate update updatedetectorserver updatekernel updatemode user v_a v_b v_c v_chip v_d v_io v_limit vchip_comp_adc vchip_comp_fe vchip_cs vchip_opa_1st vchip_opa_fd vchip_ref_comp_fe versions veto vetoalg vetofile vetophoton vetoref vetostream virtual vm_a vm_b vm_c vm_d vm_io zmqhwm zmqip zmqport "
|
||||
__acquire() {
|
||||
FCN_RETURN=""
|
||||
return 0
|
||||
@@ -1096,6 +1096,15 @@ __hardwareversion() {
|
||||
FCN_RETURN=""
|
||||
return 0
|
||||
}
|
||||
__hdr() {
|
||||
FCN_RETURN=""
|
||||
if [[ ${IS_GET} -eq 0 ]]; then
|
||||
if [[ "${cword}" == "2" ]]; then
|
||||
FCN_RETURN="fel synchrotron"
|
||||
fi
|
||||
fi
|
||||
return 0
|
||||
}
|
||||
__highvoltage() {
|
||||
FCN_RETURN=""
|
||||
if [[ ${IS_GET} -eq 0 ]]; then
|
||||
|
||||
@@ -2775,6 +2775,17 @@ sleep:
|
||||
- argc: 2
|
||||
arg_types: [ int, special::time_unit ]
|
||||
|
||||
hdr:
|
||||
is_description: true
|
||||
actions:
|
||||
GET:
|
||||
argc: 0
|
||||
PUT:
|
||||
args:
|
||||
- argc: 1
|
||||
arg_types: [ defs::operationMode ]
|
||||
- argc: 1
|
||||
arg_types: [ int ]
|
||||
|
||||
################# special commands ##########################
|
||||
|
||||
@@ -3419,6 +3430,7 @@ scan:
|
||||
input: [ "defs::scanParameters(StringTo<defs::dacIndex>(args[0]), StringTo<int>(args[1]), StringTo<int>(args[2]), StringTo<int>(args[3]), t)" ]
|
||||
input_types: [ auto ]
|
||||
|
||||
|
||||
Trigger:
|
||||
template: true
|
||||
actions:
|
||||
|
||||
@@ -1087,7 +1087,7 @@ chipversion:
|
||||
store_result_in_t: true
|
||||
command_name: chipversion
|
||||
function_alias: chipversion
|
||||
help: "\n\t[Jungfrau] Returns chip version. Can be 1.0 or 1.1"
|
||||
help: "\n\t[Jungfrau] Returns chip version. Can be 1.0, 1.1 or 1.2"
|
||||
infer_action: true
|
||||
template: true
|
||||
clearbit:
|
||||
@@ -4752,6 +4752,52 @@ hardwareversion:
|
||||
\ on detector."
|
||||
infer_action: true
|
||||
template: true
|
||||
hdr:
|
||||
actions:
|
||||
GET:
|
||||
args:
|
||||
- arg_types: []
|
||||
argc: 0
|
||||
cast_input: []
|
||||
check_det_id: false
|
||||
convert_det_id: true
|
||||
function: ''
|
||||
input: []
|
||||
input_types: []
|
||||
output: []
|
||||
require_det_id: false
|
||||
store_result_in_t: true
|
||||
PUT:
|
||||
args:
|
||||
- arg_types:
|
||||
- defs::operationMode
|
||||
argc: 1
|
||||
cast_input: []
|
||||
check_det_id: false
|
||||
convert_det_id: true
|
||||
function: ''
|
||||
input: []
|
||||
input_types: []
|
||||
output: []
|
||||
require_det_id: false
|
||||
store_result_in_t: false
|
||||
- arg_types:
|
||||
- int
|
||||
argc: 1
|
||||
cast_input: []
|
||||
check_det_id: false
|
||||
convert_det_id: true
|
||||
function: ''
|
||||
input: []
|
||||
input_types: []
|
||||
output: []
|
||||
require_det_id: false
|
||||
store_result_in_t: false
|
||||
command_name: hdr
|
||||
function_alias: hdr
|
||||
help: ''
|
||||
infer_action: true
|
||||
is_description: true
|
||||
highvoltage:
|
||||
actions:
|
||||
GET:
|
||||
|
||||
@@ -9,7 +9,7 @@ If any changes to enums in slsDetectorDefs
|
||||
```sh
|
||||
# to generate the dump.json file
|
||||
cd slsSupportLib/src
|
||||
clang++ -Xclang -ast-dump=json -Xclang -ast-dump-filter -Xclang StringTo -c ToString.cpp -I ../include/ -std=gnu++11 > ../../slsDetectorSoftware/generator/autocomplete/dump.json
|
||||
clang++ -Xclang -ast-dump=json -Xclang -ast-dump-filter -Xclang StringTo -c ToString.cpp -I ../include/ -std=gnu++17 > ../../slsDetectorSoftware/generator/autocomplete/dump.json
|
||||
cd ../../slsDetectorSoftware/generator/autocomplete
|
||||
python autocomplete.py -f
|
||||
```
|
||||
|
||||
@@ -1402,6 +1402,13 @@ class Detector {
|
||||
/** [Jungfrau] */
|
||||
void setCollectionMode(defs::collectionMode value, Positions pos = {});
|
||||
|
||||
/** [Jungfrau] */
|
||||
Result<defs::hdrParameters> getHDR(Positions pos = {}) const;
|
||||
|
||||
/** [Jungfrau] Enabling with FEL mode can only be used with chip version
|
||||
* '1.2 HDR'*/
|
||||
void setHDR(const defs::hdrParameters par, Positions pos = {});
|
||||
|
||||
///@}
|
||||
|
||||
/** @name Gotthard2 Specific */
|
||||
|
||||
@@ -1419,7 +1419,7 @@ std::string Caller::chipversion(int action) {
|
||||
// print help
|
||||
if (action == slsDetectorDefs::HELP_ACTION) {
|
||||
os << R"V0G0N(
|
||||
[Jungfrau] Returns chip version. Can be 1.0 or 1.1 )V0G0N"
|
||||
[Jungfrau] Returns chip version. Can be 1.0, 1.1 or 1.2 )V0G0N"
|
||||
<< std::endl;
|
||||
return os.str();
|
||||
}
|
||||
|
||||
@@ -153,6 +153,7 @@ class Caller {
|
||||
std::string gates(int action);
|
||||
std::string getbit(int action);
|
||||
std::string hardwareversion(int action);
|
||||
std::string hdr(int action);
|
||||
std::string highvoltage(int action);
|
||||
std::string hostname(int action);
|
||||
std::string im_a(int action);
|
||||
@@ -499,6 +500,7 @@ class Caller {
|
||||
{"gates", &Caller::gates},
|
||||
{"getbit", &Caller::getbit},
|
||||
{"hardwareversion", &Caller::hardwareversion},
|
||||
{"hdr", &Caller::hdr},
|
||||
{"highvoltage", &Caller::highvoltage},
|
||||
{"hostname", &Caller::hostname},
|
||||
{"im_a", &Caller::im_a},
|
||||
|
||||
@@ -1404,6 +1404,7 @@ std::string Caller::gaincaps(int action) {
|
||||
}
|
||||
return os.str();
|
||||
}
|
||||
|
||||
std::string Caller::sleep(int action) {
|
||||
std::ostringstream os;
|
||||
if (action == defs::HELP_ACTION) {
|
||||
@@ -1437,4 +1438,44 @@ std::string Caller::sleep(int action) {
|
||||
return os.str();
|
||||
}
|
||||
|
||||
std::string Caller::hdr(int action) {
|
||||
std::ostringstream os;
|
||||
if (action == defs::HELP_ACTION) {
|
||||
os << "synchrotron|fel|0]\n\t[Jungfrau] Enables the high dynamic range "
|
||||
"in detector in synchrotron or fel mode. 0 disables HDR and is "
|
||||
"the default. FEL can only be used with chip version '1.2 HDR'."
|
||||
<< '\n';
|
||||
} else if (action == defs::GET_ACTION) {
|
||||
if (args.size() != 0) {
|
||||
WrongNumberOfParameters(0);
|
||||
}
|
||||
auto t = det->getHDR(std::vector<int>{det_id});
|
||||
os << OutString(t) << '\n';
|
||||
} else if (action == defs::PUT_ACTION) {
|
||||
if (args.size() != 1) {
|
||||
WrongNumberOfParameters(1);
|
||||
}
|
||||
if (sls::is_int(args[0])) {
|
||||
auto val = StringTo<int>(args[0]);
|
||||
if (val == 0) {
|
||||
auto disable = defs::hdrParameters();
|
||||
det->setHDR(disable, std::vector<int>{det_id});
|
||||
os << ToString(disable) << '\n';
|
||||
} else {
|
||||
throw RuntimeError("Did you mean to disable HDR? Then Please "
|
||||
"use '0' to do so. Unknown argument: " +
|
||||
args[0]);
|
||||
}
|
||||
} else {
|
||||
auto mode = StringTo<defs::operationMode>(args[0]);
|
||||
auto val = defs::hdrParameters(mode);
|
||||
det->setHDR(val, std::vector<int>{det_id});
|
||||
os << ToString(val) << '\n';
|
||||
}
|
||||
} else {
|
||||
throw RuntimeError("Unknown action");
|
||||
}
|
||||
return os.str();
|
||||
}
|
||||
|
||||
} // namespace sls
|
||||
@@ -1907,6 +1907,14 @@ void Detector::setCollectionMode(defs::collectionMode value, Positions pos) {
|
||||
pimpl->Parallel(&Module::setCollectionMode, pos, value);
|
||||
}
|
||||
|
||||
Result<defs::hdrParameters> Detector::getHDR(Positions pos) const {
|
||||
return pimpl->Parallel(&Module::getHDR, pos);
|
||||
}
|
||||
|
||||
void Detector::setHDR(const defs::hdrParameters par, Positions pos) {
|
||||
pimpl->Parallel(&Module::setHDR, pos, par);
|
||||
}
|
||||
|
||||
// Gotthard2 Specific
|
||||
|
||||
Result<int64_t> Detector::getNumberOfBursts(Positions pos) const {
|
||||
|
||||
@@ -2053,6 +2053,14 @@ void Module::setCollectionMode(const defs::collectionMode value) {
|
||||
sendToDetector(F_SET_COLLECTION_MODE, static_cast<int>(value), nullptr);
|
||||
}
|
||||
|
||||
defs::hdrParameters Module::getHDR() const {
|
||||
return sendToDetector<defs::hdrParameters>(F_GET_HDR);
|
||||
}
|
||||
|
||||
void Module::setHDR(const defs::hdrParameters par) {
|
||||
sendToDetector(F_SET_HDR, par, nullptr);
|
||||
}
|
||||
|
||||
// Gotthard2 Specific
|
||||
|
||||
int64_t Module::getNumberOfBursts() const {
|
||||
|
||||
@@ -417,6 +417,8 @@ class Module : public virtual slsDetectorDefs {
|
||||
void setTimingInfoDecoder(const defs::timingInfoDecoder enable);
|
||||
defs::collectionMode getCollectionMode() const;
|
||||
void setCollectionMode(const defs::collectionMode enable);
|
||||
defs::hdrParameters getHDR() const;
|
||||
void setHDR(const defs::hdrParameters par);
|
||||
|
||||
/**************************************************
|
||||
* *
|
||||
|
||||
@@ -1520,6 +1520,22 @@ int InferAction::hardwareversion() {
|
||||
}
|
||||
}
|
||||
|
||||
int InferAction::hdr() {
|
||||
|
||||
if (args.size() == 0) {
|
||||
return slsDetectorDefs::GET_ACTION;
|
||||
}
|
||||
|
||||
if (args.size() == 1) {
|
||||
return slsDetectorDefs::PUT_ACTION;
|
||||
}
|
||||
|
||||
else {
|
||||
|
||||
throw RuntimeError("Could not infer action: Wrong number of arguments");
|
||||
}
|
||||
}
|
||||
|
||||
int InferAction::highvoltage() {
|
||||
|
||||
if (args.size() == 0) {
|
||||
|
||||
@@ -108,6 +108,7 @@ class InferAction {
|
||||
int gates();
|
||||
int getbit();
|
||||
int hardwareversion();
|
||||
int hdr();
|
||||
int highvoltage();
|
||||
int hostname();
|
||||
int im_a();
|
||||
@@ -442,6 +443,7 @@ class InferAction {
|
||||
{"gates", &InferAction::gates},
|
||||
{"getbit", &InferAction::getbit},
|
||||
{"hardwareversion", &InferAction::hardwareversion},
|
||||
{"hdr", &InferAction::hdr},
|
||||
{"highvoltage", &InferAction::highvoltage},
|
||||
{"hostname", &InferAction::hostname},
|
||||
{"im_a", &InferAction::im_a},
|
||||
|
||||
@@ -791,4 +791,45 @@ TEST_CASE("sync", "[.detectorintegration]") {
|
||||
}
|
||||
}
|
||||
|
||||
TEST_CASE("hdr", "[.detectorintegration]") {
|
||||
Detector det;
|
||||
Caller caller(&det);
|
||||
auto det_type = det.getDetectorType().squash();
|
||||
if (det_type == defs::JUNGFRAU) {
|
||||
// disable and args
|
||||
REQUIRE_THROWS(caller.call("hdr", {"0", "synchrotron"}, -1, PUT));
|
||||
// invalid enable
|
||||
REQUIRE_THROWS(caller.call("hdr", {"2"}, -1, PUT));
|
||||
// no operation mode
|
||||
REQUIRE_THROWS(caller.call("hdr", {"1"}, -1, PUT));
|
||||
// invalid operation mode
|
||||
REQUIRE_THROWS(caller.call("hdr", {"invalid"}, -1, PUT));
|
||||
// TODO: implement get chip type to get hdr, throw if !hdr and trying
|
||||
// fel for oper mode and not throw if hdr
|
||||
{
|
||||
std::ostringstream oss;
|
||||
REQUIRE_NOTHROW(caller.call("hdr", {"synchrotron"}, -1, PUT, oss));
|
||||
REQUIRE(oss.str() == "hdr [enabled synchrotron]\n");
|
||||
}
|
||||
{
|
||||
std::ostringstream oss;
|
||||
REQUIRE_NOTHROW(caller.call("hdr", {}, -1, GET, oss));
|
||||
REQUIRE(oss.str() == "hdr [enabled synchrotron]\n");
|
||||
}
|
||||
{
|
||||
std::ostringstream oss;
|
||||
REQUIRE_NOTHROW(caller.call("hdr", {"0"}, -1, PUT, oss));
|
||||
REQUIRE(oss.str() == "hdr [disabled]\n");
|
||||
}
|
||||
{
|
||||
std::ostringstream oss;
|
||||
REQUIRE_NOTHROW(caller.call("hdr", {}, -1, GET, oss));
|
||||
REQUIRE(oss.str() == "hdr [disabled]\n");
|
||||
}
|
||||
} else {
|
||||
REQUIRE_THROWS(caller.call("hdr", {}, -1, GET));
|
||||
REQUIRE_THROWS(caller.call("hdr", {"0"}, -1, PUT));
|
||||
}
|
||||
}
|
||||
|
||||
} // namespace sls
|
||||
@@ -46,6 +46,7 @@ std::string ToString(const defs::gainMode s);
|
||||
std::string ToString(const defs::polarity s);
|
||||
std::string ToString(const defs::timingInfoDecoder s);
|
||||
std::string ToString(const defs::collectionMode s);
|
||||
std::string ToString(const defs::operationMode s);
|
||||
|
||||
std::string ToString(bool value);
|
||||
|
||||
@@ -59,6 +60,9 @@ std::ostream &operator<<(std::ostream &os,
|
||||
std::string ToString(const slsDetectorDefs::scanParameters &r);
|
||||
std::ostream &operator<<(std::ostream &os,
|
||||
const slsDetectorDefs::scanParameters &r);
|
||||
std::string ToString(const slsDetectorDefs::hdrParameters &r);
|
||||
std::ostream &operator<<(std::ostream &os,
|
||||
const slsDetectorDefs::hdrParameters &r);
|
||||
std::string ToString(const slsDetectorDefs::currentSrcParameters &r);
|
||||
std::ostream &operator<<(std::ostream &os,
|
||||
const slsDetectorDefs::currentSrcParameters &r);
|
||||
@@ -324,6 +328,7 @@ template <> defs::gainMode StringTo(const std::string &s);
|
||||
template <> defs::polarity StringTo(const std::string &s);
|
||||
template <> defs::timingInfoDecoder StringTo(const std::string &s);
|
||||
template <> defs::collectionMode StringTo(const std::string &s);
|
||||
template <> defs::operationMode StringTo(const std::string &s);
|
||||
|
||||
template <> uint8_t StringTo(const std::string &s);
|
||||
template <> uint16_t StringTo(const std::string &s);
|
||||
|
||||
@@ -527,6 +527,7 @@ enum streamingInterface {
|
||||
enum polarity { POSITIVE, NEGATIVE };
|
||||
enum timingInfoDecoder { SWISSFEL, SHINE };
|
||||
enum collectionMode { HOLE, ELECTRON };
|
||||
enum operationMode { SYNCHROTRON, FEL };
|
||||
|
||||
#ifdef __cplusplus
|
||||
|
||||
@@ -560,6 +561,23 @@ enum streamingInterface {
|
||||
}
|
||||
} __attribute__((packed));
|
||||
|
||||
/** hdr structure */
|
||||
struct hdrParameters {
|
||||
int enable;
|
||||
operationMode opMode;
|
||||
|
||||
/** disable hdr mode */
|
||||
hdrParameters() : enable(0), opMode(SYNCHROTRON) {}
|
||||
/** enable hdr mode */
|
||||
hdrParameters(operationMode mode) : enable(1), opMode(mode) {}
|
||||
constexpr bool operator==(const hdrParameters &other) const {
|
||||
return ((enable == other.enable) && (opMode == other.opMode));
|
||||
}
|
||||
} __attribute__((packed));
|
||||
|
||||
static_assert(sizeof(hdrParameters) == 2 * sizeof(int),
|
||||
"hdrParameters TCP layout must remain two INT32 values");
|
||||
|
||||
struct currentSrcParameters {
|
||||
int enable;
|
||||
int fix;
|
||||
|
||||
@@ -299,6 +299,8 @@ enum detFuncs {
|
||||
F_SET_COLLECTION_MODE,
|
||||
F_GET_PATTERN_WAIT_INTERVAL,
|
||||
F_SET_PATTERN_WAIT_INTERVAL,
|
||||
F_SET_HDR,
|
||||
F_GET_HDR,
|
||||
|
||||
NUM_DET_FUNCTIONS,
|
||||
RECEIVER_ENUM_START = 512, /**< detector function should not exceed this
|
||||
@@ -709,11 +711,12 @@ const char* getFunctionNameFromEnum(enum detFuncs func) {
|
||||
case F_SET_COLLECTION_MODE: return "F_SET_COLLECTION_MODE";
|
||||
case F_GET_PATTERN_WAIT_INTERVAL: return "F_GET_PATTERN_WAIT_INTERVAL";
|
||||
case F_SET_PATTERN_WAIT_INTERVAL: return "F_SET_PATTERN_WAIT_INTERVAL";
|
||||
case F_SET_HDR: return "F_SET_HDR";
|
||||
case F_GET_HDR: return "F_GET_HDR";
|
||||
|
||||
case NUM_DET_FUNCTIONS: return "NUM_DET_FUNCTIONS";
|
||||
case RECEIVER_ENUM_START: return "RECEIVER_ENUM_START";
|
||||
|
||||
|
||||
case F_EXEC_RECEIVER_COMMAND: return "F_EXEC_RECEIVER_COMMAND";
|
||||
case F_LOCK_RECEIVER: return "F_LOCK_RECEIVER";
|
||||
case F_GET_LAST_RECEIVER_CLIENT_IP: return "F_GET_LAST_RECEIVER_CLIENT_IP";
|
||||
|
||||
@@ -8,5 +8,5 @@
|
||||
#define APIMOENCH "10.1.0 0x261104"
|
||||
#define APIEIGER "10.1.0 0x261028"
|
||||
#define APIXILINXCTB "10.1.0 0x261104"
|
||||
#define APIJUNGFRAU "10.1.0 0x261104"
|
||||
#define APIJUNGFRAU "10.1.0 0x261105"
|
||||
#define APIMYTHEN3 "10.1.0 0x261104"
|
||||
@@ -123,6 +123,24 @@ std::ostream &operator<<(std::ostream &os,
|
||||
return os << ToString(r);
|
||||
}
|
||||
|
||||
std::string ToString(const slsDetectorDefs::hdrParameters &r) {
|
||||
std::ostringstream oss;
|
||||
oss << '[';
|
||||
if (r.enable) {
|
||||
oss << "enabled"
|
||||
<< " " << ToString(r.opMode);
|
||||
} else {
|
||||
oss << "disabled";
|
||||
}
|
||||
oss << ']';
|
||||
return oss.str();
|
||||
}
|
||||
|
||||
std::ostream &operator<<(std::ostream &os,
|
||||
const slsDetectorDefs::hdrParameters &r) {
|
||||
return os << ToString(r);
|
||||
}
|
||||
|
||||
std::string ToString(const slsDetectorDefs::currentSrcParameters &r) {
|
||||
std::ostringstream oss;
|
||||
if (r.fix < -1 || r.fix > 1 || r.normal < -1 || r.normal > 1) {
|
||||
@@ -694,6 +712,17 @@ std::string ToString(const defs::collectionMode s) {
|
||||
}
|
||||
}
|
||||
|
||||
std::string ToString(const defs::operationMode s) {
|
||||
switch (s) {
|
||||
case defs::SYNCHROTRON:
|
||||
return std::string("synchrotron");
|
||||
case defs::FEL:
|
||||
return std::string("fel");
|
||||
default:
|
||||
return std::string("Unknown");
|
||||
}
|
||||
}
|
||||
|
||||
const std::string &ToString(const std::string &s) { return s; }
|
||||
|
||||
template <> defs::detectorType StringTo(const std::string &s) {
|
||||
@@ -1127,6 +1156,14 @@ template <> defs::collectionMode StringTo(const std::string &s) {
|
||||
throw RuntimeError("Unknown collection mode " + s);
|
||||
}
|
||||
|
||||
template <> defs::operationMode StringTo(const std::string &s) {
|
||||
if (s == "synchrotron")
|
||||
return defs::SYNCHROTRON;
|
||||
if (s == "fel")
|
||||
return defs::FEL;
|
||||
throw RuntimeError("Unknown operation mode " + s);
|
||||
}
|
||||
|
||||
template <> uint8_t StringTo(const std::string &s) {
|
||||
int base = s.find("0x") != std::string::npos ? 16 : 10;
|
||||
int value = std::stoi(s, nullptr, base);
|
||||
|
||||
@@ -379,4 +379,15 @@ TEST_CASE("string to timingInfoDecoder") {
|
||||
defs::timingInfoDecoder::SHINE);
|
||||
}
|
||||
|
||||
TEST_CASE("operationMode to string") {
|
||||
REQUIRE(ToString(defs::operationMode::SYNCHROTRON) == "synchrotron");
|
||||
REQUIRE(ToString(defs::operationMode::FEL) == "fel");
|
||||
}
|
||||
|
||||
TEST_CASE("string to operationMode") {
|
||||
REQUIRE(StringTo<defs::operationMode>("synchrotron") ==
|
||||
defs::operationMode::SYNCHROTRON);
|
||||
REQUIRE(StringTo<defs::operationMode>("fel") == defs::operationMode::FEL);
|
||||
}
|
||||
|
||||
} // namespace sls
|
||||
Reference in new issue
Block a user