Dev/jf chip1 2 part2 (#1589)

* Jungfrau chip v1.2 Part 2
- Enable reset step reduction for v1.2
- Electron collection mode => reset and bypass cds
- filter resistor: default value is the lower resistor
- 1.1+: changing filter resistor updates asic ds timer (0x1f for lower, 0x5f for higher)
- 1.2: default special dac values for G0 and G1 are pointing to different values
- auto comp disable: disabled by default (as before but now explicitly set)
- compdisabletime defaults (v1.0: 5us, v1.2: 2us)

* storagecells for v1.2: not allowed in funcs

* fixed for dev

slsDetectorServers/jungfrauDetectorServer/RegisterDefs.h

@@ -301,7 +301,8 @@
 #define CONFIG_V12_STRG_CLL_OFST            (0) 
 #define CONFIG_V12_STRG_CLL_MSK             (0x0000FFFF << CONFIG_V12_STRG_CLL_OFST)
 
-
+#define CONFIG_V12_RST_STP_RDCTN_OFST       (18)
+#define CONFIG_V12_RST_STP_RDCTN_MSK        (0x00000001 << CONFIG_V12_RST_STP_RDCTN_OFST)
 // CSM mode = high current (100%), low current (16%)
 #define CONFIG_V11_CRRNT_SRC_LOW_OFST       (19) 
 #define CONFIG_V11_CRRNT_SRC_LOW_MSK        (0x00000001 << CONFIG_V11_CRRNT_SRC_LOW_OFST)
@@ -412,6 +413,10 @@
 #define DAQ_CRRNT_SRC_CLMN_SLCT_OFST        (20)
 #define DAQ_CRRNT_SRC_CLMN_SLCT_MSK         (0x0000003F << DAQ_CRRNT_SRC_CLMN_SLCT_OFST)
 #define DAQ_GAIN_MODE_MASK                  (DAQ_FRCE_SWTCH_GAIN_MSK | DAQ_FIX_GAIN_MSK | DAQ_CMP_RST_MSK)
+#define DAQ_CDS_BYPASS_OFST                  (28)
+#define DAQ_CDS_BYPASS_MSK                   (0x00000001 << DAQ_CDS_BYPASS_OFST)
+#define DAQ_CDS_RESET_OFST                   (29)
+#define DAQ_CDS_RESET_MSK                    (0x00000001 << DAQ_CDS_RESET_OFST)
 
 /** Chip Power Register */
 #define CHIP_POWER_REG                      (0x5E << MEM_MAP_SHIFT)
@@ -494,8 +499,8 @@ Time before end of exposure when comparator is disabled */
 // tDS = (DST + 1) * 25ns
 #define ASIC_CTRL_DS_TMR_OFST               (8)
 #define ASIC_CTRL_DS_TMR_MSK                (0x000000FF << ASIC_CTRL_DS_TMR_OFST)
-#define ASIC_CTRL_DS_TMR_VAL                ((0x1F << ASIC_CTRL_DS_TMR_OFST) & ASIC_CTRL_DS_TMR_MSK)
-#define ASIC_CTRL_DS_TMR_CHIP1_1_VAL        ((0xFF << ASIC_CTRL_DS_TMR_OFST) & ASIC_CTRL_DS_TMR_MSK)
+#define ASIC_CTRL_DS_TMR_LOW_RES_VAL                ((0x1F << ASIC_CTRL_DS_TMR_OFST) & ASIC_CTRL_DS_TMR_MSK)
+#define ASIC_CTRL_DS_TMR_HIGH_RES_VAL        ((0x5F << ASIC_CTRL_DS_TMR_OFST) & ASIC_CTRL_DS_TMR_MSK)
 
 /* ADC 0 Deserializer Control */
 #define ADC_DSRLZR_0_REG                    (0xF0 << MEM_MAP_SHIFT)

slsDetectorServers/jungfrauDetectorServer/slsDetectorFunctionList.c

@@ -49,9 +49,15 @@ enum detectorSettings thisSettings = UNINITIALIZED;
 static enum CHIPINDEX chipIndex = v1_0;
 int highvoltage = 0;
 int dacValues[NDAC] = {};
-int defaultDacValues[] = DEFAULT_DAC_VALS;
-int defaultDacValue_G0[] = SPECIAL_DEFAULT_DYNAMIC_GAIN_VALS;
-int defaultDacValue_HG0[] = SPECIAL_DEFAULT_DYNAMICHG0_GAIN_VALS;
+int defaultDacValues[NDAC] = DEFAULT_DAC_VALS;
+
+static int defaultDacList_G0[NSPECIALDACS] = SPECIAL_DEFAULT_DYNAMIC_GAIN_VALS;
+static int defaultDacList_HG0[NSPECIALDACS] =
+    SPECIAL_DEFAULT_DYNAMICHG0_GAIN_VALS;
+static int defaultDacList_v1_2[NSPECIALDACS] = SPECIAL_DEFAULT_V1_2_GAIN_VALS;
+int *defaultDacValue_G0 = defaultDacList_G0;
+int *defaultDacValue_HG0 = defaultDacList_HG0;
+
 int32_t clkPhase[NUM_CLOCKS] = {};
 int detPos[4] = {};
 bool chipConfigured = false;
@@ -67,6 +73,7 @@ bool has_current_src_normal = false;
 bool has_current_src_64bit_selection = false;
 bool has_current_src_reverse_bits_selection = false;
 bool has_storage_start_in_chip_config = false;
+bool has_step_reduction = false;
 
 int isInitCheckDone() { return initCheckDone; }
 
@@ -406,6 +413,8 @@ int setChipIndex(enum CHIPINDEX ind, char *mess) {
     return setChipVersionInFPGA(mess);
 }
 
+enum CHIPINDEX getChipIndex() { return chipIndex; }
+
 int validateChipIndex(enum CHIPINDEX ind, char *mess) {
     if (ind < 0 || ind >= NUM_CHIP_INDICES) {
         sprintf(mess, "Invalid chip index %d. Options: %s\n", (int)ind,
@@ -437,6 +446,9 @@ void setChipIndexAllowedFeatures() {
         has_current_src_64bit_selection = false;
         has_current_src_reverse_bits_selection = false;
         has_storage_start_in_chip_config = false;
+        has_step_reduction = false;
+        defaultDacValue_G0 = defaultDacList_G0;
+        defaultDacValue_HG0 = defaultDacList_HG0;
         break;
     case v1_1:
         has_configure_chip = true;
@@ -447,6 +459,9 @@ void setChipIndexAllowedFeatures() {
         has_current_src_64bit_selection = true;
         has_current_src_reverse_bits_selection = true;
         has_storage_start_in_chip_config = true;
+        has_step_reduction = false;
+        defaultDacValue_G0 = defaultDacList_G0;
+        defaultDacValue_HG0 = defaultDacList_HG0;
         break;
     case v1_2_NORMAL:
     case v1_2_LOW_NOISE:
@@ -459,6 +474,9 @@ void setChipIndexAllowedFeatures() {
         has_current_src_64bit_selection = true;
         has_current_src_reverse_bits_selection = false;
         has_storage_start_in_chip_config = true;
+        has_step_reduction = true;
+        defaultDacValue_G0 = defaultDacList_v1_2;
+        defaultDacValue_HG0 = defaultDacList_v1_2;
         break;
     default:
         LOG(logERROR, ("Unknown chip index %d\n", (int)chipIndex));
@@ -617,6 +635,9 @@ void setupDetector() {
         clkPhase[i] = 0;
     }
     chipConfigured = false;
+    defaultDacValue_G0 = defaultDacList_G0;
+    defaultDacValue_HG0 = defaultDacList_HG0;
+
 #ifdef VIRTUAL
     if (isControlServer) {
         sharedMemory_setStatus(IDLE);
@@ -700,6 +721,10 @@ void setupDetector() {
         return;
     setGainMode(DEFAULT_GAINMODE);
 
+    autoCompDisable(DEFAULT_AUTO_COMP_DISABLE);
+    setComparatorDisableTime(chipIndex == v1_0 ? DEFAULT_COMP_DISABLE_TIME_v1_0
+                                               : DEFAULT_COMP_DISABLE_TIME);
+
     setNumFrames(DEFAULT_NUM_FRAMES);
     setNumTriggers(DEFAULT_NUM_CYCLES);
     setExpTime(DEFAULT_EXPTIME);
@@ -725,6 +750,8 @@ void setupDetector() {
         setFilterResistor(DEFAULT_FILTER_RESISTOR);
     if (hasFilterCellsFeature())
         setNumberOfFilterCells(DEFAULT_FILTER_CELL);
+    if (hasStepReductionFeature())
+        enableStepReduction();
 
     if (!isHardwareVersion_1_0()) {
         setFlipRows(DEFAULT_FLIP_ROWS);
@@ -2225,6 +2252,8 @@ bool hasStorageCellStartInChipConfig() {
     return has_storage_start_in_chip_config;
 }
 
+bool hasStepReductionFeature() { return has_step_reduction; }
+
 bool isChipConfigured() { return chipConfigured; }
 
 void configureChip() {
@@ -2292,16 +2321,31 @@ int64_t getComparatorDisableTime() {
 }
 
 void configureASICTimer() {
+    configureAsicPrechargeTimer();
+    configureAsicDSTimer();
+}
+
+void configureAsicPrechargeTimer() {
     bus_w(ASIC_CTRL_REG, (bus_r(ASIC_CTRL_REG) & ~ASIC_CTRL_PRCHRG_TMR_MSK) |
                              ASIC_CTRL_PRCHRG_TMR_VAL);
+    uint32_t retval = ((bus_r(ASIC_CTRL_REG) & ASIC_CTRL_PRCHRG_TMR_MSK) >>
+                       ASIC_CTRL_PRCHRG_TMR_OFST);
+    LOG(logINFO, ("Configured ASIC Precharge Timer [0x%x]\n", retval));
+}
 
-    uint32_t val = ASIC_CTRL_DS_TMR_CHIP1_1_VAL;
-    // TODO: value of chipindex v1_2 value to be decided.
-    if (chipIndex == v1_0) {
-        val = ASIC_CTRL_DS_TMR_VAL;
+void configureAsicDSTimer() {
+    // chipv1.0 => always low res val
+    // chipv1.1+ => depending on res filter
+    uint32_t val = ASIC_CTRL_DS_TMR_LOW_RES_VAL;
+    if (chipIndex != v1_0 && getFilterResistor() == 1) {
+        val = ASIC_CTRL_DS_TMR_HIGH_RES_VAL;
     }
     bus_w(ASIC_CTRL_REG, (bus_r(ASIC_CTRL_REG) & ~ASIC_CTRL_DS_TMR_MSK) | val);
-    LOG(logINFO, ("Configured ASIC Timer [0x%x]\n", bus_r(ASIC_CTRL_REG)));
+    uint32_t retval = ((bus_r(ASIC_CTRL_REG) & ASIC_CTRL_DS_TMR_MSK) >>
+                       ASIC_CTRL_DS_TMR_OFST);
+    LOG(logINFO, ("Configured ASIC DS Timer [0x%x]\n", retval));
+
+    LOG(logINFO, ("asic reg:0x%x\n", bus_r(ASIC_CTRL_REG)));
 }
 
 int setReadoutSpeed(int val) {
@@ -2652,22 +2696,26 @@ int getFilterResistor() {
 }
 
 int setFilterResistor(int value) {
+    if (value != 0 && value != 1) {
+        LOG(logERROR, ("Invalid value for Filter Resistor: %d\n", value));
+        return FAIL;
+    }
+
     // lower resistor
     if (value == 0) {
         LOG(logINFO, ("Setting Lower Filter Resistor\n"));
         bus_w(CONFIG_V11_REG,
               bus_r(CONFIG_V11_REG) | CONFIG_V11_FLTR_RSSTR_SMLR_MSK);
-        return OK;
     }
     // higher resistor
     else if (value == 1) {
         LOG(logINFO, ("Setting Higher Filter Resistor\n"));
         bus_w(CONFIG_V11_REG,
               bus_r(CONFIG_V11_REG) & ~CONFIG_V11_FLTR_RSSTR_SMLR_MSK);
-        return OK;
     }
-    LOG(logERROR, ("Could not set Filter Resistor. Invalid value %d\n", value));
-    return FAIL;
+
+    configureAsicDSTimer();
+    return OK;
 }
 
 int getNumberOfFilterCells() {
@@ -2681,8 +2729,8 @@ int getNumberOfFilterCells() {
     // flip all contents of register //TODO FIRMWARE FIX
     regval ^= BIT32_MASK;
 #endif
-    uint32_t retval =
-        (regval & CONFIG_V11_FLTR_CLL_MSK) >> CONFIG_V11_FLTR_CLL_OFST;
+    uint32_t retval = (regval & CONFIG_V11_STATUS_FLTR_CLL_MSK) >>
+                      CONFIG_V11_STATUS_FLTR_CLL_OFST;
     // count number of bits = which icell
     return (__builtin_popcount(retval));
 }
@@ -2919,6 +2967,11 @@ void setPedestalMode(int enable, uint8_t frames, uint16_t loops) {
     }
 }
 
+void enableStepReduction() {
+    LOG(logINFO, ("Enabling step reduction\n"));
+    bus_w(CONFIG_V11_REG, bus_r(CONFIG_V11_REG) | CONFIG_V12_RST_STP_RDCTN_MSK);
+}
+
 int setTimingInfoDecoder(enum timingInfoDecoder val) {
     switch (val) {
     case SWISSFEL:
@@ -2962,11 +3015,17 @@ int getElectronCollectionMode() {
 void setElectronCollectionMode(int enable) {
     LOG(logINFO,
         ("Setting Collection Mode to %s\n", enable == 0 ? "Hole" : "Electron"));
+
+    uint32_t val = bus_r(DAQ_REG);
+    uint32_t mask =
+        DAQ_ELCTRN_CLLCTN_MDE_MSK | DAQ_CDS_BYPASS_MSK | DAQ_CDS_RESET_MSK;
     if (enable) {
-        bus_w(DAQ_REG, bus_r(DAQ_REG) | DAQ_ELCTRN_CLLCTN_MDE_MSK);
+        val |= mask;
+        LOG(logINFO, ("\tCDS reset and bypassed\n"));
     } else {
-        bus_w(DAQ_REG, bus_r(DAQ_REG) & ~DAQ_ELCTRN_CLLCTN_MDE_MSK);
+        val &= ~mask;
     }
+    bus_w(DAQ_REG, val);
     configureChip();
 }
 
@@ -3070,8 +3129,8 @@ void *start_timer(void *arg) {
     const int maxRows = MAX_ROWS_PER_READOUT;
     int readNRows = getReadNRows();
     if (readNRows == -1) {
-        LOG(logERROR,
-            ("number of rows is -1. Assuming no partial readout (#rows).\n"));
+        LOG(logERROR, ("number of rows is -1. Assuming no partial readout "
+                       "(#rows).\n"));
         readNRows = MAX_ROWS_PER_READOUT;
     }
     const int packetsPerFrame =
@@ -3304,7 +3363,8 @@ int softwareTrigger(int block) {
     LOG(logINFO, ("Sending Software Trigger\n"));
     bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_SOFTWARE_TRIGGER_MSK);
     bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_SOFTWARE_TRIGGER_MSK);
-    // wait to make sure its out of this state and even 'wait for start frame'
+    // wait to make sure its out of this state and even 'wait for start
+    // frame'
     usleep(100);
 
 #ifndef VIRTUAL

slsDetectorServers/jungfrauDetectorServer/slsDetectorFunctionList.h

@@ -63,6 +63,7 @@ int setChipVersionIntFromConfigFile(int val,
                                     char *mess); // for backward compatibility
 int setChipVersionStringFromConfigFile(char *cval, char *mess);
 int setChipIndex(enum CHIPINDEX ind, char *mess);
+enum CHIPINDEX getChipIndex();
 int validateChipIndex(enum CHIPINDEX ind, char *mess);
 void setChipIndexAllowedFeatures();
 int setChipVersionInFPGA(char *mess);
@@ -189,12 +190,15 @@ bool hasCurrentSourceNormalFeature();
 bool hasCurrentSource64BitSelectionFeature();
 bool hasCurrentSourceReverseBitsSelectionFeature();
 bool hasStorageCellStartInChipConfig();
+bool hasStepReductionFeature();
 bool isChipConfigured();
 void configureChip();
 int autoCompDisable(int on);
 int setComparatorDisableTime(int64_t val);
 int64_t getComparatorDisableTime();
 void configureASICTimer();
+void configureAsicPrechargeTimer();
+void configureAsicDSTimer();
 int setReadoutSpeed(int val);
 int getReadoutSpeed(int *retval);
 int setPhase(enum CLKINDEX ind, int val, int degrees);
@@ -220,6 +224,7 @@ uint64_t getSelectCurrentSource();
 int getPedestalMode();
 void getPedestalParameters(uint8_t *frames, uint16_t *loops);
 void setPedestalMode(int enable, uint8_t frames, uint16_t loops);
+void enableStepReduction();
 int setTimingInfoDecoder(enum timingInfoDecoder val);
 int getTimingInfoDecoder(enum timingInfoDecoder *retval);
 int getElectronCollectionMode();

slsDetectorServers/jungfrauDetectorServer/slsDetectorServer_defs.h

@@ -37,6 +37,9 @@
 #define CONFIG_FILE         ("config_jungfrau.txt")
 
 /** Default Parameters */
+#define DEFAULT_AUTO_COMP_DISABLE        (0)
+#define DEFAULT_COMP_DISABLE_TIME_v1_0   (5 * 1000) // 5us
+#define DEFAULT_COMP_DISABLE_TIME        (2 * 1000) // 2us
 #define DEFAULT_NUM_FRAMES               (100 * 1000 * 1000)
 #define DEFAULT_STARTING_FRAME_NUMBER    (1)
 #define DEFAULT_NUM_CYCLES               (1)
@@ -55,7 +58,7 @@
 #define DEFAULT_STRG_CLL_STRT_CHIP11     (0x3)
 #define DEFAULT_STRG_CLL_DLY             (0)
 #define DEFAULT_FLIP_ROWS                (0)
-#define DEFAULT_FILTER_RESISTOR          (1) // higher resistor
+#define DEFAULT_FILTER_RESISTOR          (0) // lower resistor
 #define DEFAULT_FILTER_CELL              (0)
 #define DEFAULT_PEDESTAL_MODE            (0)
 #define DEFAULT_PEDESTAL_FRAMES          (1)
@@ -236,6 +239,8 @@ enum MASTERINDEX { MASTER_HARDWARE, OW_MASTER, OW_SLAVE };
     { 1450, 480, 420 }
 #define SPECIAL_DEFAULT_DYNAMICHG0_GAIN_VALS                                   \
     { 1550, 450, 620 }
+#define SPECIAL_DEFAULT_V1_2_GAIN_VALS                                         \
+    { 1500, 480, 460 }
 
 enum NETWORKINDEX { TXN_FRAME, FLOWCTRL_10G };
 enum CLKINDEX { RUN_CLK, ADC_CLK, DBIT_CLK, NUM_CLOCKS };

slsDetectorServers/slsDetectorServer/src/slsDetectorServer_funcs.c

@@ -2277,7 +2277,7 @@ int set_num_additional_storage_cells(int file_des) {
 #else
     // only set
     if (Server_VerifyLock() == OK) {
-        if (!hasStorageCellsFeature()) {
+        if (!hasStorageCellsFeature() || getChipIndex() > v1_1) {
             ret = FAIL;
             sprintf(mess, "Cannot set addl. number of storage cells for this "
                           "chip version\n");

slsDetectorSoftware/tests/Caller/test-Caller-jungfrau.cpp

@@ -277,8 +277,8 @@ TEST_CASE("extrastoragecells", "[.detectorintegration]") {
     auto det_type = det.getDetectorType().squash();
     if (det_type == defs::JUNGFRAU) {
         auto chipVersion = chipVersionToX10(det.getChipVersion().squash());
-        // chip version 1.0 and 1.2
-        if (chipVersion == 10 || chipVersion == 12) {
+        // currently only chip version 1.0, later firmware for 1.2
+        if (chipVersion == 10) { //} || chipVersion == 12) {
             auto prev_val = det.getNumberOfAdditionalStorageCells().tsquash(
                 "inconsistent #additional storage cells to test");
             {

slsSupportLib/include/sls/versionAPI.h

@@ -8,6 +8,6 @@
 #define APIMOENCH     "0.0.0 0x260424"
 #define APIEIGER      "0.0.0 0x260807"
 #define APIXILINXCTB  "0.0.0 0x260813"
-#define APIJUNGFRAU   "0.0.0 0x260902"
+#define APIJUNGFRAU   "0.0.0 0x261002"
 #define APIMYTHEN3    "0.0.0 0x260506"
 #define APIMATTERHORN "0.0.0 0x260529"