no need to update server nchan/nchip/ndac values from client

This commit is contained in:
maliakal_d 2021-11-25 12:09:07 +01:00
parent 340b18ca83
commit 4a89bef87b
2 changed files with 5 additions and 10 deletions

View File

@ -2699,9 +2699,6 @@ int copyModule(sls_detector_module *destMod, sls_detector_module *srcMod) {
LOG(logDEBUG1, ("DACs: src %d, dest %d\n", srcMod->ndac, destMod->ndac)); LOG(logDEBUG1, ("DACs: src %d, dest %d\n", srcMod->ndac, destMod->ndac));
LOG(logDEBUG1, ("Chans: src %d, dest %d\n", srcMod->nchan, destMod->nchan)); LOG(logDEBUG1, ("Chans: src %d, dest %d\n", srcMod->nchan, destMod->nchan));
destMod->ndac = srcMod->ndac;
destMod->nchip = srcMod->nchip;
destMod->nchan = srcMod->nchan;
if (srcMod->reg >= 0) if (srcMod->reg >= 0)
destMod->reg = srcMod->reg; destMod->reg = srcMod->reg;
if (srcMod->iodelay >= 0) if (srcMod->iodelay >= 0)
@ -2712,7 +2709,7 @@ int copyModule(sls_detector_module *destMod, sls_detector_module *srcMod) {
destMod->eV[0] = srcMod->eV[0]; destMod->eV[0] = srcMod->eV[0];
LOG(logDEBUG1, ("Copying register %x (%x)\n", destMod->reg, srcMod->reg)); LOG(logDEBUG1, ("Copying register %x (%x)\n", destMod->reg, srcMod->reg));
if (destMod->nchan != 0) { if (destMod->nchan != 0 && srcMod->nchan != 0) {
for (int ichan = 0; ichan < (srcMod->nchan); ichan++) { for (int ichan = 0; ichan < (srcMod->nchan); ichan++) {
if (*((srcMod->chanregs) + ichan) >= 0) if (*((srcMod->chanregs) + ichan) >= 0)
*((destMod->chanregs) + ichan) = *((srcMod->chanregs) + ichan); *((destMod->chanregs) + ichan) = *((srcMod->chanregs) + ichan);

View File

@ -96,8 +96,9 @@ void basictests() {
} }
// does check only if flag is 0 (by default), set by command line // does check only if flag is 0 (by default), set by command line
if ((!debugflag) && (!updateFlag) && if ((!debugflag) && (!updateFlag) &&
((validateKernelVersion(KERNEL_DATE_VRSN) == FAIL) || (checkType() == FAIL) || ((validateKernelVersion(KERNEL_DATE_VRSN) == FAIL) ||
(testFpga() == FAIL) || (testBus() == FAIL))) { (checkType() == FAIL) || (testFpga() == FAIL) ||
(testBus() == FAIL))) {
strcpy(initErrorMessage, "Could not pass basic tests of FPGA and bus. " strcpy(initErrorMessage, "Could not pass basic tests of FPGA and bus. "
"Dangerous to continue.\n"); "Dangerous to continue.\n");
LOG(logERROR, ("%s\n\n", initErrorMessage)); LOG(logERROR, ("%s\n\n", initErrorMessage));
@ -2487,9 +2488,6 @@ int copyModule(sls_detector_module *destMod, sls_detector_module *srcMod) {
LOG(logDEBUG1, ("DACs: src %d, dest %d\n", srcMod->ndac, destMod->ndac)); LOG(logDEBUG1, ("DACs: src %d, dest %d\n", srcMod->ndac, destMod->ndac));
LOG(logDEBUG1, ("Chans: src %d, dest %d\n", srcMod->nchan, destMod->nchan)); LOG(logDEBUG1, ("Chans: src %d, dest %d\n", srcMod->nchan, destMod->nchan));
destMod->ndac = srcMod->ndac;
destMod->nchip = srcMod->nchip;
destMod->nchan = srcMod->nchan;
if (srcMod->reg >= 0) if (srcMod->reg >= 0)
destMod->reg = srcMod->reg; destMod->reg = srcMod->reg;
/* /*
@ -2505,7 +2503,7 @@ int copyModule(sls_detector_module *destMod, sls_detector_module *srcMod) {
LOG(logDEBUG1, ("Copying register %x (%x)\n", destMod->reg, srcMod->reg)); LOG(logDEBUG1, ("Copying register %x (%x)\n", destMod->reg, srcMod->reg));
if (destMod->nchan != 0) { if (destMod->nchan != 0 && srcMod->nchan != 0) {
for (int ichan = 0; ichan < (srcMod->nchan); ichan++) { for (int ichan = 0; ichan < (srcMod->nchan); ichan++) {
*((destMod->chanregs) + ichan) = *((srcMod->chanregs) + ichan); *((destMod->chanregs) + ichan) = *((srcMod->chanregs) + ichan);
} }