From 4a89bef87b7ad2ae616ab89a48b9282682744f45 Mon Sep 17 00:00:00 2001 From: Dhanya Thattil Date: Thu, 25 Nov 2021 12:09:07 +0100 Subject: [PATCH] no need to update server nchan/nchip/ndac values from client --- .../eigerDetectorServer/slsDetectorFunctionList.c | 5 +---- .../mythen3DetectorServer/slsDetectorFunctionList.c | 10 ++++------ 2 files changed, 5 insertions(+), 10 deletions(-) diff --git a/slsDetectorServers/eigerDetectorServer/slsDetectorFunctionList.c b/slsDetectorServers/eigerDetectorServer/slsDetectorFunctionList.c index 3e1ff4ef3..5eacd9b6d 100644 --- a/slsDetectorServers/eigerDetectorServer/slsDetectorFunctionList.c +++ b/slsDetectorServers/eigerDetectorServer/slsDetectorFunctionList.c @@ -2699,9 +2699,6 @@ int copyModule(sls_detector_module *destMod, sls_detector_module *srcMod) { LOG(logDEBUG1, ("DACs: src %d, dest %d\n", srcMod->ndac, destMod->ndac)); LOG(logDEBUG1, ("Chans: src %d, dest %d\n", srcMod->nchan, destMod->nchan)); - destMod->ndac = srcMod->ndac; - destMod->nchip = srcMod->nchip; - destMod->nchan = srcMod->nchan; if (srcMod->reg >= 0) destMod->reg = srcMod->reg; if (srcMod->iodelay >= 0) @@ -2712,7 +2709,7 @@ int copyModule(sls_detector_module *destMod, sls_detector_module *srcMod) { destMod->eV[0] = srcMod->eV[0]; LOG(logDEBUG1, ("Copying register %x (%x)\n", destMod->reg, srcMod->reg)); - if (destMod->nchan != 0) { + if (destMod->nchan != 0 && srcMod->nchan != 0) { for (int ichan = 0; ichan < (srcMod->nchan); ichan++) { if (*((srcMod->chanregs) + ichan) >= 0) *((destMod->chanregs) + ichan) = *((srcMod->chanregs) + ichan); diff --git a/slsDetectorServers/mythen3DetectorServer/slsDetectorFunctionList.c b/slsDetectorServers/mythen3DetectorServer/slsDetectorFunctionList.c index e536e4b58..bd4528832 100644 --- a/slsDetectorServers/mythen3DetectorServer/slsDetectorFunctionList.c +++ b/slsDetectorServers/mythen3DetectorServer/slsDetectorFunctionList.c @@ -96,8 +96,9 @@ void basictests() { } // does check only if flag is 0 (by default), set by command line if ((!debugflag) && (!updateFlag) && - ((validateKernelVersion(KERNEL_DATE_VRSN) == FAIL) || (checkType() == FAIL) || - (testFpga() == FAIL) || (testBus() == FAIL))) { + ((validateKernelVersion(KERNEL_DATE_VRSN) == FAIL) || + (checkType() == FAIL) || (testFpga() == FAIL) || + (testBus() == FAIL))) { strcpy(initErrorMessage, "Could not pass basic tests of FPGA and bus. " "Dangerous to continue.\n"); LOG(logERROR, ("%s\n\n", initErrorMessage)); @@ -2487,9 +2488,6 @@ int copyModule(sls_detector_module *destMod, sls_detector_module *srcMod) { LOG(logDEBUG1, ("DACs: src %d, dest %d\n", srcMod->ndac, destMod->ndac)); LOG(logDEBUG1, ("Chans: src %d, dest %d\n", srcMod->nchan, destMod->nchan)); - destMod->ndac = srcMod->ndac; - destMod->nchip = srcMod->nchip; - destMod->nchan = srcMod->nchan; if (srcMod->reg >= 0) destMod->reg = srcMod->reg; /* @@ -2505,7 +2503,7 @@ int copyModule(sls_detector_module *destMod, sls_detector_module *srcMod) { LOG(logDEBUG1, ("Copying register %x (%x)\n", destMod->reg, srcMod->reg)); - if (destMod->nchan != 0) { + if (destMod->nchan != 0 && srcMod->nchan != 0) { for (int ichan = 0; ichan < (srcMod->nchan); ichan++) { *((destMod->chanregs) + ichan) = *((srcMod->chanregs) + ichan); }