wip: ctb power works, tests left
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This commit is contained in:
2026-03-09 15:54:18 +01:00
parent 0fe1df7959
commit 4875597533
16 changed files with 281 additions and 319 deletions
+4 -64
View File
@@ -516,7 +516,7 @@ class Detector(CppDetectorApi):
@element
def powerchip(self):
"""
[Jungfrau][Moench][Mythen3][Gotthard2][Xilinx Ctb] Power the chip.
[Jungfrau][Moench][Mythen3][Gotthard2][Xilinx Ctb][Ctb] Power the chip.
Note
----
@@ -4169,76 +4169,16 @@ class Detector(CppDetectorApi):
n = ut.merge_args(2, n)
ut.set_using_dict(self.setPatternLoopCycles, *n)
@property
@element
def v_a(self):
"""[Ctb][Xilinx Ctb] Power supply a in mV."""
return self.getPower(dacIndex.V_POWER_A)
@v_a.setter
def v_a(self, value):
value = ut.merge_args(dacIndex.V_POWER_A, value)
ut.set_using_dict(self.setPower, *value)
@property
@element
def v_b(self):
"""[Ctb][Xilinx Ctb] Power supply b in mV."""
return self.getPower(dacIndex.V_POWER_B)
@v_b.setter
def v_b(self, value):
value = ut.merge_args(dacIndex.V_POWER_B, value)
ut.set_using_dict(self.setPower, *value)
@property
@element
def v_c(self):
"""[Ctb][Xilinx Ctb] Power supply c in mV."""
return self.getPower(dacIndex.V_POWER_C)
@v_c.setter
def v_c(self, value):
value = ut.merge_args(dacIndex.V_POWER_C, value)
ut.set_using_dict(self.setPower, *value)
@property
@element
def v_d(self):
"""[Ctb][Xilinx Ctb] Power supply d in mV."""
return self.getPower(dacIndex.V_POWER_D)
@v_d.setter
def v_d(self, value):
value = ut.merge_args(dacIndex.V_POWER_D, value)
ut.set_using_dict(self.setPower, *value)
@property
@element
def v_io(self):
"""[Ctb][Xilinx Ctb] Power supply io in mV. Minimum 1200 mV.
Note
----
Must be the first power regulator to be set after fpga reset (on-board detector server start up).
"""
return self.getPower(dacIndex.V_POWER_IO)
@v_io.setter
def v_io(self, value):
value = ut.merge_args(dacIndex.V_POWER_IO, value)
ut.set_using_dict(self.setPower, *value)
@property
@element
def v_limit(self):
"""[Ctb][Xilinx Ctb] Soft limit for power supplies (ctb only) and DACS in mV."""
return self.getPower(dacIndex.V_LIMIT)
return self.getDAC(dacIndex.V_LIMIT, True)
@v_limit.setter
def v_limit(self, value):
value = ut.merge_args(dacIndex.V_LIMIT, value)
ut.set_using_dict(self.setPower, *value)
value = ut.merge_args(dacIndex.V_LIMIT, value, True)
ut.set_using_dict(self.setDAC, *value)
@property
+8 -8
View File
@@ -1555,15 +1555,15 @@ void init_det(py::module &m) {
(std::vector<defs::dacIndex>(Detector::*)() const) &
Detector::getSlowADCList);
CppDetectorApi.def(
"getPower",
(Result<int>(Detector::*)(defs::dacIndex, sls::Positions) const) &
Detector::getPower,
"isPowerEnabled",
(Result<bool>(Detector::*)(defs::dacIndex, sls::Positions) const) &
Detector::isPowerEnabled,
py::arg(), py::arg() = Positions{});
CppDetectorApi.def(
"setPower",
(void (Detector::*)(defs::dacIndex, int, sls::Positions)) &
Detector::setPower,
py::arg(), py::arg(), py::arg() = Positions{});
CppDetectorApi.def("setPowerEnabled",
(void (Detector::*)(const std::vector<defs::dacIndex> &,
bool, sls::Positions)) &
Detector::setPowerEnabled,
py::arg(), py::arg(), py::arg() = Positions{});
CppDetectorApi.def("getADCVpp",
(Result<int>(Detector::*)(bool, sls::Positions) const) &
Detector::getADCVpp,
@@ -603,7 +603,7 @@ void setupDetector() {
LOG(logINFOBLUE,
("Setting power dacs to min dac value (power disabled)\n"));
for (int idac = NDAC_ONLY; idac < NDAC; ++idac) {
if (idac == D_PWR_CHIP)
if (idac == (int)D_PWR_CHIP)
continue;
int min = (idac == D_PWR_IO) ? VIO_MIN_MV : POWER_RGLTR_MIN;
initError = setDAC(idac, min, true, initErrorMessage);
@@ -1435,18 +1435,10 @@ int setDAC(enum DACINDEX ind, int val, bool mV, char *mess) {
if (validateDACValue(ind, val, mess) == FAIL)
return FAIL;
// power dacs
// power dacs (power should be disabled)
if (ind > NDAC_ONLY && ind != D_PWR_CHIP) {
if (verifyPowerRailDisabled(ind, mess) == FAIL)
return FAIL;
// set vchip accordingly
int vchip = 0;
if (getVchipToSet(ind, val, &vchip, mess) == FAIL)
return FAIL;
if (setVchip(vchip, mess) == FAIL)
return FAIL;
}
if (convertVoltageToDACValue(ind, val, &dacval, mess) == FAIL)
@@ -1500,21 +1492,14 @@ int setVchip(int val, char *mess) {
return OK;
}
int getVchipToSet(enum DACINDEX ind, int pwr_val, int *retval_vchip,
char *mess) {
int getVchipToSet(int *retval_vchip, char *mess) {
// get the max of all the power regulators
int max = 0;
for (int ipwr = NDAC_ONLY; ipwr <= NDAC; ++ipwr) {
if (ipwr == D_PWR_CHIP)
continue;
enum DACINDEX pwrDacs[] = {D_PWR_A, D_PWR_B, D_PWR_C, D_PWR_D, D_PWR_IO};
for (int ipwr = 0; ipwr != (NPWR - 1); ++ipwr) {
int val = 0;
// current index, use the value to be set
if (ipwr == (int)ind) {
val = pwr_val;
} else {
if ((getDAC, ind, true, &val, mess) == FAIL)
return FAIL;
}
if (getDAC(pwrDacs[ipwr], true, &val, mess) == FAIL)
return FAIL;
if (val > max)
max = val;
}
@@ -1526,14 +1511,10 @@ int getVchipToSet(enum DACINDEX ind, int pwr_val, int *retval_vchip,
retval = VCHIP_MIN_MV;
// max checked earlier, should not happen
if (retval > VCHIP_MAX_MV) {
enum PWRINDEX pwrIndex = PWR_IO;
if (getPowerIndexFromDACIndex(ind, &pwrIndex, mess) == FAIL)
return FAIL;
char *powerNames[] = {PWR_NAMES};
sprintf(
mess,
"Could not set %s. Vchip value to set %d is beyond itsmaximum %d\n",
powerNames[pwrIndex], retval, VCHIP_MAX_MV);
sprintf(mess,
"Could not set power enable. Vchip value to set %d is beyond "
"its maximum %d\n",
retval, VCHIP_MAX_MV);
LOG(logERROR, (mess));
return FAIL;
}
@@ -1543,15 +1524,19 @@ int getVchipToSet(enum DACINDEX ind, int pwr_val, int *retval_vchip,
return OK;
}
int validatePower(enum PWRINDEX ind, int voltage, char *mess) {
int validatePower(enum DACINDEX ind, int voltage, char *mess) {
char *powerNames[] = {PWR_NAMES};
enum PWRINDEX pwrIndex = PWR_IO;
if (getPowerIndexFromDACIndex(ind, &pwrIndex, mess) == FAIL)
return FAIL;
// validate min value
int min = (ind == PWR_IO) ? VIO_MIN_MV : POWER_RGLTR_MIN;
int min = (pwrIndex == PWR_IO) ? VIO_MIN_MV : POWER_RGLTR_MIN;
if (voltage < min && voltage != 0) {
sprintf(
mess,
"Could not set %s. Input value %d mV must be greater than %d mV.\n",
powerNames[ind], voltage, min);
powerNames[pwrIndex], voltage, min);
LOG(logERROR, (mess));
return FAIL;
}
@@ -1561,14 +1546,14 @@ int validatePower(enum PWRINDEX ind, int voltage, char *mess) {
sprintf(
mess,
"Could not set %s. Input value %d mV must be less than %d mV.\n",
powerNames[ind], voltage, max);
powerNames[pwrIndex], voltage, max);
LOG(logERROR, (mess));
return FAIL;
}
// validate vlimit
if (vLimit > 0 && voltage > vLimit) {
sprintf(mess, "Could not set %s. Input %d mV exceeds vLimit %d mV\n",
powerNames[ind], voltage, vLimit);
powerNames[pwrIndex], voltage, vLimit);
LOG(logERROR, (mess))
return FAIL;
}
@@ -1651,6 +1636,14 @@ int setPowerRailEnabled(enum DACINDEX indices[], int count, bool enable,
LOG(logINFO, ("%s", message));
}
// set vchip accordingly
int vchip = 0;
if (getVchipToSet(&vchip, mess) == FAIL)
return FAIL;
if (setVchip(vchip, mess) == FAIL)
return FAIL;
// enable/disable power rails
uint32_t addr = POWER_REG;
if (enable) {
bus_w(addr, bus_r(addr) | mask);
@@ -145,10 +145,9 @@ int setVLimit(int val, char *mess);
int validateVchip(int val, char *mess);
int getVchip(int *retval, char *mess);
int setVchip(int val, char *mess);
int getVchipToSet(enum DACINDEX ind, int pwr_val, int *retval_vchip,
char *mess);
int getVchipToSet(int *retval_vchip, char *mess);
int validatePower(enum PWRINDEX ind, int val, char *mess);
int validatePower(enum DACINDEX ind, int val, char *mess);
int getPowerIndexFromDACIndex(enum DACINDEX ind, enum PWRINDEX *pwrIndex,
char *mess);
int getPowerRailMask(enum PWRINDEX ind, uint32_t *mask, char *mess);
@@ -80,7 +80,7 @@ _sd() {
local IS_PATH=0
local SLS_COMMANDS=" acquire activate adcclk adcenable adcenable10g adcindex adcinvert adclist adcname adcphase adcpipeline adcreg adcvpp apulse asamples autocompdisable badchannels blockingtrigger burstmode burstperiod bursts burstsl bustest cdsgain chipversion clearbit clearbusy clientversion clkdiv clkfreq clkphase collectionmode column compdisabletime confadc config configtransceiver counters currentsource dac dacindex daclist dacname dacvalues datastream dbitclk dbitphase dbitpipeline defaultdac defaultpattern define_bit define_reg definelist_bit definelist_reg delay delayl detectorserverversion detsize diodelay dpulse dr drlist dsamples execcommand exptime exptime1 exptime2 exptime3 extrastoragecells extsampling extsamplingsrc extsig fformat filtercells filterresistor findex firmwaretest firmwareversion fliprows flowcontrol10g fmaster fname foverwrite fpath framecounter frames framesl frametime free fwrite gaincaps gainmode gappixels gatedelay gatedelay1 gatedelay2 gatedelay3 gates getbit hardwareversion highvoltage hostname im_a im_b im_c im_d im_io imagetest include initialchecks inj_ch interpolation interruptsubframe kernelversion lastclient led lock master maxadcphaseshift maxclkphaseshift maxdbitphaseshift measuredperiod measuredsubperiod moduleid nextframenumber nmod numinterfaces overflow packageversion parallel parameters partialreset patfname patioctrl patlimits patloop patloop0 patloop1 patloop2 patmask patnloop patnloop0 patnloop1 patnloop2 patsetbit pattern patternstart patwait patwait0 patwait1 patwait2 patwaittime patwaittime0 patwaittime1 patwaittime2 patword pedestalmode period periodl polarity port powerchip powerindex powerlist powername powervalues programfpga pulse pulsechip pulsenmove pumpprobe quad ratecorr readnrows readout readoutspeed readoutspeedlist rebootcontroller reg resetdacs resetfpga romode row runclk runtime rx_arping rx_clearroi rx_dbitlist rx_dbitoffset rx_dbitreorder rx_discardpolicy rx_fifodepth rx_frameindex rx_framescaught rx_framesperfile rx_hostname rx_jsonaddheader rx_jsonpara rx_lastclient rx_lock rx_missingpackets rx_padding rx_printconfig rx_realudpsocksize rx_roi rx_silent rx_start rx_status rx_stop rx_tcpport rx_threads rx_udpsocksize rx_version rx_zmqfreq rx_zmqhwm rx_zmqip rx_zmqport rx_zmqstartfnum rx_zmqstream samples savepattern scan scanerrmsg selinterface serialnumber setbit settings settingslist settingspath signalindex signallist signalname sleep slowadc slowadcindex slowadclist slowadcname slowadcvalues start status stop stopport storagecell_delay storagecell_start subdeadtime subexptime sync syncclk temp_10ge temp_adc temp_control temp_dcdc temp_event temp_fpga temp_fpgaext temp_fpgafl temp_fpgafr temp_slowadc temp_sodl temp_sodr temp_threshold templist tempvalues tengiga threshold thresholdnotb timing timing_info_decoder timinglist timingsource top transceiverenable trigger triggers triggersl trimbits trimen trimval tsamples txdelay txdelay_frame txdelay_left txdelay_right type udp_cleardst udp_dstip udp_dstip2 udp_dstlist udp_dstmac udp_dstmac2 udp_dstport udp_dstport2 udp_firstdst udp_numdst udp_reconfigure udp_srcip udp_srcip2 udp_srcmac udp_srcmac2 udp_validate update updatedetectorserver updatekernel updatemode user v_limit vchip_comp_adc vchip_comp_fe vchip_cs vchip_opa_1st vchip_opa_fd vchip_ref_comp_fe versions veto vetoalg vetofile vetophoton vetoref vetostream virtual vm_a vm_b vm_c vm_d vm_io zmqhwm zmqip zmqport "
local SLS_COMMANDS=" acquire activate adcclk adcenable adcenable10g adcindex adcinvert adclist adcname adcphase adcpipeline adcreg adcvpp apulse asamples autocompdisable badchannels blockingtrigger burstmode burstperiod bursts burstsl bustest cdsgain chipversion clearbit clearbusy clientversion clkdiv clkfreq clkphase collectionmode column compdisabletime confadc config configtransceiver counters currentsource dac dacindex daclist dacname dacvalues datastream dbitclk dbitphase dbitpipeline defaultdac defaultpattern define_bit define_reg definelist_bit definelist_reg delay delayl detectorserverversion detsize diodelay dpulse dr drlist dsamples execcommand exptime exptime1 exptime2 exptime3 extrastoragecells extsampling extsamplingsrc extsig fformat filtercells filterresistor findex firmwaretest firmwareversion fliprows flowcontrol10g fmaster fname foverwrite fpath framecounter frames framesl frametime free fwrite gaincaps gainmode gappixels gatedelay gatedelay1 gatedelay2 gatedelay3 gates getbit hardwareversion highvoltage hostname im_a im_b im_c im_d im_io imagetest include initialchecks inj_ch interpolation interruptsubframe kernelversion lastclient led lock master maxadcphaseshift maxclkphaseshift maxdbitphaseshift measuredperiod measuredsubperiod moduleid nextframenumber nmod numinterfaces overflow packageversion parallel parameters partialreset patfname patioctrl patlimits patloop patloop0 patloop1 patloop2 patmask patnloop patnloop0 patnloop1 patnloop2 patsetbit pattern patternstart patwait patwait0 patwait1 patwait2 patwaittime patwaittime0 patwaittime1 patwaittime2 patword pedestalmode period periodl polarity port power powerchip powerindex powerlist powername powervalues programfpga pulse pulsechip pulsenmove pumpprobe quad ratecorr readnrows readout readoutspeed readoutspeedlist rebootcontroller reg resetdacs resetfpga romode row runclk runtime rx_arping rx_clearroi rx_dbitlist rx_dbitoffset rx_dbitreorder rx_discardpolicy rx_fifodepth rx_frameindex rx_framescaught rx_framesperfile rx_hostname rx_jsonaddheader rx_jsonpara rx_lastclient rx_lock rx_missingpackets rx_padding rx_printconfig rx_realudpsocksize rx_roi rx_silent rx_start rx_status rx_stop rx_tcpport rx_threads rx_udpsocksize rx_version rx_zmqfreq rx_zmqhwm rx_zmqip rx_zmqport rx_zmqstartfnum rx_zmqstream samples savepattern scan scanerrmsg selinterface serialnumber setbit settings settingslist settingspath signalindex signallist signalname sleep slowadc slowadcindex slowadclist slowadcname slowadcvalues start status stop stopport storagecell_delay storagecell_start subdeadtime subexptime sync syncclk temp_10ge temp_adc temp_control temp_dcdc temp_event temp_fpga temp_fpgaext temp_fpgafl temp_fpgafr temp_slowadc temp_sodl temp_sodr temp_threshold templist tempvalues tengiga threshold thresholdnotb timing timing_info_decoder timinglist timingsource top transceiverenable trigger triggers triggersl trimbits trimen trimval tsamples txdelay txdelay_frame txdelay_left txdelay_right type udp_cleardst udp_dstip udp_dstip2 udp_dstlist udp_dstmac udp_dstmac2 udp_dstport udp_dstport2 udp_firstdst udp_numdst udp_reconfigure udp_srcip udp_srcip2 udp_srcmac udp_srcmac2 udp_validate update updatedetectorserver updatekernel updatemode user v_limit vchip_comp_adc vchip_comp_fe vchip_cs vchip_opa_1st vchip_opa_fd vchip_ref_comp_fe versions veto vetoalg vetofile vetophoton vetoref vetostream virtual vm_a vm_b vm_c vm_d vm_io zmqhwm zmqip zmqport "
__acquire() {
FCN_RETURN=""
return 0
@@ -1843,6 +1843,10 @@ fi
fi
return 0
}
__power() {
FCN_RETURN=""
return 0
}
__powerchip() {
FCN_RETURN=""
if [[ ${IS_GET} -eq 0 ]]; then
@@ -4,7 +4,7 @@
_sd() {
local SLS_COMMANDS=" acquire activate adcclk adcenable adcenable10g adcindex adcinvert adclist adcname adcphase adcpipeline adcreg adcvpp apulse asamples autocompdisable badchannels blockingtrigger burstmode burstperiod bursts burstsl bustest cdsgain chipversion clearbit clearbusy clientversion clkdiv clkfreq clkphase collectionmode column compdisabletime confadc config configtransceiver counters currentsource dac dacindex daclist dacname dacvalues datastream dbitclk dbitphase dbitpipeline defaultdac defaultpattern define_bit define_reg definelist_bit definelist_reg delay delayl detectorserverversion detsize diodelay dpulse dr drlist dsamples execcommand exptime exptime1 exptime2 exptime3 extrastoragecells extsampling extsamplingsrc extsig fformat filtercells filterresistor findex firmwaretest firmwareversion fliprows flowcontrol10g fmaster fname foverwrite fpath framecounter frames framesl frametime free fwrite gaincaps gainmode gappixels gatedelay gatedelay1 gatedelay2 gatedelay3 gates getbit hardwareversion highvoltage hostname im_a im_b im_c im_d im_io imagetest include initialchecks inj_ch interpolation interruptsubframe kernelversion lastclient led lock master maxadcphaseshift maxclkphaseshift maxdbitphaseshift measuredperiod measuredsubperiod moduleid nextframenumber nmod numinterfaces overflow packageversion parallel parameters partialreset patfname patioctrl patlimits patloop patloop0 patloop1 patloop2 patmask patnloop patnloop0 patnloop1 patnloop2 patsetbit pattern patternstart patwait patwait0 patwait1 patwait2 patwaittime patwaittime0 patwaittime1 patwaittime2 patword pedestalmode period periodl polarity port powerchip powerindex powerlist powername powervalues programfpga pulse pulsechip pulsenmove pumpprobe quad ratecorr readnrows readout readoutspeed readoutspeedlist rebootcontroller reg resetdacs resetfpga romode row runclk runtime rx_arping rx_clearroi rx_dbitlist rx_dbitoffset rx_dbitreorder rx_discardpolicy rx_fifodepth rx_frameindex rx_framescaught rx_framesperfile rx_hostname rx_jsonaddheader rx_jsonpara rx_lastclient rx_lock rx_missingpackets rx_padding rx_printconfig rx_realudpsocksize rx_roi rx_silent rx_start rx_status rx_stop rx_tcpport rx_threads rx_udpsocksize rx_version rx_zmqfreq rx_zmqhwm rx_zmqip rx_zmqport rx_zmqstartfnum rx_zmqstream samples savepattern scan scanerrmsg selinterface serialnumber setbit settings settingslist settingspath signalindex signallist signalname sleep slowadc slowadcindex slowadclist slowadcname slowadcvalues start status stop stopport storagecell_delay storagecell_start subdeadtime subexptime sync syncclk temp_10ge temp_adc temp_control temp_dcdc temp_event temp_fpga temp_fpgaext temp_fpgafl temp_fpgafr temp_slowadc temp_sodl temp_sodr temp_threshold templist tempvalues tengiga threshold thresholdnotb timing timing_info_decoder timinglist timingsource top transceiverenable trigger triggers triggersl trimbits trimen trimval tsamples txdelay txdelay_frame txdelay_left txdelay_right type udp_cleardst udp_dstip udp_dstip2 udp_dstlist udp_dstmac udp_dstmac2 udp_dstport udp_dstport2 udp_firstdst udp_numdst udp_reconfigure udp_srcip udp_srcip2 udp_srcmac udp_srcmac2 udp_validate update updatedetectorserver updatekernel updatemode user v_limit vchip_comp_adc vchip_comp_fe vchip_cs vchip_opa_1st vchip_opa_fd vchip_ref_comp_fe versions veto vetoalg vetofile vetophoton vetoref vetostream virtual vm_a vm_b vm_c vm_d vm_io zmqhwm zmqip zmqport "
local SLS_COMMANDS=" acquire activate adcclk adcenable adcenable10g adcindex adcinvert adclist adcname adcphase adcpipeline adcreg adcvpp apulse asamples autocompdisable badchannels blockingtrigger burstmode burstperiod bursts burstsl bustest cdsgain chipversion clearbit clearbusy clientversion clkdiv clkfreq clkphase collectionmode column compdisabletime confadc config configtransceiver counters currentsource dac dacindex daclist dacname dacvalues datastream dbitclk dbitphase dbitpipeline defaultdac defaultpattern define_bit define_reg definelist_bit definelist_reg delay delayl detectorserverversion detsize diodelay dpulse dr drlist dsamples execcommand exptime exptime1 exptime2 exptime3 extrastoragecells extsampling extsamplingsrc extsig fformat filtercells filterresistor findex firmwaretest firmwareversion fliprows flowcontrol10g fmaster fname foverwrite fpath framecounter frames framesl frametime free fwrite gaincaps gainmode gappixels gatedelay gatedelay1 gatedelay2 gatedelay3 gates getbit hardwareversion highvoltage hostname im_a im_b im_c im_d im_io imagetest include initialchecks inj_ch interpolation interruptsubframe kernelversion lastclient led lock master maxadcphaseshift maxclkphaseshift maxdbitphaseshift measuredperiod measuredsubperiod moduleid nextframenumber nmod numinterfaces overflow packageversion parallel parameters partialreset patfname patioctrl patlimits patloop patloop0 patloop1 patloop2 patmask patnloop patnloop0 patnloop1 patnloop2 patsetbit pattern patternstart patwait patwait0 patwait1 patwait2 patwaittime patwaittime0 patwaittime1 patwaittime2 patword pedestalmode period periodl polarity port power powerchip powerindex powerlist powername powervalues programfpga pulse pulsechip pulsenmove pumpprobe quad ratecorr readnrows readout readoutspeed readoutspeedlist rebootcontroller reg resetdacs resetfpga romode row runclk runtime rx_arping rx_clearroi rx_dbitlist rx_dbitoffset rx_dbitreorder rx_discardpolicy rx_fifodepth rx_frameindex rx_framescaught rx_framesperfile rx_hostname rx_jsonaddheader rx_jsonpara rx_lastclient rx_lock rx_missingpackets rx_padding rx_printconfig rx_realudpsocksize rx_roi rx_silent rx_start rx_status rx_stop rx_tcpport rx_threads rx_udpsocksize rx_version rx_zmqfreq rx_zmqhwm rx_zmqip rx_zmqport rx_zmqstartfnum rx_zmqstream samples savepattern scan scanerrmsg selinterface serialnumber setbit settings settingslist settingspath signalindex signallist signalname sleep slowadc slowadcindex slowadclist slowadcname slowadcvalues start status stop stopport storagecell_delay storagecell_start subdeadtime subexptime sync syncclk temp_10ge temp_adc temp_control temp_dcdc temp_event temp_fpga temp_fpgaext temp_fpgafl temp_fpgafr temp_slowadc temp_sodl temp_sodr temp_threshold templist tempvalues tengiga threshold thresholdnotb timing timing_info_decoder timinglist timingsource top transceiverenable trigger triggers triggersl trimbits trimen trimval tsamples txdelay txdelay_frame txdelay_left txdelay_right type udp_cleardst udp_dstip udp_dstip2 udp_dstlist udp_dstmac udp_dstmac2 udp_dstport udp_dstport2 udp_firstdst udp_numdst udp_reconfigure udp_srcip udp_srcip2 udp_srcmac udp_srcmac2 udp_validate update updatedetectorserver updatekernel updatemode user v_limit vchip_comp_adc vchip_comp_fe vchip_cs vchip_opa_1st vchip_opa_fd vchip_ref_comp_fe versions veto vetoalg vetofile vetophoton vetoref vetostream virtual vm_a vm_b vm_c vm_d vm_io zmqhwm zmqip zmqport "
__acquire() {
FCN_RETURN=""
return 0
@@ -1767,6 +1767,10 @@ fi
fi
return 0
}
__power() {
FCN_RETURN=""
return 0
}
__powerchip() {
FCN_RETURN=""
if [[ ${IS_GET} -eq 0 ]]; then
+23 -46
View File
@@ -186,29 +186,6 @@ INTEGER_COMMAND_NOID:
input_types: [ int ]
output: [ 'args.front()' ]
INTEGER_IND_COMMAND:
template: true
infer_action: true
help: ""
actions:
GET:
# extra variable to store the index
require_det_id: true
function: ''
argc: 0
input: [ 'INDEX' ]
input_types: [ int ]
cast_input: [ false ]
output: [ OutString(t) ]
PUT:
# extra variable to store the index
function: ''
require_det_id: true
argc: 1
input: [ 'INDEX', 'args[0]' ]
input_types: [ int, int ]
cast_input: [ false, true ]
output: [ 'args.front()' ]
INTEGER_USER_IND_COMMAND:
template: true
@@ -1565,18 +1542,6 @@ fmaster:
function: setMasterFileWrite
input_types: [ bool ]
################# INTEGER_IND_COMMAND #######################
v_limit:
inherit_actions: INTEGER_IND_COMMAND
help: "[n_value]\n\t[Ctb][Xilinx Ctb] Soft limit for power supplies (ctb only) and DACS in mV."
actions:
GET:
function: getPower
input: [ 'defs::V_LIMIT' ]
PUT:
function: setPower
input: [ 'defs::V_LIMIT', 'args[0]' ]
################# INTEGER_USER_IND_COMMAND ###################
vchip_comp_fe:
@@ -2241,17 +2206,6 @@ slowadclist:
function: setSlowADCNames
################# CTB_VALUES ################################
powervalues:
help: "[name] \n\t\t[Ctb][Xilinx_Ctb] Get values of all powers."
actions:
GET:
argc: 0
ctb_output_list:
GETFCNLIST: getPowerList
GETFCNNAME: getPowerNames
GETFCN: getPower
suffix: "mV"
printable_name: "*name_it++"
slowadcvalues:
help: "[name] \n\t\t[Ctb][Xilinx_Ctb] Get values of all slow adcs."
@@ -2805,7 +2759,30 @@ dac:
arg_types: [ std::string, bool ]
v_limit:
is_description: true
actions:
GET:
argc: 0
PUT:
argc: 1
arg_types: [ int ]
power:
is_description: true
actions:
GET:
argc: 0
PUT:
argc: -1
arg_types: [ std::string ]
powervalues:
is_description: true
actions:
GET:
args:
- argc: 0
################# special commands ##########################
@@ -94,6 +94,7 @@ vcasc_sfp: dac
vipre_cds: dac
ibias_sfp: dac
defaultdacs: resetdacs
#acquisition
@@ -7247,6 +7247,40 @@ port:
\ virtual servers on same pc."
infer_action: true
template: true
power:
actions:
GET:
args:
- arg_types: []
argc: 0
cast_input: []
check_det_id: false
convert_det_id: true
function: ''
input: []
input_types: []
output: []
require_det_id: false
store_result_in_t: true
PUT:
args:
- arg_types:
- std::string
argc: -1
cast_input: []
check_det_id: false
convert_det_id: true
function: ''
input: []
input_types: []
output: []
require_det_id: false
store_result_in_t: false
command_name: power
function_alias: power
help: ''
infer_action: true
is_description: true
powerchip:
actions:
GET:
@@ -7458,12 +7492,6 @@ powervalues:
cast_input: []
check_det_id: false
convert_det_id: true
ctb_output_list:
GETFCN: getPower
GETFCNLIST: getPowerList
GETFCNNAME: getPowerNames
printable_name: '*name_it++'
suffix: mV
function: ''
input: []
input_types: []
@@ -7472,8 +7500,9 @@ powervalues:
store_result_in_t: true
command_name: powervalues
function_alias: powervalues
help: "[name] \n\t\t[Ctb][Xilinx_Ctb] Get values of all powers."
help: ''
infer_action: true
is_description: true
programfpga:
actions:
PUT:
@@ -12600,47 +12629,34 @@ v_limit:
args:
- arg_types: []
argc: 0
cast_input:
- false
cast_input: []
check_det_id: false
convert_det_id: true
function: getPower
input:
- defs::V_LIMIT
input_types:
- int
output:
- OutString(t)
require_det_id: true
function: ''
input: []
input_types: []
output: []
require_det_id: false
store_result_in_t: true
PUT:
args:
- arg_types:
- int
- int
argc: 1
cast_input:
- false
- true
cast_input: []
check_det_id: false
convert_det_id: true
function: setPower
input:
- defs::V_LIMIT
- args[0]
input_types:
- int
- int
output:
- args.front()
require_det_id: true
function: ''
input: []
input_types: []
output: []
require_det_id: false
store_result_in_t: false
command_name: v_limit
function_alias: v_limit
help: "[n_value]\n\t[Ctb][Xilinx Ctb] Soft limit for power supplies (ctb only) and\
\ DACS in mV."
help: ''
infer_action: true
template: true
is_description: true
vchip_comp_adc:
actions:
GET:
-121
View File
@@ -9130,65 +9130,6 @@ std::string Caller::powername(int action) {
return os.str();
}
std::string Caller::powervalues(int action) {
std::ostringstream os;
// print help
if (action == slsDetectorDefs::HELP_ACTION) {
os << R"V0G0N([name]
[Ctb][Xilinx_Ctb] Get values of all powers. )V0G0N"
<< std::endl;
return os.str();
}
// check if action and arguments are valid
if (action == slsDetectorDefs::GET_ACTION) {
if (1 && args.size() != 0) {
throw RuntimeError("Wrong number of arguments for action GET");
}
if (args.size() == 0) {
}
}
else {
throw RuntimeError(
"INTERNAL ERROR: Invalid action: supported actions are ['GET']");
}
// generate code for each action
if (action == slsDetectorDefs::GET_ACTION) {
if (args.size() == 0) {
std::string suffix = " mV";
auto t = det->getPowerList();
auto names = det->getPowerNames();
auto name_it = names.begin();
os << '[';
if (t.size() > 0) {
auto it = t.cbegin();
os << ToString(*name_it++) << ' ';
os << OutString(det->getPower(*it++, std::vector<int>{det_id}))
<< suffix;
while (it != t.cend()) {
os << ", " << ToString(*name_it++) << ' ';
os << OutString(
det->getPower(*it++, std::vector<int>{det_id}))
<< suffix;
}
}
os << "]\n";
}
}
return os.str();
}
std::string Caller::programfpga(int action) {
std::ostringstream os;
@@ -15813,68 +15754,6 @@ std::string Caller::updatemode(int action) {
return os.str();
}
std::string Caller::v_limit(int action) {
std::ostringstream os;
// print help
if (action == slsDetectorDefs::HELP_ACTION) {
os << R"V0G0N([n_value]
[Ctb][Xilinx Ctb] Soft limit for power supplies (ctb only) and DACS in mV. )V0G0N"
<< std::endl;
return os.str();
}
// check if action and arguments are valid
if (action == slsDetectorDefs::GET_ACTION) {
if (1 && args.size() != 0) {
throw RuntimeError("Wrong number of arguments for action GET");
}
if (args.size() == 0) {
}
}
else if (action == slsDetectorDefs::PUT_ACTION) {
if (1 && args.size() != 1) {
throw RuntimeError("Wrong number of arguments for action PUT");
}
if (args.size() == 1) {
try {
StringTo<int>(args[0]);
} catch (...) {
throw RuntimeError("Could not convert argument 1 to int");
}
}
}
else {
throw RuntimeError("INTERNAL ERROR: Invalid action: supported actions "
"are ['GET', 'PUT']");
}
// generate code for each action
if (action == slsDetectorDefs::GET_ACTION) {
if (args.size() == 0) {
auto t = det->getPower(defs::V_LIMIT, std::vector<int>{det_id});
os << OutString(t) << '\n';
}
}
if (action == slsDetectorDefs::PUT_ACTION) {
if (args.size() == 1) {
auto arg1 = StringTo<int>(args[0]);
det->setPower(defs::V_LIMIT, arg1, std::vector<int>{det_id});
os << args.front() << '\n';
}
}
return os.str();
}
std::string Caller::vchip_comp_adc(int action) {
std::ostringstream os;
+2
View File
@@ -215,6 +215,7 @@ class Caller {
std::string periodl(int action);
std::string polarity(int action);
std::string port(int action);
std::string power(int action);
std::string powerchip(int action);
std::string powerindex(int action);
std::string powerlist(int action);
@@ -582,6 +583,7 @@ class Caller {
{"periodl", &Caller::periodl},
{"polarity", &Caller::polarity},
{"port", &Caller::port},
{"power", &Caller::power},
{"powerchip", &Caller::powerchip},
{"powerindex", &Caller::powerindex},
{"powerlist", &Caller::powerlist},
+139
View File
@@ -1889,4 +1889,143 @@ bool Caller::parseMV(int argIndex) {
return false;
}
std::string Caller::v_limit(int action) {
std::ostringstream os;
if (action == defs::HELP_ACTION) {
os << "[n_value]\n\t[Ctb][Xilinx Ctb] Soft limit for power supplies "
"and DACS in mV."
<< '\n';
return os.str();
}
auto detType = det->getDetectorType().squash(defs::GENERIC);
if (detType != defs::CHIPTESTBOARD &&
detType != defs::XILINX_CHIPTESTBOARD) {
throw RuntimeError("v_limit command is only applicable for "
"ChipTestBoard and Xilinx ChipTestBoard.");
}
if (action == defs::GET_ACTION) {
if (!args.empty()) {
WrongNumberOfParameters(0);
}
auto t = det->getDAC(defs::V_LIMIT, true, std::vector<int>{det_id});
os << OutString(t) << " mV" << '\n';
}
else if (action == defs::PUT_ACTION) {
if (args.size() < 1) {
WrongNumberOfParameters(1);
}
auto val = StringTo<int>(args[0]);
det->setDAC(defs::V_LIMIT, val, true, std::vector<int>{det_id});
os << args[0] << " mV" << '\n';
}
else {
throw RuntimeError("Unknown action");
}
return os.str();
}
std::string Caller::power(int action) {
std::ostringstream os;
if (action == defs::HELP_ACTION) {
os << "[list of power names] [on|off]\n\t[Ctb][Xilinx Ctb] Enable or "
"disable power rails. Power name can be v_a, v_b, v_c, v_d or "
"v_io. If none provided, all of them are set to on or off. One "
"can retrieve only one at a time."
<< '\n';
return os.str();
}
auto detType = det->getDetectorType().squash(defs::GENERIC);
if (detType != defs::CHIPTESTBOARD &&
detType != defs::XILINX_CHIPTESTBOARD) {
throw RuntimeError("This command is only applicable for ChipTestBoard "
"and Xilinx ChipTestBoard.");
}
if (action == defs::GET_ACTION) {
if (args.size() != 1) {
WrongNumberOfParameters(1);
}
auto t = det->isPowerEnabled(StringTo<defs::dacIndex>(args[0]),
std::vector<int>{det_id})
.tsquash("Inconsistent across modules");
os << args[0] << ' ' << ToString(t, defs::OnOff) << '\n';
} else if (action == defs::PUT_ACTION) {
if (args.size() < 1 || args.size() > 6) {
WrongNumberOfParameters(1);
}
std::string lastArg = args.back();
if (lastArg != "on" && lastArg != "off") {
throw RuntimeError("Last argument '" + lastArg +
"' must be on or off");
}
bool enable = StringTo(lastArg, defs::OnOff);
std::vector<defs::dacIndex> powerIndices;
for (size_t i = 0; i < args.size() - 1; ++i) {
powerIndices.push_back(StringTo<defs::dacIndex>(args[i]));
}
det->setPowerEnabled(powerIndices, enable, std::vector<int>{det_id});
args.pop_back();
os << ToString(args) << ' ' << ToString(enable, defs::OnOff) << '\n';
} else {
throw RuntimeError("Unknown action");
}
return os.str();
}
std::string Caller::powervalues(int action) {
std::ostringstream os;
if (action == defs::HELP_ACTION) {
os << "\n\t\t[Ctb][Xilinx_Ctb] Get dac values of all powers if "
"enabled, else '0'."
<< '\n';
return os.str();
}
auto detType = det->getDetectorType().squash(defs::GENERIC);
if (detType != defs::CHIPTESTBOARD &&
detType != defs::XILINX_CHIPTESTBOARD) {
throw RuntimeError("This command is only applicable for ChipTestBoard "
"and Xilinx ChipTestBoard.");
}
if (action == defs::GET_ACTION) {
if (!args.empty()) {
WrongNumberOfParameters(0);
}
auto t = det->getPowerList();
auto names = det->getPowerNames();
auto name_it = names.begin();
os << '[';
auto it = t.cbegin();
while (it != t.cend()) {
if (it != t.cbegin())
os << ", ";
os << ToString(*name_it++) << ' ';
if (det->isPowerEnabled(*it, std::vector<int>{det_id}).squash(0)) {
os << OutString(
det->getDAC(*it, true, std::vector<int>{det_id}))
<< " mV";
} else {
os << "0 mV";
}
++it;
}
os << "]" << '\n';
} else if (action == defs::PUT_ACTION) {
throw RuntimeError("Cannot put");
} else {
throw RuntimeError("Unknown action");
}
return os.str();
}
} // namespace sls
+2 -2
View File
@@ -2195,7 +2195,7 @@ Result<bool> Detector::isPowerEnabled(defs::dacIndex index,
valid_indices.end()) {
throw RuntimeError("Unknown Power Index");
}
return pimpl->Parallel(&Module::getPower, pos, index);
return pimpl->Parallel(&Module::isPowerEnabled, pos, index);
}
void Detector::setPowerEnabled(const std::vector<defs::dacIndex> &indices,
@@ -2207,7 +2207,7 @@ void Detector::setPowerEnabled(const std::vector<defs::dacIndex> &indices,
throw RuntimeError("Unknown Power Index");
}
}
pimpl->Parallel(&Module::setPower, pos, value, indices);
pimpl->Parallel(&Module::setPowerEnabled, pos, indices, value);
}
Result<int> Detector::getADCVpp(bool mV, Positions pos) const {
+6
View File
@@ -2256,6 +2256,12 @@ int InferAction::port() {
}
}
int InferAction::power() {
throw RuntimeError("sls_detector is disabled for command: power. Use "
"sls_detector_get or sls_detector_put");
}
int InferAction::powerchip() {
if (args.size() == 0) {
+2
View File
@@ -170,6 +170,7 @@ class InferAction {
int periodl();
int polarity();
int port();
int power();
int powerchip();
int powerindex();
int powerlist();
@@ -504,6 +505,7 @@ class InferAction {
{"periodl", &InferAction::periodl},
{"polarity", &InferAction::polarity},
{"port", &InferAction::port},
{"power", &InferAction::power},
{"powerchip", &InferAction::powerchip},
{"powerindex", &InferAction::powerindex},
{"powerlist", &InferAction::powerlist},
@@ -861,7 +861,7 @@ TEST_CASE("v_limit", "[.detectorintegration]") {
if (det_type == defs::CHIPTESTBOARD ||
det_type == defs::XILINX_CHIPTESTBOARD) {
auto prev_val = det.getDAC(defs::V_LIMIT, true);
REQUIRE_THROWS(caller.call("v_limit", {"1200"}, -1, PUT));
REQUIRE_THROWS(caller.call("v_limit", {"1200", "mV"}, -1, PUT));
REQUIRE_THROWS(caller.call("v_limit", {"-100"}, -1, PUT));
REQUIRE_THROWS(caller.call("v_limit", {"0"}, -1, PUT));
REQUIRE_THROWS(caller.call("v_limit", {"-100", "mV"}, -1, PUT));
@@ -869,17 +869,17 @@ TEST_CASE("v_limit", "[.detectorintegration]") {
{
std::ostringstream oss;
caller.call("v_limit", {"1500", "mV"}, -1, PUT, oss);
caller.call("v_limit", {"1500"}, -1, PUT, oss);
REQUIRE(oss.str() == "v_limit 1500 mV\n");
}
{
std::ostringstream oss;
caller.call("v_limit", {"0", "mV"}, -1, PUT, oss);
caller.call("v_limit", {"0"}, -1, PUT, oss);
REQUIRE(oss.str() == "v_limit 0 mV\n");
}
{
std::ostringstream oss;
caller.call("v_limit", {"0", "mV"}, -1, PUT, oss);
caller.call("v_limit", {"0"}, -1, PUT, oss);
REQUIRE(oss.str() == "v_limit 0 mV\n");
}
{